blob: 7a2d73ba712234a61aee514fcf98da8648548672 [file] [log] [blame]
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001# SPDX-License-Identifier: GPL-2.0
2#
3# Makefile for the fpga framework and fpga manager drivers.
4#
5
6# Core FPGA Manager Framework
7obj-$(CONFIG_FPGA) += fpga-mgr.o
8
9# FPGA Manager Drivers
10obj-$(CONFIG_FPGA_MGR_ALTERA_CVP) += altera-cvp.o
11obj-$(CONFIG_FPGA_MGR_ALTERA_PS_SPI) += altera-ps-spi.o
12obj-$(CONFIG_FPGA_MGR_ICE40_SPI) += ice40-spi.o
13obj-$(CONFIG_FPGA_MGR_MACHXO2_SPI) += machxo2-spi.o
14obj-$(CONFIG_FPGA_MGR_SOCFPGA) += socfpga.o
15obj-$(CONFIG_FPGA_MGR_SOCFPGA_A10) += socfpga-a10.o
16obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o
17obj-$(CONFIG_FPGA_MGR_XILINX_SPI) += xilinx-spi.o
18obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o
19obj-$(CONFIG_ALTERA_PR_IP_CORE) += altera-pr-ip-core.o
20obj-$(CONFIG_ALTERA_PR_IP_CORE_PLAT) += altera-pr-ip-core-plat.o
21
22# FPGA Bridge Drivers
23obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o
24obj-$(CONFIG_SOCFPGA_FPGA_BRIDGE) += altera-hps2fpga.o altera-fpga2sdram.o
25obj-$(CONFIG_ALTERA_FREEZE_BRIDGE) += altera-freeze-bridge.o
26obj-$(CONFIG_XILINX_PR_DECOUPLER) += xilinx-pr-decoupler.o
27
28# High Level Interfaces
29obj-$(CONFIG_FPGA_REGION) += fpga-region.o
30obj-$(CONFIG_OF_FPGA_REGION) += of-fpga-region.o
31
32# FPGA Device Feature List Support
33obj-$(CONFIG_FPGA_DFL) += dfl.o
34obj-$(CONFIG_FPGA_DFL_FME) += dfl-fme.o
35obj-$(CONFIG_FPGA_DFL_FME_MGR) += dfl-fme-mgr.o
36obj-$(CONFIG_FPGA_DFL_FME_BRIDGE) += dfl-fme-br.o
37obj-$(CONFIG_FPGA_DFL_FME_REGION) += dfl-fme-region.o
38obj-$(CONFIG_FPGA_DFL_AFU) += dfl-afu.o
39
40dfl-fme-objs := dfl-fme-main.o dfl-fme-pr.o
41dfl-afu-objs := dfl-afu-main.o dfl-afu-region.o dfl-afu-dma-region.o
42
43# Drivers for FPGAs which implement DFL
44obj-$(CONFIG_FPGA_DFL_PCI) += dfl-pci.o