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David Brazdil0f672f62019-12-10 10:32:29 +00001// SPDX-License-Identifier: GPL-2.0-only
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002/*
3 * Copyright (C) STMicroelectronics 2017
4 *
5 * Author: Fabrice Gasnier <fabrice.gasnier@st.com>
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006 */
7
8#include <linux/bitfield.h>
9#include <linux/clk.h>
10#include <linux/io.h>
11#include <linux/iopoll.h>
12#include <linux/module.h>
13#include <linux/of_device.h>
14#include <linux/platform_device.h>
15#include <linux/regulator/driver.h>
16#include <linux/regulator/of_regulator.h>
David Brazdil0f672f62019-12-10 10:32:29 +000017#include <linux/pm_runtime.h>
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000018
19/* STM32 VREFBUF registers */
20#define STM32_VREFBUF_CSR 0x00
21
22/* STM32 VREFBUF CSR bitfields */
23#define STM32_VRS GENMASK(6, 4)
24#define STM32_VRR BIT(3)
25#define STM32_HIZ BIT(1)
26#define STM32_ENVR BIT(0)
27
David Brazdil0f672f62019-12-10 10:32:29 +000028#define STM32_VREFBUF_AUTO_SUSPEND_DELAY_MS 10
29
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000030struct stm32_vrefbuf {
31 void __iomem *base;
32 struct clk *clk;
David Brazdil0f672f62019-12-10 10:32:29 +000033 struct device *dev;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000034};
35
36static const unsigned int stm32_vrefbuf_voltages[] = {
37 /* Matches resp. VRS = 000b, 001b, 010b, 011b */
38 2500000, 2048000, 1800000, 1500000,
39};
40
41static int stm32_vrefbuf_enable(struct regulator_dev *rdev)
42{
43 struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
David Brazdil0f672f62019-12-10 10:32:29 +000044 u32 val;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000045 int ret;
46
David Brazdil0f672f62019-12-10 10:32:29 +000047 ret = pm_runtime_get_sync(priv->dev);
48 if (ret < 0) {
49 pm_runtime_put_noidle(priv->dev);
50 return ret;
51 }
52
53 val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000054 val = (val & ~STM32_HIZ) | STM32_ENVR;
55 writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
56
57 /*
58 * Vrefbuf startup time depends on external capacitor: wait here for
59 * VRR to be set. That means output has reached expected value.
60 * ~650us sleep should be enough for caps up to 1.5uF. Use 10ms as
61 * arbitrary timeout.
62 */
63 ret = readl_poll_timeout(priv->base + STM32_VREFBUF_CSR, val,
64 val & STM32_VRR, 650, 10000);
65 if (ret) {
66 dev_err(&rdev->dev, "stm32 vrefbuf timed out!\n");
67 val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
68 val = (val & ~STM32_ENVR) | STM32_HIZ;
69 writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
70 }
71
David Brazdil0f672f62019-12-10 10:32:29 +000072 pm_runtime_mark_last_busy(priv->dev);
73 pm_runtime_put_autosuspend(priv->dev);
74
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000075 return ret;
76}
77
78static int stm32_vrefbuf_disable(struct regulator_dev *rdev)
79{
80 struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
David Brazdil0f672f62019-12-10 10:32:29 +000081 u32 val;
82 int ret;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000083
David Brazdil0f672f62019-12-10 10:32:29 +000084 ret = pm_runtime_get_sync(priv->dev);
85 if (ret < 0) {
86 pm_runtime_put_noidle(priv->dev);
87 return ret;
88 }
89
90 val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
Olivier Deprez0e641232021-09-23 10:07:05 +020091 val &= ~STM32_ENVR;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000092 writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
93
David Brazdil0f672f62019-12-10 10:32:29 +000094 pm_runtime_mark_last_busy(priv->dev);
95 pm_runtime_put_autosuspend(priv->dev);
96
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000097 return 0;
98}
99
100static int stm32_vrefbuf_is_enabled(struct regulator_dev *rdev)
101{
102 struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
David Brazdil0f672f62019-12-10 10:32:29 +0000103 int ret;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000104
David Brazdil0f672f62019-12-10 10:32:29 +0000105 ret = pm_runtime_get_sync(priv->dev);
106 if (ret < 0) {
107 pm_runtime_put_noidle(priv->dev);
108 return ret;
109 }
110
111 ret = readl_relaxed(priv->base + STM32_VREFBUF_CSR) & STM32_ENVR;
112
113 pm_runtime_mark_last_busy(priv->dev);
114 pm_runtime_put_autosuspend(priv->dev);
115
116 return ret;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000117}
118
119static int stm32_vrefbuf_set_voltage_sel(struct regulator_dev *rdev,
120 unsigned sel)
121{
122 struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
David Brazdil0f672f62019-12-10 10:32:29 +0000123 u32 val;
124 int ret;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000125
David Brazdil0f672f62019-12-10 10:32:29 +0000126 ret = pm_runtime_get_sync(priv->dev);
127 if (ret < 0) {
128 pm_runtime_put_noidle(priv->dev);
129 return ret;
130 }
131
132 val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000133 val = (val & ~STM32_VRS) | FIELD_PREP(STM32_VRS, sel);
134 writel_relaxed(val, priv->base + STM32_VREFBUF_CSR);
135
David Brazdil0f672f62019-12-10 10:32:29 +0000136 pm_runtime_mark_last_busy(priv->dev);
137 pm_runtime_put_autosuspend(priv->dev);
138
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000139 return 0;
140}
141
142static int stm32_vrefbuf_get_voltage_sel(struct regulator_dev *rdev)
143{
144 struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
David Brazdil0f672f62019-12-10 10:32:29 +0000145 u32 val;
146 int ret;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000147
David Brazdil0f672f62019-12-10 10:32:29 +0000148 ret = pm_runtime_get_sync(priv->dev);
149 if (ret < 0) {
150 pm_runtime_put_noidle(priv->dev);
151 return ret;
152 }
153
154 val = readl_relaxed(priv->base + STM32_VREFBUF_CSR);
155 ret = FIELD_GET(STM32_VRS, val);
156
157 pm_runtime_mark_last_busy(priv->dev);
158 pm_runtime_put_autosuspend(priv->dev);
159
160 return ret;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000161}
162
163static const struct regulator_ops stm32_vrefbuf_volt_ops = {
164 .enable = stm32_vrefbuf_enable,
165 .disable = stm32_vrefbuf_disable,
166 .is_enabled = stm32_vrefbuf_is_enabled,
167 .get_voltage_sel = stm32_vrefbuf_get_voltage_sel,
168 .set_voltage_sel = stm32_vrefbuf_set_voltage_sel,
169 .list_voltage = regulator_list_voltage_table,
170};
171
172static const struct regulator_desc stm32_vrefbuf_regu = {
173 .name = "vref",
174 .supply_name = "vdda",
175 .volt_table = stm32_vrefbuf_voltages,
176 .n_voltages = ARRAY_SIZE(stm32_vrefbuf_voltages),
177 .ops = &stm32_vrefbuf_volt_ops,
Olivier Deprez0e641232021-09-23 10:07:05 +0200178 .off_on_delay = 1000,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000179 .type = REGULATOR_VOLTAGE,
180 .owner = THIS_MODULE,
181};
182
183static int stm32_vrefbuf_probe(struct platform_device *pdev)
184{
185 struct resource *res;
186 struct stm32_vrefbuf *priv;
187 struct regulator_config config = { };
188 struct regulator_dev *rdev;
189 int ret;
190
191 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
192 if (!priv)
193 return -ENOMEM;
David Brazdil0f672f62019-12-10 10:32:29 +0000194 priv->dev = &pdev->dev;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000195
196 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
197 priv->base = devm_ioremap_resource(&pdev->dev, res);
198 if (IS_ERR(priv->base))
199 return PTR_ERR(priv->base);
200
201 priv->clk = devm_clk_get(&pdev->dev, NULL);
202 if (IS_ERR(priv->clk))
203 return PTR_ERR(priv->clk);
204
David Brazdil0f672f62019-12-10 10:32:29 +0000205 pm_runtime_get_noresume(&pdev->dev);
206 pm_runtime_set_active(&pdev->dev);
207 pm_runtime_set_autosuspend_delay(&pdev->dev,
208 STM32_VREFBUF_AUTO_SUSPEND_DELAY_MS);
209 pm_runtime_use_autosuspend(&pdev->dev);
210 pm_runtime_enable(&pdev->dev);
211
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000212 ret = clk_prepare_enable(priv->clk);
213 if (ret) {
214 dev_err(&pdev->dev, "clk prepare failed with error %d\n", ret);
David Brazdil0f672f62019-12-10 10:32:29 +0000215 goto err_pm_stop;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000216 }
217
218 config.dev = &pdev->dev;
219 config.driver_data = priv;
220 config.of_node = pdev->dev.of_node;
221 config.init_data = of_get_regulator_init_data(&pdev->dev,
222 pdev->dev.of_node,
223 &stm32_vrefbuf_regu);
224
225 rdev = regulator_register(&stm32_vrefbuf_regu, &config);
226 if (IS_ERR(rdev)) {
227 ret = PTR_ERR(rdev);
228 dev_err(&pdev->dev, "register failed with error %d\n", ret);
229 goto err_clk_dis;
230 }
231 platform_set_drvdata(pdev, rdev);
232
David Brazdil0f672f62019-12-10 10:32:29 +0000233 pm_runtime_mark_last_busy(&pdev->dev);
234 pm_runtime_put_autosuspend(&pdev->dev);
235
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000236 return 0;
237
238err_clk_dis:
239 clk_disable_unprepare(priv->clk);
David Brazdil0f672f62019-12-10 10:32:29 +0000240err_pm_stop:
241 pm_runtime_disable(&pdev->dev);
242 pm_runtime_set_suspended(&pdev->dev);
243 pm_runtime_put_noidle(&pdev->dev);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000244
245 return ret;
246}
247
248static int stm32_vrefbuf_remove(struct platform_device *pdev)
249{
250 struct regulator_dev *rdev = platform_get_drvdata(pdev);
251 struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
252
David Brazdil0f672f62019-12-10 10:32:29 +0000253 pm_runtime_get_sync(&pdev->dev);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000254 regulator_unregister(rdev);
255 clk_disable_unprepare(priv->clk);
David Brazdil0f672f62019-12-10 10:32:29 +0000256 pm_runtime_disable(&pdev->dev);
257 pm_runtime_set_suspended(&pdev->dev);
258 pm_runtime_put_noidle(&pdev->dev);
259
260 return 0;
261};
262
263static int __maybe_unused stm32_vrefbuf_runtime_suspend(struct device *dev)
264{
265 struct regulator_dev *rdev = dev_get_drvdata(dev);
266 struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
267
268 clk_disable_unprepare(priv->clk);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000269
270 return 0;
David Brazdil0f672f62019-12-10 10:32:29 +0000271}
272
273static int __maybe_unused stm32_vrefbuf_runtime_resume(struct device *dev)
274{
275 struct regulator_dev *rdev = dev_get_drvdata(dev);
276 struct stm32_vrefbuf *priv = rdev_get_drvdata(rdev);
277
278 return clk_prepare_enable(priv->clk);
279}
280
281static const struct dev_pm_ops stm32_vrefbuf_pm_ops = {
282 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
283 pm_runtime_force_resume)
284 SET_RUNTIME_PM_OPS(stm32_vrefbuf_runtime_suspend,
285 stm32_vrefbuf_runtime_resume,
286 NULL)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000287};
288
289static const struct of_device_id stm32_vrefbuf_of_match[] = {
290 { .compatible = "st,stm32-vrefbuf", },
291 {},
292};
293MODULE_DEVICE_TABLE(of, stm32_vrefbuf_of_match);
294
295static struct platform_driver stm32_vrefbuf_driver = {
296 .probe = stm32_vrefbuf_probe,
297 .remove = stm32_vrefbuf_remove,
298 .driver = {
299 .name = "stm32-vrefbuf",
300 .of_match_table = of_match_ptr(stm32_vrefbuf_of_match),
David Brazdil0f672f62019-12-10 10:32:29 +0000301 .pm = &stm32_vrefbuf_pm_ops,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000302 },
303};
304module_platform_driver(stm32_vrefbuf_driver);
305
306MODULE_LICENSE("GPL v2");
307MODULE_AUTHOR("Fabrice Gasnier <fabrice.gasnier@st.com>");
308MODULE_DESCRIPTION("STMicroelectronics STM32 VREFBUF driver");
309MODULE_ALIAS("platform:stm32-vrefbuf");