blob: 1b1d63b3634b580cf6b29384e162f76b28e05102 [file] [log] [blame]
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001
2config HAS_DMA
3 bool
4 depends on !NO_DMA
5 default y
6
7config NEED_SG_DMA_LENGTH
8 bool
9
10config NEED_DMA_MAP_STATE
11 bool
12
13config ARCH_DMA_ADDR_T_64BIT
14 def_bool 64BIT || PHYS_ADDR_T_64BIT
15
16config HAVE_GENERIC_DMA_COHERENT
17 bool
18
19config ARCH_HAS_SYNC_DMA_FOR_DEVICE
20 bool
21
22config ARCH_HAS_SYNC_DMA_FOR_CPU
23 bool
24 select NEED_DMA_MAP_STATE
25
26config ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
27 bool
28
29config DMA_DIRECT_OPS
30 bool
31 depends on HAS_DMA
32
33config DMA_NONCOHERENT_OPS
34 bool
35 depends on HAS_DMA
36 select DMA_DIRECT_OPS
37
38config DMA_NONCOHERENT_MMAP
39 bool
40 depends on DMA_NONCOHERENT_OPS
41
42config DMA_NONCOHERENT_CACHE_SYNC
43 bool
44 depends on DMA_NONCOHERENT_OPS
45
46config DMA_VIRT_OPS
47 bool
48 depends on HAS_DMA
49
50config SWIOTLB
51 bool
52 select DMA_DIRECT_OPS
53 select NEED_DMA_MAP_STATE