| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * STK1135 registers |
| 3 | * |
| 4 | * Copyright (c) 2013 Ondrej Zary |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License, or |
| 9 | * any later version. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 14 | * GNU General Public License for more details. |
| 15 | */ |
| 16 | |
| 17 | #define STK1135_REG_GCTRL 0x000 /* GPIO control */ |
| 18 | #define STK1135_REG_ICTRL 0x004 /* Interrupt control */ |
| 19 | #define STK1135_REG_IDATA 0x008 /* Interrupt data */ |
| 20 | #define STK1135_REG_RMCTL 0x00c /* Remote wakeup control */ |
| 21 | #define STK1135_REG_POSVA 0x010 /* Power-on strapping data */ |
| 22 | |
| 23 | #define STK1135_REG_SENSO 0x018 /* Sensor select options */ |
| 24 | #define STK1135_REG_PLLFD 0x01c /* PLL frequency divider */ |
| 25 | |
| 26 | #define STK1135_REG_SCTRL 0x100 /* Sensor control register */ |
| 27 | #define STK1135_REG_DCTRL 0x104 /* Decimation control register */ |
| 28 | #define STK1135_REG_CISPO 0x110 /* Capture image starting position */ |
| 29 | #define STK1135_REG_CIEPO 0x114 /* Capture image ending position */ |
| 30 | #define STK1135_REG_TCTRL 0x120 /* Test data control */ |
| 31 | |
| 32 | #define STK1135_REG_SICTL 0x200 /* Serial interface control register */ |
| 33 | #define STK1135_REG_SBUSW 0x204 /* Serial bus write */ |
| 34 | #define STK1135_REG_SBUSR 0x208 /* Serial bus read */ |
| 35 | #define STK1135_REG_SCSI 0x20c /* Software control serial interface */ |
| 36 | #define STK1135_REG_GSBWP 0x210 /* General serial bus write port */ |
| 37 | #define STK1135_REG_GSBRP 0x214 /* General serial bus read port */ |
| 38 | #define STK1135_REG_ASIC 0x2fc /* Alternate serial interface control */ |
| 39 | |
| 40 | #define STK1135_REG_TMGEN 0x300 /* Timing generator */ |
| 41 | #define STK1135_REG_TCP1 0x350 /* Timing control parameter 1 */ |
| 42 | |
| 43 | struct stk1135_pkt_header { |
| 44 | u8 flags; |
| 45 | u8 seq; |
| 46 | __le16 gpio; |
| 47 | } __packed; |
| 48 | |
| 49 | #define STK1135_HDR_FRAME_START (1 << 7) |
| 50 | #define STK1135_HDR_ODD (1 << 6) |
| 51 | #define STK1135_HDR_I2C_VBLANK (1 << 5) |
| 52 | |
| 53 | #define STK1135_HDR_SEQ_MASK 0x3f |