Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | #ifndef __ASM_OPENRISC_FUTEX_H |
| 3 | #define __ASM_OPENRISC_FUTEX_H |
| 4 | |
| 5 | #ifdef __KERNEL__ |
| 6 | |
| 7 | #include <linux/futex.h> |
| 8 | #include <linux/uaccess.h> |
| 9 | #include <asm/errno.h> |
| 10 | |
| 11 | #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \ |
| 12 | ({ \ |
| 13 | __asm__ __volatile__ ( \ |
| 14 | "1: l.lwa %0, %2 \n" \ |
| 15 | insn "\n" \ |
| 16 | "2: l.swa %2, %1 \n" \ |
| 17 | " l.bnf 1b \n" \ |
| 18 | " l.ori %1, r0, 0 \n" \ |
| 19 | "3: \n" \ |
| 20 | ".section .fixup,\"ax\" \n" \ |
| 21 | "4: l.j 3b \n" \ |
| 22 | " l.addi %1, r0, %3 \n" \ |
| 23 | ".previous \n" \ |
| 24 | ".section __ex_table,\"a\" \n" \ |
| 25 | ".word 1b,4b,2b,4b \n" \ |
| 26 | ".previous \n" \ |
| 27 | : "=&r" (oldval), "=&r" (ret), "+m" (*uaddr) \ |
| 28 | : "i" (-EFAULT), "r" (oparg) \ |
| 29 | : "cc", "memory" \ |
| 30 | ); \ |
| 31 | }) |
| 32 | |
| 33 | static inline int |
| 34 | arch_futex_atomic_op_inuser(int op, int oparg, int *oval, u32 __user *uaddr) |
| 35 | { |
| 36 | int oldval = 0, ret; |
| 37 | |
| 38 | pagefault_disable(); |
| 39 | |
| 40 | switch (op) { |
| 41 | case FUTEX_OP_SET: |
| 42 | __futex_atomic_op("l.or %1,%4,%4", ret, oldval, uaddr, oparg); |
| 43 | break; |
| 44 | case FUTEX_OP_ADD: |
| 45 | __futex_atomic_op("l.add %1,%0,%4", ret, oldval, uaddr, oparg); |
| 46 | break; |
| 47 | case FUTEX_OP_OR: |
| 48 | __futex_atomic_op("l.or %1,%0,%4", ret, oldval, uaddr, oparg); |
| 49 | break; |
| 50 | case FUTEX_OP_ANDN: |
| 51 | __futex_atomic_op("l.and %1,%0,%4", ret, oldval, uaddr, ~oparg); |
| 52 | break; |
| 53 | case FUTEX_OP_XOR: |
| 54 | __futex_atomic_op("l.xor %1,%0,%4", ret, oldval, uaddr, oparg); |
| 55 | break; |
| 56 | default: |
| 57 | ret = -ENOSYS; |
| 58 | } |
| 59 | |
| 60 | pagefault_enable(); |
| 61 | |
| 62 | if (!ret) |
| 63 | *oval = oldval; |
| 64 | |
| 65 | return ret; |
| 66 | } |
| 67 | |
| 68 | static inline int |
| 69 | futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, |
| 70 | u32 oldval, u32 newval) |
| 71 | { |
| 72 | int ret = 0; |
| 73 | u32 prev; |
| 74 | |
| 75 | if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32))) |
| 76 | return -EFAULT; |
| 77 | |
| 78 | __asm__ __volatile__ ( \ |
| 79 | "1: l.lwa %1, %2 \n" \ |
| 80 | " l.sfeq %1, %3 \n" \ |
| 81 | " l.bnf 3f \n" \ |
| 82 | " l.nop \n" \ |
| 83 | "2: l.swa %2, %4 \n" \ |
| 84 | " l.bnf 1b \n" \ |
| 85 | " l.nop \n" \ |
| 86 | "3: \n" \ |
| 87 | ".section .fixup,\"ax\" \n" \ |
| 88 | "4: l.j 3b \n" \ |
| 89 | " l.addi %0, r0, %5 \n" \ |
| 90 | ".previous \n" \ |
| 91 | ".section __ex_table,\"a\" \n" \ |
| 92 | ".word 1b,4b,2b,4b \n" \ |
| 93 | ".previous \n" \ |
| 94 | : "+r" (ret), "=&r" (prev), "+m" (*uaddr) \ |
| 95 | : "r" (oldval), "r" (newval), "i" (-EFAULT) \ |
| 96 | : "cc", "memory" \ |
| 97 | ); |
| 98 | |
| 99 | *uval = prev; |
| 100 | return ret; |
| 101 | } |
| 102 | |
| 103 | #endif /* __KERNEL__ */ |
| 104 | |
| 105 | #endif /* __ASM_OPENRISC_FUTEX_H */ |