Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * linux/arch/m68knommu/kernel/setup.c |
| 4 | * |
| 5 | * Copyright (C) 1999-2007 Greg Ungerer (gerg@snapgear.com) |
| 6 | * Copyright (C) 1998,1999 D. Jeff Dionne <jeff@uClinux.org> |
| 7 | * Copyleft ()) 2000 James D. Schettine {james@telos-systems.com} |
| 8 | * Copyright (C) 1998 Kenneth Albanowski <kjahds@kjahds.com> |
| 9 | * Copyright (C) 1995 Hamish Macdonald |
| 10 | * Copyright (C) 2000 Lineo Inc. (www.lineo.com) |
| 11 | * Copyright (C) 2001 Lineo, Inc. <www.lineo.com> |
| 12 | * |
| 13 | * 68VZ328 Fixes/support Evan Stawnyczy <e@lineo.ca> |
| 14 | */ |
| 15 | |
| 16 | /* |
| 17 | * This file handles the architecture-dependent parts of system setup |
| 18 | */ |
| 19 | |
| 20 | #include <linux/kernel.h> |
| 21 | #include <linux/sched.h> |
| 22 | #include <linux/delay.h> |
| 23 | #include <linux/interrupt.h> |
| 24 | #include <linux/fb.h> |
| 25 | #include <linux/module.h> |
| 26 | #include <linux/mm.h> |
| 27 | #include <linux/console.h> |
| 28 | #include <linux/errno.h> |
| 29 | #include <linux/string.h> |
| 30 | #include <linux/bootmem.h> |
| 31 | #include <linux/memblock.h> |
| 32 | #include <linux/seq_file.h> |
| 33 | #include <linux/init.h> |
| 34 | #include <linux/initrd.h> |
| 35 | #include <linux/root_dev.h> |
| 36 | #include <linux/rtc.h> |
| 37 | |
| 38 | #include <asm/setup.h> |
| 39 | #include <asm/bootinfo.h> |
| 40 | #include <asm/irq.h> |
| 41 | #include <asm/machdep.h> |
| 42 | #include <asm/pgtable.h> |
| 43 | #include <asm/sections.h> |
| 44 | |
| 45 | unsigned long memory_start; |
| 46 | unsigned long memory_end; |
| 47 | |
| 48 | EXPORT_SYMBOL(memory_start); |
| 49 | EXPORT_SYMBOL(memory_end); |
| 50 | |
| 51 | char __initdata command_line[COMMAND_LINE_SIZE]; |
| 52 | |
| 53 | /* machine dependent timer functions */ |
| 54 | void (*mach_sched_init)(irq_handler_t handler) __initdata = NULL; |
| 55 | int (*mach_hwclk) (int, struct rtc_time*); |
| 56 | |
| 57 | /* machine dependent reboot functions */ |
| 58 | void (*mach_reset)(void); |
| 59 | void (*mach_halt)(void); |
| 60 | void (*mach_power_off)(void); |
| 61 | |
| 62 | #ifdef CONFIG_M68000 |
| 63 | #if defined(CONFIG_M68328) |
| 64 | #define CPU_NAME "MC68328" |
| 65 | #elif defined(CONFIG_M68EZ328) |
| 66 | #define CPU_NAME "MC68EZ328" |
| 67 | #elif defined(CONFIG_M68VZ328) |
| 68 | #define CPU_NAME "MC68VZ328" |
| 69 | #else |
| 70 | #define CPU_NAME "MC68000" |
| 71 | #endif |
| 72 | #endif /* CONFIG_M68000 */ |
| 73 | #ifndef CPU_NAME |
| 74 | #define CPU_NAME "UNKNOWN" |
| 75 | #endif |
| 76 | |
| 77 | /* |
| 78 | * Different cores have different instruction execution timings. |
| 79 | * The old/traditional 68000 cores are basically all the same, at 16. |
| 80 | * The ColdFire cores vary a little, their values are defined in their |
| 81 | * headers. We default to the standard 68000 value here. |
| 82 | */ |
| 83 | #ifndef CPU_INSTR_PER_JIFFY |
| 84 | #define CPU_INSTR_PER_JIFFY 16 |
| 85 | #endif |
| 86 | |
| 87 | void __init setup_arch(char **cmdline_p) |
| 88 | { |
| 89 | memory_start = PAGE_ALIGN(_ramstart); |
| 90 | memory_end = _ramend; |
| 91 | |
| 92 | init_mm.start_code = (unsigned long) &_stext; |
| 93 | init_mm.end_code = (unsigned long) &_etext; |
| 94 | init_mm.end_data = (unsigned long) &_edata; |
| 95 | init_mm.brk = (unsigned long) 0; |
| 96 | |
| 97 | config_BSP(&command_line[0], sizeof(command_line)); |
| 98 | |
| 99 | #if defined(CONFIG_BOOTPARAM) |
| 100 | strncpy(&command_line[0], CONFIG_BOOTPARAM_STRING, sizeof(command_line)); |
| 101 | command_line[sizeof(command_line) - 1] = 0; |
| 102 | #endif /* CONFIG_BOOTPARAM */ |
| 103 | |
| 104 | process_uboot_commandline(&command_line[0], sizeof(command_line)); |
| 105 | |
| 106 | pr_info("uClinux with CPU " CPU_NAME "\n"); |
| 107 | |
| 108 | #ifdef CONFIG_UCDIMM |
| 109 | pr_info("uCdimm by Lineo, Inc. <www.lineo.com>\n"); |
| 110 | #endif |
| 111 | #ifdef CONFIG_M68VZ328 |
| 112 | pr_info("M68VZ328 support by Evan Stawnyczy <e@lineo.ca>\n"); |
| 113 | #endif |
| 114 | #ifdef CONFIG_COLDFIRE |
| 115 | pr_info("COLDFIRE port done by Greg Ungerer, gerg@snapgear.com\n"); |
| 116 | #ifdef CONFIG_M5307 |
| 117 | pr_info("Modified for M5307 by Dave Miller, dmiller@intellistor.com\n"); |
| 118 | #endif |
| 119 | #ifdef CONFIG_ELITE |
| 120 | pr_info("Modified for M5206eLITE by Rob Scott, rscott@mtrob.fdns.net\n"); |
| 121 | #endif |
| 122 | #endif |
| 123 | pr_info("Flat model support (C) 1998,1999 Kenneth Albanowski, D. Jeff Dionne\n"); |
| 124 | |
| 125 | #if defined( CONFIG_PILOT ) && defined( CONFIG_M68328 ) |
| 126 | pr_info("TRG SuperPilot FLASH card support <info@trgnet.com>\n"); |
| 127 | #endif |
| 128 | #if defined( CONFIG_PILOT ) && defined( CONFIG_M68EZ328 ) |
| 129 | pr_info("PalmV support by Lineo Inc. <jeff@uclinux.com>\n"); |
| 130 | #endif |
| 131 | #ifdef CONFIG_DRAGEN2 |
| 132 | pr_info("DragonEngine II board support by Georges Menie\n"); |
| 133 | #endif |
| 134 | #ifdef CONFIG_M5235EVB |
| 135 | pr_info("Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)\n"); |
| 136 | #endif |
| 137 | |
| 138 | pr_debug("KERNEL -> TEXT=0x%p-0x%p DATA=0x%p-0x%p BSS=0x%p-0x%p\n", |
| 139 | _stext, _etext, _sdata, _edata, __bss_start, __bss_stop); |
| 140 | pr_debug("MEMORY -> ROMFS=0x%p-0x%06lx MEM=0x%06lx-0x%06lx\n ", |
| 141 | __bss_stop, memory_start, memory_start, memory_end); |
| 142 | |
| 143 | memblock_add(memory_start, memory_end - memory_start); |
| 144 | |
| 145 | /* Keep a copy of command line */ |
| 146 | *cmdline_p = &command_line[0]; |
| 147 | memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); |
| 148 | boot_command_line[COMMAND_LINE_SIZE-1] = 0; |
| 149 | |
| 150 | #if defined(CONFIG_FRAMEBUFFER_CONSOLE) && defined(CONFIG_DUMMY_CONSOLE) |
| 151 | conswitchp = &dummy_con; |
| 152 | #endif |
| 153 | |
| 154 | /* |
| 155 | * Give all the memory to the bootmap allocator, tell it to put the |
| 156 | * boot mem_map at the start of memory. |
| 157 | */ |
| 158 | min_low_pfn = PFN_DOWN(memory_start); |
| 159 | max_pfn = max_low_pfn = PFN_DOWN(memory_end); |
| 160 | |
| 161 | #if defined(CONFIG_UBOOT) && defined(CONFIG_BLK_DEV_INITRD) |
| 162 | if ((initrd_start > 0) && (initrd_start < initrd_end) && |
| 163 | (initrd_end < memory_end)) |
| 164 | memblock_reserve(initrd_start, initrd_end - initrd_start); |
| 165 | #endif /* if defined(CONFIG_BLK_DEV_INITRD) */ |
| 166 | |
| 167 | /* |
| 168 | * Get kmalloc into gear. |
| 169 | */ |
| 170 | paging_init(); |
| 171 | } |
| 172 | |
| 173 | /* |
| 174 | * Get CPU information for use by the procfs. |
| 175 | */ |
| 176 | static int show_cpuinfo(struct seq_file *m, void *v) |
| 177 | { |
| 178 | char *cpu, *mmu, *fpu; |
| 179 | u_long clockfreq; |
| 180 | |
| 181 | cpu = CPU_NAME; |
| 182 | mmu = "none"; |
| 183 | fpu = "none"; |
| 184 | clockfreq = (loops_per_jiffy * HZ) * CPU_INSTR_PER_JIFFY; |
| 185 | |
| 186 | seq_printf(m, "CPU:\t\t%s\n" |
| 187 | "MMU:\t\t%s\n" |
| 188 | "FPU:\t\t%s\n" |
| 189 | "Clocking:\t%lu.%1luMHz\n" |
| 190 | "BogoMips:\t%lu.%02lu\n" |
| 191 | "Calibration:\t%lu loops\n", |
| 192 | cpu, mmu, fpu, |
| 193 | clockfreq / 1000000, |
| 194 | (clockfreq / 100000) % 10, |
| 195 | (loops_per_jiffy * HZ) / 500000, |
| 196 | ((loops_per_jiffy * HZ) / 5000) % 100, |
| 197 | (loops_per_jiffy * HZ)); |
| 198 | |
| 199 | return 0; |
| 200 | } |
| 201 | |
| 202 | static void *c_start(struct seq_file *m, loff_t *pos) |
| 203 | { |
| 204 | return *pos < NR_CPUS ? ((void *) 0x12345678) : NULL; |
| 205 | } |
| 206 | |
| 207 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) |
| 208 | { |
| 209 | ++*pos; |
| 210 | return c_start(m, pos); |
| 211 | } |
| 212 | |
| 213 | static void c_stop(struct seq_file *m, void *v) |
| 214 | { |
| 215 | } |
| 216 | |
| 217 | const struct seq_operations cpuinfo_op = { |
| 218 | .start = c_start, |
| 219 | .next = c_next, |
| 220 | .stop = c_stop, |
| 221 | .show = show_cpuinfo, |
| 222 | }; |
| 223 | |