| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame^] | 1 | /* |
| 2 | * This file contains the processor specific definitions |
| 3 | * of the TI DM644x, DM355, DM365, and DM646x. |
| 4 | * |
| 5 | * Copyright (C) 2011 Texas Instruments Incorporated |
| 6 | * Copyright (c) 2007 Deep Root Systems, LLC |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation version 2. |
| 11 | * |
| 12 | * This program is distributed "as is" WITHOUT ANY WARRANTY of any |
| 13 | * kind, whether express or implied; without even the implied warranty |
| 14 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | */ |
| 17 | #ifndef __DAVINCI_H |
| 18 | #define __DAVINCI_H |
| 19 | |
| 20 | #include <linux/clk.h> |
| 21 | #include <linux/videodev2.h> |
| 22 | #include <linux/davinci_emac.h> |
| 23 | #include <linux/platform_device.h> |
| 24 | #include <linux/spi/spi.h> |
| 25 | #include <linux/platform_data/davinci_asp.h> |
| 26 | #include <linux/platform_data/edma.h> |
| 27 | #include <linux/platform_data/keyscan-davinci.h> |
| 28 | #include <mach/hardware.h> |
| 29 | |
| 30 | #include <media/davinci/vpfe_capture.h> |
| 31 | #include <media/davinci/vpif_types.h> |
| 32 | #include <media/davinci/vpss.h> |
| 33 | #include <media/davinci/vpbe_types.h> |
| 34 | #include <media/davinci/vpbe_venc.h> |
| 35 | #include <media/davinci/vpbe.h> |
| 36 | #include <media/davinci/vpbe_osd.h> |
| 37 | |
| 38 | #define DAVINCI_PLL1_BASE 0x01c40800 |
| 39 | #define DAVINCI_PLL2_BASE 0x01c40c00 |
| 40 | #define DAVINCI_PWR_SLEEP_CNTRL_BASE 0x01c41000 |
| 41 | |
| 42 | #define DAVINCI_SYSTEM_MODULE_BASE 0x01c40000 |
| 43 | #define SYSMOD_VDAC_CONFIG 0x2c |
| 44 | #define SYSMOD_VIDCLKCTL 0x38 |
| 45 | #define SYSMOD_VPSS_CLKCTL 0x44 |
| 46 | #define SYSMOD_VDD3P3VPWDN 0x48 |
| 47 | #define SYSMOD_VSCLKDIS 0x6c |
| 48 | #define SYSMOD_PUPDCTL1 0x7c |
| 49 | |
| 50 | /* VPSS CLKCTL bit definitions */ |
| 51 | #define VPSS_MUXSEL_EXTCLK_ENABLE BIT(1) |
| 52 | #define VPSS_VENCCLKEN_ENABLE BIT(3) |
| 53 | #define VPSS_DACCLKEN_ENABLE BIT(4) |
| 54 | #define VPSS_PLLC2SYSCLK5_ENABLE BIT(5) |
| 55 | |
| 56 | extern void __iomem *davinci_sysmod_base; |
| 57 | #define DAVINCI_SYSMOD_VIRT(x) (davinci_sysmod_base + (x)) |
| 58 | void davinci_map_sysmod(void); |
| 59 | |
| 60 | #define DAVINCI_GPIO_BASE 0x01C67000 |
| 61 | int davinci_gpio_register(struct resource *res, int size, void *pdata); |
| 62 | |
| 63 | /* DM355 base addresses */ |
| 64 | #define DM355_ASYNC_EMIF_CONTROL_BASE 0x01e10000 |
| 65 | #define DM355_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 |
| 66 | |
| 67 | #define ASP1_TX_EVT_EN 1 |
| 68 | #define ASP1_RX_EVT_EN 2 |
| 69 | |
| 70 | /* DM365 base addresses */ |
| 71 | #define DM365_ASYNC_EMIF_CONTROL_BASE 0x01d10000 |
| 72 | #define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 |
| 73 | #define DM365_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 |
| 74 | |
| 75 | /* DM644x base addresses */ |
| 76 | #define DM644X_ASYNC_EMIF_CONTROL_BASE 0x01e00000 |
| 77 | #define DM644X_ASYNC_EMIF_DATA_CE0_BASE 0x02000000 |
| 78 | #define DM644X_ASYNC_EMIF_DATA_CE1_BASE 0x04000000 |
| 79 | #define DM644X_ASYNC_EMIF_DATA_CE2_BASE 0x06000000 |
| 80 | #define DM644X_ASYNC_EMIF_DATA_CE3_BASE 0x08000000 |
| 81 | |
| 82 | /* DM646x base addresses */ |
| 83 | #define DM646X_ASYNC_EMIF_CONTROL_BASE 0x20008000 |
| 84 | #define DM646X_ASYNC_EMIF_CS2_SPACE_BASE 0x42000000 |
| 85 | |
| 86 | int davinci_init_wdt(void); |
| 87 | |
| 88 | /* DM355 function declarations */ |
| 89 | void dm355_init(void); |
| 90 | void dm355_init_time(void); |
| 91 | void dm355_register_clocks(void); |
| 92 | void dm355_init_spi0(unsigned chipselect_mask, |
| 93 | const struct spi_board_info *info, unsigned len); |
| 94 | void dm355_init_asp1(u32 evt_enable); |
| 95 | int dm355_init_video(struct vpfe_config *, struct vpbe_config *); |
| 96 | int dm355_gpio_register(void); |
| 97 | |
| 98 | /* DM365 function declarations */ |
| 99 | void dm365_init(void); |
| 100 | void dm365_init_time(void); |
| 101 | void dm365_register_clocks(void); |
| 102 | void dm365_init_asp(void); |
| 103 | void dm365_init_vc(void); |
| 104 | void dm365_init_ks(struct davinci_ks_platform_data *pdata); |
| 105 | void dm365_init_rtc(void); |
| 106 | void dm365_init_spi0(unsigned chipselect_mask, |
| 107 | const struct spi_board_info *info, unsigned len); |
| 108 | int dm365_init_video(struct vpfe_config *, struct vpbe_config *); |
| 109 | int dm365_gpio_register(void); |
| 110 | |
| 111 | /* DM644x function declarations */ |
| 112 | void dm644x_init(void); |
| 113 | void dm644x_init_devices(void); |
| 114 | void dm644x_init_time(void); |
| 115 | void dm644x_register_clocks(void); |
| 116 | void dm644x_init_asp(void); |
| 117 | int dm644x_init_video(struct vpfe_config *, struct vpbe_config *); |
| 118 | int dm644x_gpio_register(void); |
| 119 | |
| 120 | /* DM646x function declarations */ |
| 121 | void dm646x_init(void); |
| 122 | void dm646x_init_time(unsigned long ref_clk_rate, unsigned long aux_clkin_rate); |
| 123 | void dm646x_register_clocks(void); |
| 124 | void dm646x_init_mcasp0(struct snd_platform_data *pdata); |
| 125 | void dm646x_init_mcasp1(struct snd_platform_data *pdata); |
| 126 | int dm646x_init_edma(struct edma_rsv_info *rsv); |
| 127 | void dm646x_video_init(void); |
| 128 | void dm646x_setup_vpif(struct vpif_display_config *, |
| 129 | struct vpif_capture_config *); |
| 130 | int dm646x_gpio_register(void); |
| 131 | |
| 132 | extern struct platform_device dm365_serial_device[]; |
| 133 | extern struct platform_device dm355_serial_device[]; |
| 134 | extern struct platform_device dm644x_serial_device[]; |
| 135 | extern struct platform_device dm646x_serial_device[]; |
| 136 | #endif /*__DAVINCI_H */ |