Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame^] | 1 | Kernel driver i2c-i801 |
| 2 | |
| 3 | Supported adapters: |
| 4 | * Intel 82801AA and 82801AB (ICH and ICH0 - part of the |
| 5 | '810' and '810E' chipsets) |
| 6 | * Intel 82801BA (ICH2 - part of the '815E' chipset) |
| 7 | * Intel 82801CA/CAM (ICH3) |
| 8 | * Intel 82801DB (ICH4) (HW PEC supported) |
| 9 | * Intel 82801EB/ER (ICH5) (HW PEC supported) |
| 10 | * Intel 6300ESB |
| 11 | * Intel 82801FB/FR/FW/FRW (ICH6) |
| 12 | * Intel 82801G (ICH7) |
| 13 | * Intel 631xESB/632xESB (ESB2) |
| 14 | * Intel 82801H (ICH8) |
| 15 | * Intel 82801I (ICH9) |
| 16 | * Intel EP80579 (Tolapai) |
| 17 | * Intel 82801JI (ICH10) |
| 18 | * Intel 5/3400 Series (PCH) |
| 19 | * Intel 6 Series (PCH) |
| 20 | * Intel Patsburg (PCH) |
| 21 | * Intel DH89xxCC (PCH) |
| 22 | * Intel Panther Point (PCH) |
| 23 | * Intel Lynx Point (PCH) |
| 24 | * Intel Avoton (SOC) |
| 25 | * Intel Wellsburg (PCH) |
| 26 | * Intel Coleto Creek (PCH) |
| 27 | * Intel Wildcat Point (PCH) |
| 28 | * Intel BayTrail (SOC) |
| 29 | * Intel Braswell (SOC) |
| 30 | * Intel Sunrise Point (PCH) |
| 31 | * Intel Kaby Lake (PCH) |
| 32 | * Intel DNV (SOC) |
| 33 | * Intel Broxton (SOC) |
| 34 | * Intel Lewisburg (PCH) |
| 35 | * Intel Gemini Lake (SOC) |
| 36 | * Intel Cannon Lake (PCH) |
| 37 | * Intel Cedar Fork (PCH) |
| 38 | * Intel Ice Lake (PCH) |
| 39 | Datasheets: Publicly available at the Intel website |
| 40 | |
| 41 | On Intel Patsburg and later chipsets, both the normal host SMBus controller |
| 42 | and the additional 'Integrated Device Function' controllers are supported. |
| 43 | |
| 44 | Authors: |
| 45 | Mark Studebaker <mdsxyz123@yahoo.com> |
| 46 | Jean Delvare <jdelvare@suse.de> |
| 47 | |
| 48 | |
| 49 | Module Parameters |
| 50 | ----------------- |
| 51 | |
| 52 | * disable_features (bit vector) |
| 53 | Disable selected features normally supported by the device. This makes it |
| 54 | possible to work around possible driver or hardware bugs if the feature in |
| 55 | question doesn't work as intended for whatever reason. Bit values: |
| 56 | 0x01 disable SMBus PEC |
| 57 | 0x02 disable the block buffer |
| 58 | 0x08 disable the I2C block read functionality |
| 59 | 0x10 don't use interrupts |
| 60 | |
| 61 | |
| 62 | Description |
| 63 | ----------- |
| 64 | |
| 65 | The ICH (properly known as the 82801AA), ICH0 (82801AB), ICH2 (82801BA), |
| 66 | ICH3 (82801CA/CAM) and later devices (PCH) are Intel chips that are a part of |
| 67 | Intel's '810' chipset for Celeron-based PCs, '810E' chipset for |
| 68 | Pentium-based PCs, '815E' chipset, and others. |
| 69 | |
| 70 | The ICH chips contain at least SEVEN separate PCI functions in TWO logical |
| 71 | PCI devices. An output of lspci will show something similar to the |
| 72 | following: |
| 73 | |
| 74 | 00:1e.0 PCI bridge: Intel Corporation: Unknown device 2418 (rev 01) |
| 75 | 00:1f.0 ISA bridge: Intel Corporation: Unknown device 2410 (rev 01) |
| 76 | 00:1f.1 IDE interface: Intel Corporation: Unknown device 2411 (rev 01) |
| 77 | 00:1f.2 USB Controller: Intel Corporation: Unknown device 2412 (rev 01) |
| 78 | 00:1f.3 Unknown class [0c05]: Intel Corporation: Unknown device 2413 (rev 01) |
| 79 | |
| 80 | The SMBus controller is function 3 in device 1f. Class 0c05 is SMBus Serial |
| 81 | Controller. |
| 82 | |
| 83 | The ICH chips are quite similar to Intel's PIIX4 chip, at least in the |
| 84 | SMBus controller. |
| 85 | |
| 86 | |
| 87 | Process Call Support |
| 88 | -------------------- |
| 89 | |
| 90 | Not supported. |
| 91 | |
| 92 | |
| 93 | I2C Block Read Support |
| 94 | ---------------------- |
| 95 | |
| 96 | I2C block read is supported on the 82801EB (ICH5) and later chips. |
| 97 | |
| 98 | |
| 99 | SMBus 2.0 Support |
| 100 | ----------------- |
| 101 | |
| 102 | The 82801DB (ICH4) and later chips support several SMBus 2.0 features. |
| 103 | |
| 104 | |
| 105 | Interrupt Support |
| 106 | ----------------- |
| 107 | |
| 108 | PCI interrupt support is supported on the 82801EB (ICH5) and later chips. |
| 109 | |
| 110 | |
| 111 | Hidden ICH SMBus |
| 112 | ---------------- |
| 113 | |
| 114 | If your system has an Intel ICH south bridge, but you do NOT see the |
| 115 | SMBus device at 00:1f.3 in lspci, and you can't figure out any way in the |
| 116 | BIOS to enable it, it means it has been hidden by the BIOS code. Asus is |
| 117 | well known for first doing this on their P4B motherboard, and many other |
| 118 | boards after that. Some vendor machines are affected as well. |
| 119 | |
| 120 | The first thing to try is the "i2c_ec" ACPI driver. It could be that the |
| 121 | SMBus was hidden on purpose because it'll be driven by ACPI. If the |
| 122 | i2c_ec driver works for you, just forget about the i2c-i801 driver and |
| 123 | don't try to unhide the ICH SMBus. Even if i2c_ec doesn't work, you |
| 124 | better make sure that the SMBus isn't used by the ACPI code. Try loading |
| 125 | the "fan" and "thermal" drivers, and check in /proc/acpi/fan and |
| 126 | /proc/acpi/thermal_zone. If you find anything there, it's likely that |
| 127 | the ACPI is accessing the SMBus and it's safer not to unhide it. Only |
| 128 | once you are certain that ACPI isn't using the SMBus, you can attempt |
| 129 | to unhide it. |
| 130 | |
| 131 | In order to unhide the SMBus, we need to change the value of a PCI |
| 132 | register before the kernel enumerates the PCI devices. This is done in |
| 133 | drivers/pci/quirks.c, where all affected boards must be listed (see |
| 134 | function asus_hides_smbus_hostbridge.) If the SMBus device is missing, |
| 135 | and you think there's something interesting on the SMBus (e.g. a |
| 136 | hardware monitoring chip), you need to add your board to the list. |
| 137 | |
| 138 | The motherboard is identified using the subvendor and subdevice IDs of the |
| 139 | host bridge PCI device. Get yours with "lspci -n -v -s 00:00.0": |
| 140 | |
| 141 | 00:00.0 Class 0600: 8086:2570 (rev 02) |
| 142 | Subsystem: 1043:80f2 |
| 143 | Flags: bus master, fast devsel, latency 0 |
| 144 | Memory at fc000000 (32-bit, prefetchable) [size=32M] |
| 145 | Capabilities: [e4] #09 [2106] |
| 146 | Capabilities: [a0] AGP version 3.0 |
| 147 | |
| 148 | Here the host bridge ID is 2570 (82865G/PE/P), the subvendor ID is 1043 |
| 149 | (Asus) and the subdevice ID is 80f2 (P4P800-X). You can find the symbolic |
| 150 | names for the bridge ID and the subvendor ID in include/linux/pci_ids.h, |
| 151 | and then add a case for your subdevice ID at the right place in |
| 152 | drivers/pci/quirks.c. Then please give it very good testing, to make sure |
| 153 | that the unhidden SMBus doesn't conflict with e.g. ACPI. |
| 154 | |
| 155 | If it works, proves useful (i.e. there are usable chips on the SMBus) |
| 156 | and seems safe, please submit a patch for inclusion into the kernel. |
| 157 | |
| 158 | Note: There's a useful script in lm_sensors 2.10.2 and later, named |
| 159 | unhide_ICH_SMBus (in prog/hotplug), which uses the fakephp driver to |
| 160 | temporarily unhide the SMBus without having to patch and recompile your |
| 161 | kernel. It's very convenient if you just want to check if there's |
| 162 | anything interesting on your hidden ICH SMBus. |
| 163 | |
| 164 | |
| 165 | ********************** |
| 166 | The lm_sensors project gratefully acknowledges the support of Texas |
| 167 | Instruments in the initial development of this driver. |
| 168 | |
| 169 | The lm_sensors project gratefully acknowledges the support of Intel in the |
| 170 | development of SMBus 2.0 / ICH4 features of this driver. |