| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | /* |
| 2 | * skl-i2s.h - i2s blob mapping |
| 3 | * |
| 4 | * Copyright (C) 2017 Intel Corp |
| 5 | * Author: Subhransu S. Prusty < subhransu.s.prusty@intel.com> |
| 6 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; version 2 of the License. |
| 10 | * |
| 11 | * This program is distributed in the hope that it will be useful, but |
| 12 | * WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * General Public License for more details. |
| 15 | * |
| 16 | * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 17 | * |
| 18 | */ |
| 19 | |
| 20 | #ifndef __SOUND_SOC_SKL_I2S_H |
| 21 | #define __SOUND_SOC_SKL_I2S_H |
| 22 | |
| 23 | #define SKL_I2S_MAX_TIME_SLOTS 8 |
| 24 | #define SKL_MCLK_DIV_CLK_SRC_MASK GENMASK(17, 16) |
| 25 | |
| 26 | #define SKL_MNDSS_DIV_CLK_SRC_MASK GENMASK(21, 20) |
| 27 | #define SKL_SHIFT(x) (ffs(x) - 1) |
| 28 | #define SKL_MCLK_DIV_RATIO_MASK GENMASK(11, 0) |
| 29 | |
| 30 | #define is_legacy_blob(x) (x.signature != 0xEE) |
| 31 | #define ext_to_legacy_blob(i2s_config_blob_ext) \ |
| 32 | ((struct skl_i2s_config_blob_legacy *) i2s_config_blob_ext) |
| 33 | |
| 34 | #define get_clk_src(mclk, mask) \ |
| 35 | ((mclk.mdivctrl & mask) >> SKL_SHIFT(mask)) |
| 36 | struct skl_i2s_config { |
| 37 | u32 ssc0; |
| 38 | u32 ssc1; |
| 39 | u32 sscto; |
| 40 | u32 sspsp; |
| 41 | u32 sstsa; |
| 42 | u32 ssrsa; |
| 43 | u32 ssc2; |
| 44 | u32 sspsp2; |
| 45 | u32 ssc3; |
| 46 | u32 ssioc; |
| 47 | } __packed; |
| 48 | |
| 49 | struct skl_i2s_config_mclk { |
| 50 | u32 mdivctrl; |
| 51 | u32 mdivr; |
| 52 | }; |
| 53 | |
| 54 | struct skl_i2s_config_mclk_ext { |
| 55 | u32 mdivctrl; |
| 56 | u32 mdivr_count; |
| 57 | u32 mdivr[0]; |
| 58 | } __packed; |
| 59 | |
| 60 | struct skl_i2s_config_blob_signature { |
| 61 | u32 minor_ver : 8; |
| 62 | u32 major_ver : 8; |
| 63 | u32 resvdz : 8; |
| 64 | u32 signature : 8; |
| 65 | } __packed; |
| 66 | |
| 67 | struct skl_i2s_config_blob_header { |
| 68 | struct skl_i2s_config_blob_signature sig; |
| 69 | u32 size; |
| 70 | }; |
| 71 | |
| 72 | /** |
| 73 | * struct skl_i2s_config_blob_legacy - Structure defines I2S Gateway |
| 74 | * configuration legacy blob |
| 75 | * |
| 76 | * @gtw_attr: Gateway attribute for the I2S Gateway |
| 77 | * @tdm_ts_group: TDM slot mapping against channels in the Gateway. |
| 78 | * @i2s_cfg: I2S HW registers |
| 79 | * @mclk: MCLK clock source and divider values |
| 80 | */ |
| 81 | struct skl_i2s_config_blob_legacy { |
| 82 | u32 gtw_attr; |
| 83 | u32 tdm_ts_group[SKL_I2S_MAX_TIME_SLOTS]; |
| 84 | struct skl_i2s_config i2s_cfg; |
| 85 | struct skl_i2s_config_mclk mclk; |
| 86 | }; |
| 87 | |
| 88 | struct skl_i2s_config_blob_ext { |
| 89 | u32 gtw_attr; |
| 90 | struct skl_i2s_config_blob_header hdr; |
| 91 | u32 tdm_ts_group[SKL_I2S_MAX_TIME_SLOTS]; |
| 92 | struct skl_i2s_config i2s_cfg; |
| 93 | struct skl_i2s_config_mclk_ext mclk; |
| 94 | } __packed; |
| 95 | #endif /* __SOUND_SOC_SKL_I2S_H */ |