| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | /* |
| 2 | * arch/arm/include/debug/ks8695.S |
| 3 | * |
| 4 | * Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk> |
| 5 | * Copyright (C) 2006 Simtec Electronics |
| 6 | * |
| 7 | * KS8695 - Debug macros |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License version 2 as |
| 11 | * published by the Free Software Foundation. |
| 12 | */ |
| 13 | |
| 14 | #define KS8695_UART_PA 0x03ffe000 |
| 15 | #define KS8695_UART_VA 0xf00fe000 |
| 16 | #define KS8695_URTH (0x04) |
| 17 | #define KS8695_URLS (0x14) |
| 18 | #define URLS_URTE (1 << 6) |
| 19 | #define URLS_URTHRE (1 << 5) |
| 20 | |
| 21 | .macro addruart, rp, rv, tmp |
| 22 | ldr \rp, =KS8695_UART_PA @ physical base address |
| 23 | ldr \rv, =KS8695_UART_VA @ virtual base address |
| 24 | .endm |
| 25 | |
| 26 | .macro senduart, rd, rx |
| 27 | str \rd, [\rx, #KS8695_URTH] @ Write to Transmit Holding Register |
| 28 | .endm |
| 29 | |
| 30 | .macro busyuart, rd, rx |
| 31 | 1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register |
| 32 | tst \rd, #URLS_URTE @ Holding & Shift registers empty? |
| 33 | beq 1001b |
| 34 | .endm |
| 35 | |
| 36 | .macro waituart, rd, rx |
| 37 | 1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register |
| 38 | tst \rd, #URLS_URTHRE @ Holding Register empty? |
| 39 | beq 1001b |
| 40 | .endm |