blob: 033ce74f02e812b9707138209dd7c112d6482b1f [file] [log] [blame]
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright 2016 Broadcom
4 */
5#ifndef DRIVERS_PCI_ECAM_H
6#define DRIVERS_PCI_ECAM_H
7
8#include <linux/pci.h>
9#include <linux/kernel.h>
10#include <linux/platform_device.h>
11
12/*
13 * struct to hold pci ops and bus shift of the config window
14 * for a PCI controller.
15 */
16struct pci_config_window;
17struct pci_ecam_ops {
18 unsigned int bus_shift;
19 struct pci_ops pci_ops;
20 int (*init)(struct pci_config_window *);
21};
22
23/*
24 * struct to hold the mappings of a config space window. This
25 * is expected to be used as sysdata for PCI controllers that
26 * use ECAM.
27 */
28struct pci_config_window {
29 struct resource res;
30 struct resource busr;
31 void *priv;
Olivier Deprez157378f2022-04-04 15:47:50 +020032 const struct pci_ecam_ops *ops;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000033 union {
34 void __iomem *win; /* 64-bit single mapping */
35 void __iomem **winp; /* 32-bit per-bus mapping */
36 };
37 struct device *parent;/* ECAM res was from this dev */
38};
39
40/* create and free pci_config_window */
41struct pci_config_window *pci_ecam_create(struct device *dev,
42 struct resource *cfgres, struct resource *busr,
Olivier Deprez157378f2022-04-04 15:47:50 +020043 const struct pci_ecam_ops *ops);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000044void pci_ecam_free(struct pci_config_window *cfg);
45
46/* map_bus when ->sysdata is an instance of pci_config_window */
47void __iomem *pci_ecam_map_bus(struct pci_bus *bus, unsigned int devfn,
48 int where);
49/* default ECAM ops */
Olivier Deprez157378f2022-04-04 15:47:50 +020050extern const struct pci_ecam_ops pci_generic_ecam_ops;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000051
52#if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS)
Olivier Deprez157378f2022-04-04 15:47:50 +020053extern const struct pci_ecam_ops pci_32b_ops; /* 32-bit accesses only */
54extern const struct pci_ecam_ops pci_32b_read_ops; /* 32-bit read only */
55extern const struct pci_ecam_ops hisi_pcie_ops; /* HiSilicon */
56extern const struct pci_ecam_ops thunder_pem_ecam_ops; /* Cavium ThunderX 1.x & 2.x */
57extern const struct pci_ecam_ops pci_thunder_ecam_ops; /* Cavium ThunderX 1.x */
58extern const struct pci_ecam_ops xgene_v1_pcie_ecam_ops; /* APM X-Gene PCIe v1 */
59extern const struct pci_ecam_ops xgene_v2_pcie_ecam_ops; /* APM X-Gene PCIe v2.x */
60extern const struct pci_ecam_ops al_pcie_ops; /* Amazon Annapurna Labs PCIe */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000061#endif
62
Olivier Deprez157378f2022-04-04 15:47:50 +020063#if IS_ENABLED(CONFIG_PCI_HOST_COMMON)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000064/* for DT-based PCI controllers that support ECAM */
Olivier Deprez157378f2022-04-04 15:47:50 +020065int pci_host_common_probe(struct platform_device *pdev);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000066int pci_host_common_remove(struct platform_device *pdev);
67#endif
68#endif