David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * polling/bitbanging SPI master controller driver utilities |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <linux/spinlock.h> |
| 7 | #include <linux/workqueue.h> |
| 8 | #include <linux/interrupt.h> |
| 9 | #include <linux/module.h> |
| 10 | #include <linux/delay.h> |
| 11 | #include <linux/errno.h> |
| 12 | #include <linux/platform_device.h> |
| 13 | #include <linux/slab.h> |
| 14 | |
| 15 | #include <linux/spi/spi.h> |
| 16 | #include <linux/spi/spi_bitbang.h> |
| 17 | |
| 18 | #define SPI_BITBANG_CS_DELAY 100 |
| 19 | |
| 20 | |
| 21 | /*----------------------------------------------------------------------*/ |
| 22 | |
| 23 | /* |
| 24 | * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support. |
| 25 | * Use this for GPIO or shift-register level hardware APIs. |
| 26 | * |
| 27 | * spi_bitbang_cs is in spi_device->controller_state, which is unavailable |
| 28 | * to glue code. These bitbang setup() and cleanup() routines are always |
| 29 | * used, though maybe they're called from controller-aware code. |
| 30 | * |
| 31 | * chipselect() and friends may use spi_device->controller_data and |
| 32 | * controller registers as appropriate. |
| 33 | * |
| 34 | * |
| 35 | * NOTE: SPI controller pins can often be used as GPIO pins instead, |
| 36 | * which means you could use a bitbang driver either to get hardware |
| 37 | * working quickly, or testing for differences that aren't speed related. |
| 38 | */ |
| 39 | |
| 40 | struct spi_bitbang_cs { |
| 41 | unsigned nsecs; /* (clock cycle time)/2 */ |
| 42 | u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs, |
| 43 | u32 word, u8 bits, unsigned flags); |
| 44 | unsigned (*txrx_bufs)(struct spi_device *, |
| 45 | u32 (*txrx_word)( |
| 46 | struct spi_device *spi, |
| 47 | unsigned nsecs, |
| 48 | u32 word, u8 bits, |
| 49 | unsigned flags), |
| 50 | unsigned, struct spi_transfer *, |
| 51 | unsigned); |
| 52 | }; |
| 53 | |
| 54 | static unsigned bitbang_txrx_8( |
| 55 | struct spi_device *spi, |
| 56 | u32 (*txrx_word)(struct spi_device *spi, |
| 57 | unsigned nsecs, |
| 58 | u32 word, u8 bits, |
| 59 | unsigned flags), |
| 60 | unsigned ns, |
| 61 | struct spi_transfer *t, |
| 62 | unsigned flags |
| 63 | ) { |
| 64 | unsigned bits = t->bits_per_word; |
| 65 | unsigned count = t->len; |
| 66 | const u8 *tx = t->tx_buf; |
| 67 | u8 *rx = t->rx_buf; |
| 68 | |
| 69 | while (likely(count > 0)) { |
| 70 | u8 word = 0; |
| 71 | |
| 72 | if (tx) |
| 73 | word = *tx++; |
| 74 | word = txrx_word(spi, ns, word, bits, flags); |
| 75 | if (rx) |
| 76 | *rx++ = word; |
| 77 | count -= 1; |
| 78 | } |
| 79 | return t->len - count; |
| 80 | } |
| 81 | |
| 82 | static unsigned bitbang_txrx_16( |
| 83 | struct spi_device *spi, |
| 84 | u32 (*txrx_word)(struct spi_device *spi, |
| 85 | unsigned nsecs, |
| 86 | u32 word, u8 bits, |
| 87 | unsigned flags), |
| 88 | unsigned ns, |
| 89 | struct spi_transfer *t, |
| 90 | unsigned flags |
| 91 | ) { |
| 92 | unsigned bits = t->bits_per_word; |
| 93 | unsigned count = t->len; |
| 94 | const u16 *tx = t->tx_buf; |
| 95 | u16 *rx = t->rx_buf; |
| 96 | |
| 97 | while (likely(count > 1)) { |
| 98 | u16 word = 0; |
| 99 | |
| 100 | if (tx) |
| 101 | word = *tx++; |
| 102 | word = txrx_word(spi, ns, word, bits, flags); |
| 103 | if (rx) |
| 104 | *rx++ = word; |
| 105 | count -= 2; |
| 106 | } |
| 107 | return t->len - count; |
| 108 | } |
| 109 | |
| 110 | static unsigned bitbang_txrx_32( |
| 111 | struct spi_device *spi, |
| 112 | u32 (*txrx_word)(struct spi_device *spi, |
| 113 | unsigned nsecs, |
| 114 | u32 word, u8 bits, |
| 115 | unsigned flags), |
| 116 | unsigned ns, |
| 117 | struct spi_transfer *t, |
| 118 | unsigned flags |
| 119 | ) { |
| 120 | unsigned bits = t->bits_per_word; |
| 121 | unsigned count = t->len; |
| 122 | const u32 *tx = t->tx_buf; |
| 123 | u32 *rx = t->rx_buf; |
| 124 | |
| 125 | while (likely(count > 3)) { |
| 126 | u32 word = 0; |
| 127 | |
| 128 | if (tx) |
| 129 | word = *tx++; |
| 130 | word = txrx_word(spi, ns, word, bits, flags); |
| 131 | if (rx) |
| 132 | *rx++ = word; |
| 133 | count -= 4; |
| 134 | } |
| 135 | return t->len - count; |
| 136 | } |
| 137 | |
| 138 | int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t) |
| 139 | { |
| 140 | struct spi_bitbang_cs *cs = spi->controller_state; |
| 141 | u8 bits_per_word; |
| 142 | u32 hz; |
| 143 | |
| 144 | if (t) { |
| 145 | bits_per_word = t->bits_per_word; |
| 146 | hz = t->speed_hz; |
| 147 | } else { |
| 148 | bits_per_word = 0; |
| 149 | hz = 0; |
| 150 | } |
| 151 | |
| 152 | /* spi_transfer level calls that work per-word */ |
| 153 | if (!bits_per_word) |
| 154 | bits_per_word = spi->bits_per_word; |
| 155 | if (bits_per_word <= 8) |
| 156 | cs->txrx_bufs = bitbang_txrx_8; |
| 157 | else if (bits_per_word <= 16) |
| 158 | cs->txrx_bufs = bitbang_txrx_16; |
| 159 | else if (bits_per_word <= 32) |
| 160 | cs->txrx_bufs = bitbang_txrx_32; |
| 161 | else |
| 162 | return -EINVAL; |
| 163 | |
| 164 | /* nsecs = (clock period)/2 */ |
| 165 | if (!hz) |
| 166 | hz = spi->max_speed_hz; |
| 167 | if (hz) { |
| 168 | cs->nsecs = (1000000000/2) / hz; |
| 169 | if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000)) |
| 170 | return -EINVAL; |
| 171 | } |
| 172 | |
| 173 | return 0; |
| 174 | } |
| 175 | EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer); |
| 176 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 177 | /* |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 178 | * spi_bitbang_setup - default setup for per-word I/O loops |
| 179 | */ |
| 180 | int spi_bitbang_setup(struct spi_device *spi) |
| 181 | { |
| 182 | struct spi_bitbang_cs *cs = spi->controller_state; |
| 183 | struct spi_bitbang *bitbang; |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 184 | bool initial_setup = false; |
| 185 | int retval; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 186 | |
| 187 | bitbang = spi_master_get_devdata(spi->master); |
| 188 | |
| 189 | if (!cs) { |
| 190 | cs = kzalloc(sizeof(*cs), GFP_KERNEL); |
| 191 | if (!cs) |
| 192 | return -ENOMEM; |
| 193 | spi->controller_state = cs; |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 194 | initial_setup = true; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 195 | } |
| 196 | |
| 197 | /* per-word shift register access, in hardware or bitbanging */ |
| 198 | cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)]; |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 199 | if (!cs->txrx_word) { |
| 200 | retval = -EINVAL; |
| 201 | goto err_free; |
| 202 | } |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 203 | |
| 204 | if (bitbang->setup_transfer) { |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 205 | retval = bitbang->setup_transfer(spi, NULL); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 206 | if (retval < 0) |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 207 | goto err_free; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 208 | } |
| 209 | |
| 210 | dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs); |
| 211 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 212 | return 0; |
Olivier Deprez | 0e64123 | 2021-09-23 10:07:05 +0200 | [diff] [blame] | 213 | |
| 214 | err_free: |
| 215 | if (initial_setup) |
| 216 | kfree(cs); |
| 217 | return retval; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 218 | } |
| 219 | EXPORT_SYMBOL_GPL(spi_bitbang_setup); |
| 220 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 221 | /* |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 222 | * spi_bitbang_cleanup - default cleanup for per-word I/O loops |
| 223 | */ |
| 224 | void spi_bitbang_cleanup(struct spi_device *spi) |
| 225 | { |
| 226 | kfree(spi->controller_state); |
| 227 | } |
| 228 | EXPORT_SYMBOL_GPL(spi_bitbang_cleanup); |
| 229 | |
| 230 | static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t) |
| 231 | { |
| 232 | struct spi_bitbang_cs *cs = spi->controller_state; |
| 233 | unsigned nsecs = cs->nsecs; |
| 234 | struct spi_bitbang *bitbang; |
| 235 | |
| 236 | bitbang = spi_master_get_devdata(spi->master); |
| 237 | if (bitbang->set_line_direction) { |
| 238 | int err; |
| 239 | |
| 240 | err = bitbang->set_line_direction(spi, !!(t->tx_buf)); |
| 241 | if (err < 0) |
| 242 | return err; |
| 243 | } |
| 244 | |
| 245 | if (spi->mode & SPI_3WIRE) { |
| 246 | unsigned flags; |
| 247 | |
| 248 | flags = t->tx_buf ? SPI_MASTER_NO_RX : SPI_MASTER_NO_TX; |
| 249 | return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, flags); |
| 250 | } |
| 251 | return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, 0); |
| 252 | } |
| 253 | |
| 254 | /*----------------------------------------------------------------------*/ |
| 255 | |
| 256 | /* |
| 257 | * SECOND PART ... simple transfer queue runner. |
| 258 | * |
| 259 | * This costs a task context per controller, running the queue by |
| 260 | * performing each transfer in sequence. Smarter hardware can queue |
| 261 | * several DMA transfers at once, and process several controller queues |
| 262 | * in parallel; this driver doesn't match such hardware very well. |
| 263 | * |
| 264 | * Drivers can provide word-at-a-time i/o primitives, or provide |
| 265 | * transfer-at-a-time ones to leverage dma or fifo hardware. |
| 266 | */ |
| 267 | |
| 268 | static int spi_bitbang_prepare_hardware(struct spi_master *spi) |
| 269 | { |
| 270 | struct spi_bitbang *bitbang; |
| 271 | |
| 272 | bitbang = spi_master_get_devdata(spi); |
| 273 | |
| 274 | mutex_lock(&bitbang->lock); |
| 275 | bitbang->busy = 1; |
| 276 | mutex_unlock(&bitbang->lock); |
| 277 | |
| 278 | return 0; |
| 279 | } |
| 280 | |
| 281 | static int spi_bitbang_transfer_one(struct spi_master *master, |
| 282 | struct spi_device *spi, |
| 283 | struct spi_transfer *transfer) |
| 284 | { |
| 285 | struct spi_bitbang *bitbang = spi_master_get_devdata(master); |
| 286 | int status = 0; |
| 287 | |
| 288 | if (bitbang->setup_transfer) { |
| 289 | status = bitbang->setup_transfer(spi, transfer); |
| 290 | if (status < 0) |
| 291 | goto out; |
| 292 | } |
| 293 | |
| 294 | if (transfer->len) |
| 295 | status = bitbang->txrx_bufs(spi, transfer); |
| 296 | |
| 297 | if (status == transfer->len) |
| 298 | status = 0; |
| 299 | else if (status >= 0) |
| 300 | status = -EREMOTEIO; |
| 301 | |
| 302 | out: |
| 303 | spi_finalize_current_transfer(master); |
| 304 | |
| 305 | return status; |
| 306 | } |
| 307 | |
| 308 | static int spi_bitbang_unprepare_hardware(struct spi_master *spi) |
| 309 | { |
| 310 | struct spi_bitbang *bitbang; |
| 311 | |
| 312 | bitbang = spi_master_get_devdata(spi); |
| 313 | |
| 314 | mutex_lock(&bitbang->lock); |
| 315 | bitbang->busy = 0; |
| 316 | mutex_unlock(&bitbang->lock); |
| 317 | |
| 318 | return 0; |
| 319 | } |
| 320 | |
| 321 | static void spi_bitbang_set_cs(struct spi_device *spi, bool enable) |
| 322 | { |
| 323 | struct spi_bitbang *bitbang = spi_master_get_devdata(spi->master); |
| 324 | |
| 325 | /* SPI core provides CS high / low, but bitbang driver |
| 326 | * expects CS active |
| 327 | * spi device driver takes care of handling SPI_CS_HIGH |
| 328 | */ |
| 329 | enable = (!!(spi->mode & SPI_CS_HIGH) == enable); |
| 330 | |
| 331 | ndelay(SPI_BITBANG_CS_DELAY); |
| 332 | bitbang->chipselect(spi, enable ? BITBANG_CS_ACTIVE : |
| 333 | BITBANG_CS_INACTIVE); |
| 334 | ndelay(SPI_BITBANG_CS_DELAY); |
| 335 | } |
| 336 | |
| 337 | /*----------------------------------------------------------------------*/ |
| 338 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 339 | int spi_bitbang_init(struct spi_bitbang *bitbang) |
| 340 | { |
| 341 | struct spi_master *master = bitbang->master; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 342 | bool custom_cs; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 343 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 344 | if (!master) |
| 345 | return -EINVAL; |
| 346 | /* |
| 347 | * We only need the chipselect callback if we are actually using it. |
| 348 | * If we just use GPIO descriptors, it is surplus. If the |
| 349 | * SPI_MASTER_GPIO_SS flag is set, we always need to call the |
| 350 | * driver-specific chipselect routine. |
| 351 | */ |
| 352 | custom_cs = (!master->use_gpio_descriptors || |
| 353 | (master->flags & SPI_MASTER_GPIO_SS)); |
| 354 | |
| 355 | if (custom_cs && !bitbang->chipselect) |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 356 | return -EINVAL; |
| 357 | |
| 358 | mutex_init(&bitbang->lock); |
| 359 | |
| 360 | if (!master->mode_bits) |
| 361 | master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags; |
| 362 | |
| 363 | if (master->transfer || master->transfer_one_message) |
| 364 | return -EINVAL; |
| 365 | |
| 366 | master->prepare_transfer_hardware = spi_bitbang_prepare_hardware; |
| 367 | master->unprepare_transfer_hardware = spi_bitbang_unprepare_hardware; |
| 368 | master->transfer_one = spi_bitbang_transfer_one; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 369 | /* |
| 370 | * When using GPIO descriptors, the ->set_cs() callback doesn't even |
| 371 | * get called unless SPI_MASTER_GPIO_SS is set. |
| 372 | */ |
| 373 | if (custom_cs) |
| 374 | master->set_cs = spi_bitbang_set_cs; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 375 | |
| 376 | if (!bitbang->txrx_bufs) { |
| 377 | bitbang->use_dma = 0; |
| 378 | bitbang->txrx_bufs = spi_bitbang_bufs; |
| 379 | if (!master->setup) { |
| 380 | if (!bitbang->setup_transfer) |
| 381 | bitbang->setup_transfer = |
| 382 | spi_bitbang_setup_transfer; |
| 383 | master->setup = spi_bitbang_setup; |
| 384 | master->cleanup = spi_bitbang_cleanup; |
| 385 | } |
| 386 | } |
| 387 | |
| 388 | return 0; |
| 389 | } |
| 390 | EXPORT_SYMBOL_GPL(spi_bitbang_init); |
| 391 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 392 | /** |
| 393 | * spi_bitbang_start - start up a polled/bitbanging SPI master driver |
| 394 | * @bitbang: driver handle |
| 395 | * |
| 396 | * Caller should have zero-initialized all parts of the structure, and then |
| 397 | * provided callbacks for chip selection and I/O loops. If the master has |
| 398 | * a transfer method, its final step should call spi_bitbang_transfer; or, |
| 399 | * that's the default if the transfer routine is not initialized. It should |
| 400 | * also set up the bus number and number of chipselects. |
| 401 | * |
| 402 | * For i/o loops, provide callbacks either per-word (for bitbanging, or for |
| 403 | * hardware that basically exposes a shift register) or per-spi_transfer |
| 404 | * (which takes better advantage of hardware like fifos or DMA engines). |
| 405 | * |
| 406 | * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup, |
| 407 | * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi |
| 408 | * master methods. Those methods are the defaults if the bitbang->txrx_bufs |
| 409 | * routine isn't initialized. |
| 410 | * |
| 411 | * This routine registers the spi_master, which will process requests in a |
| 412 | * dedicated task, keeping IRQs unblocked most of the time. To stop |
| 413 | * processing those requests, call spi_bitbang_stop(). |
| 414 | * |
| 415 | * On success, this routine will take a reference to master. The caller is |
| 416 | * responsible for calling spi_bitbang_stop() to decrement the reference and |
| 417 | * spi_master_put() as counterpart of spi_alloc_master() to prevent a memory |
| 418 | * leak. |
| 419 | */ |
| 420 | int spi_bitbang_start(struct spi_bitbang *bitbang) |
| 421 | { |
| 422 | struct spi_master *master = bitbang->master; |
| 423 | int ret; |
| 424 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 425 | ret = spi_bitbang_init(bitbang); |
| 426 | if (ret) |
| 427 | return ret; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 428 | |
| 429 | /* driver may get busy before register() returns, especially |
| 430 | * if someone registered boardinfo for devices |
| 431 | */ |
| 432 | ret = spi_register_master(spi_master_get(master)); |
| 433 | if (ret) |
| 434 | spi_master_put(master); |
| 435 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 436 | return ret; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 437 | } |
| 438 | EXPORT_SYMBOL_GPL(spi_bitbang_start); |
| 439 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 440 | /* |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 441 | * spi_bitbang_stop - stops the task providing spi communication |
| 442 | */ |
| 443 | void spi_bitbang_stop(struct spi_bitbang *bitbang) |
| 444 | { |
| 445 | spi_unregister_master(bitbang->master); |
| 446 | } |
| 447 | EXPORT_SYMBOL_GPL(spi_bitbang_stop); |
| 448 | |
| 449 | MODULE_LICENSE("GPL"); |
| 450 | |