Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * Copyright 2020 NXP |
| 4 | */ |
| 5 | |
| 6 | #include <linux/mfd/syscon.h> |
| 7 | #include <linux/of.h> |
| 8 | #include <linux/of_address.h> |
| 9 | #include <linux/regmap.h> |
| 10 | #include <linux/slab.h> |
| 11 | #include <linux/sys_soc.h> |
| 12 | |
| 13 | #include <soc/imx/cpu.h> |
| 14 | #include <soc/imx/revision.h> |
| 15 | |
| 16 | #define OCOTP_UID_H 0x420 |
| 17 | #define OCOTP_UID_L 0x410 |
| 18 | |
| 19 | #define OCOTP_ULP_UID_1 0x4b0 |
| 20 | #define OCOTP_ULP_UID_2 0x4c0 |
| 21 | #define OCOTP_ULP_UID_3 0x4d0 |
| 22 | #define OCOTP_ULP_UID_4 0x4e0 |
| 23 | |
| 24 | static int __init imx_soc_device_init(void) |
| 25 | { |
| 26 | struct soc_device_attribute *soc_dev_attr; |
| 27 | const char *ocotp_compat = NULL; |
| 28 | struct soc_device *soc_dev; |
| 29 | struct device_node *root; |
| 30 | struct regmap *ocotp = NULL; |
| 31 | const char *soc_id; |
| 32 | u64 soc_uid = 0; |
| 33 | u32 val; |
| 34 | int ret; |
| 35 | |
| 36 | /* Return early if this is running on devices with different SoCs */ |
| 37 | if (!__mxc_cpu_type) |
| 38 | return 0; |
| 39 | |
| 40 | if (of_machine_is_compatible("fsl,ls1021a")) |
| 41 | return 0; |
| 42 | |
| 43 | soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); |
| 44 | if (!soc_dev_attr) |
| 45 | return -ENOMEM; |
| 46 | |
| 47 | soc_dev_attr->family = "Freescale i.MX"; |
| 48 | |
| 49 | root = of_find_node_by_path("/"); |
| 50 | ret = of_property_read_string(root, "model", &soc_dev_attr->machine); |
| 51 | of_node_put(root); |
| 52 | if (ret) |
| 53 | goto free_soc; |
| 54 | |
| 55 | switch (__mxc_cpu_type) { |
| 56 | case MXC_CPU_MX1: |
| 57 | soc_id = "i.MX1"; |
| 58 | break; |
| 59 | case MXC_CPU_MX21: |
| 60 | soc_id = "i.MX21"; |
| 61 | break; |
| 62 | case MXC_CPU_MX25: |
| 63 | soc_id = "i.MX25"; |
| 64 | break; |
| 65 | case MXC_CPU_MX27: |
| 66 | soc_id = "i.MX27"; |
| 67 | break; |
| 68 | case MXC_CPU_MX31: |
| 69 | soc_id = "i.MX31"; |
| 70 | break; |
| 71 | case MXC_CPU_MX35: |
| 72 | soc_id = "i.MX35"; |
| 73 | break; |
| 74 | case MXC_CPU_MX51: |
| 75 | soc_id = "i.MX51"; |
| 76 | break; |
| 77 | case MXC_CPU_MX53: |
| 78 | soc_id = "i.MX53"; |
| 79 | break; |
| 80 | case MXC_CPU_IMX6SL: |
| 81 | ocotp_compat = "fsl,imx6sl-ocotp"; |
| 82 | soc_id = "i.MX6SL"; |
| 83 | break; |
| 84 | case MXC_CPU_IMX6DL: |
| 85 | ocotp_compat = "fsl,imx6q-ocotp"; |
| 86 | soc_id = "i.MX6DL"; |
| 87 | break; |
| 88 | case MXC_CPU_IMX6SX: |
| 89 | ocotp_compat = "fsl,imx6sx-ocotp"; |
| 90 | soc_id = "i.MX6SX"; |
| 91 | break; |
| 92 | case MXC_CPU_IMX6Q: |
| 93 | ocotp_compat = "fsl,imx6q-ocotp"; |
| 94 | soc_id = "i.MX6Q"; |
| 95 | break; |
| 96 | case MXC_CPU_IMX6UL: |
| 97 | ocotp_compat = "fsl,imx6ul-ocotp"; |
| 98 | soc_id = "i.MX6UL"; |
| 99 | break; |
| 100 | case MXC_CPU_IMX6ULL: |
| 101 | ocotp_compat = "fsl,imx6ull-ocotp"; |
| 102 | soc_id = "i.MX6ULL"; |
| 103 | break; |
| 104 | case MXC_CPU_IMX6ULZ: |
| 105 | ocotp_compat = "fsl,imx6ull-ocotp"; |
| 106 | soc_id = "i.MX6ULZ"; |
| 107 | break; |
| 108 | case MXC_CPU_IMX6SLL: |
| 109 | ocotp_compat = "fsl,imx6sll-ocotp"; |
| 110 | soc_id = "i.MX6SLL"; |
| 111 | break; |
| 112 | case MXC_CPU_IMX7D: |
| 113 | ocotp_compat = "fsl,imx7d-ocotp"; |
| 114 | soc_id = "i.MX7D"; |
| 115 | break; |
| 116 | case MXC_CPU_IMX7ULP: |
| 117 | ocotp_compat = "fsl,imx7ulp-ocotp"; |
| 118 | soc_id = "i.MX7ULP"; |
| 119 | break; |
| 120 | case MXC_CPU_VF500: |
| 121 | ocotp_compat = "fsl,vf610-ocotp"; |
| 122 | soc_id = "VF500"; |
| 123 | break; |
| 124 | case MXC_CPU_VF510: |
| 125 | ocotp_compat = "fsl,vf610-ocotp"; |
| 126 | soc_id = "VF510"; |
| 127 | break; |
| 128 | case MXC_CPU_VF600: |
| 129 | ocotp_compat = "fsl,vf610-ocotp"; |
| 130 | soc_id = "VF600"; |
| 131 | break; |
| 132 | case MXC_CPU_VF610: |
| 133 | ocotp_compat = "fsl,vf610-ocotp"; |
| 134 | soc_id = "VF610"; |
| 135 | break; |
| 136 | default: |
| 137 | soc_id = "Unknown"; |
| 138 | } |
| 139 | soc_dev_attr->soc_id = soc_id; |
| 140 | |
| 141 | if (ocotp_compat) { |
| 142 | ocotp = syscon_regmap_lookup_by_compatible(ocotp_compat); |
| 143 | if (IS_ERR(ocotp)) |
| 144 | pr_err("%s: failed to find %s regmap!\n", __func__, ocotp_compat); |
| 145 | } |
| 146 | |
| 147 | if (!IS_ERR_OR_NULL(ocotp)) { |
| 148 | if (__mxc_cpu_type == MXC_CPU_IMX7ULP) { |
| 149 | regmap_read(ocotp, OCOTP_ULP_UID_4, &val); |
| 150 | soc_uid = val & 0xffff; |
| 151 | regmap_read(ocotp, OCOTP_ULP_UID_3, &val); |
| 152 | soc_uid <<= 16; |
| 153 | soc_uid |= val & 0xffff; |
| 154 | regmap_read(ocotp, OCOTP_ULP_UID_2, &val); |
| 155 | soc_uid <<= 16; |
| 156 | soc_uid |= val & 0xffff; |
| 157 | regmap_read(ocotp, OCOTP_ULP_UID_1, &val); |
| 158 | soc_uid <<= 16; |
| 159 | soc_uid |= val & 0xffff; |
| 160 | } else { |
| 161 | regmap_read(ocotp, OCOTP_UID_H, &val); |
| 162 | soc_uid = val; |
| 163 | regmap_read(ocotp, OCOTP_UID_L, &val); |
| 164 | soc_uid <<= 32; |
| 165 | soc_uid |= val; |
| 166 | } |
| 167 | } |
| 168 | |
| 169 | soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d.%d", |
| 170 | (imx_get_soc_revision() >> 4) & 0xf, |
| 171 | imx_get_soc_revision() & 0xf); |
| 172 | if (!soc_dev_attr->revision) { |
| 173 | ret = -ENOMEM; |
| 174 | goto free_soc; |
| 175 | } |
| 176 | |
| 177 | soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX", soc_uid); |
| 178 | if (!soc_dev_attr->serial_number) { |
| 179 | ret = -ENOMEM; |
| 180 | goto free_rev; |
| 181 | } |
| 182 | |
| 183 | soc_dev = soc_device_register(soc_dev_attr); |
| 184 | if (IS_ERR(soc_dev)) { |
| 185 | ret = PTR_ERR(soc_dev); |
| 186 | goto free_serial_number; |
| 187 | } |
| 188 | |
| 189 | return 0; |
| 190 | |
| 191 | free_serial_number: |
| 192 | kfree(soc_dev_attr->serial_number); |
| 193 | free_rev: |
| 194 | kfree(soc_dev_attr->revision); |
| 195 | free_soc: |
| 196 | kfree(soc_dev_attr); |
| 197 | return ret; |
| 198 | } |
| 199 | device_initcall(imx_soc_device_init); |