blob: 58c6382a2807caa293ed30da83ab0d4809c15463 [file] [log] [blame]
David Brazdil0f672f62019-12-10 10:32:29 +00001// SPDX-License-Identifier: GPL-2.0-or-later
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002/*
3 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
4 *
5 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
6 * Copyright (C) 2006 David Brownell (convert to new framework)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007 */
8
9/*
10 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
11 * That defined the register interface now provided by all PCs, some
12 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
13 * integrate an MC146818 clone in their southbridge, and boards use
14 * that instead of discrete clones like the DS12887 or M48T86. There
15 * are also clones that connect using the LPC bus.
16 *
17 * That register API is also used directly by various other drivers
18 * (notably for integrated NVRAM), infrastructure (x86 has code to
19 * bypass the RTC framework, directly reading the RTC during boot
20 * and updating minutes/seconds for systems using NTP synch) and
21 * utilities (like userspace 'hwclock', if no /dev node exists).
22 *
23 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
24 * interrupts disabled, holding the global rtc_lock, to exclude those
25 * other drivers and utilities on correctly configured systems.
26 */
27
28#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/init.h>
33#include <linux/interrupt.h>
34#include <linux/spinlock.h>
35#include <linux/platform_device.h>
36#include <linux/log2.h>
37#include <linux/pm.h>
38#include <linux/of.h>
39#include <linux/of_platform.h>
40#ifdef CONFIG_X86
41#include <asm/i8259.h>
42#include <asm/processor.h>
43#include <linux/dmi.h>
44#endif
45
46/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
47#include <linux/mc146818rtc.h>
48
49#ifdef CONFIG_ACPI
50/*
51 * Use ACPI SCI to replace HPET interrupt for RTC Alarm event
52 *
53 * If cleared, ACPI SCI is only used to wake up the system from suspend
54 *
55 * If set, ACPI SCI is used to handle UIE/AIE and system wakeup
56 */
57
58static bool use_acpi_alarm;
59module_param(use_acpi_alarm, bool, 0444);
60
61static inline int cmos_use_acpi_alarm(void)
62{
63 return use_acpi_alarm;
64}
65#else /* !CONFIG_ACPI */
66
67static inline int cmos_use_acpi_alarm(void)
68{
69 return 0;
70}
71#endif
72
73struct cmos_rtc {
74 struct rtc_device *rtc;
75 struct device *dev;
76 int irq;
77 struct resource *iomem;
78 time64_t alarm_expires;
79
80 void (*wake_on)(struct device *);
81 void (*wake_off)(struct device *);
82
83 u8 enabled_wake;
84 u8 suspend_ctrl;
85
86 /* newer hardware extends the original register set */
87 u8 day_alrm;
88 u8 mon_alrm;
89 u8 century;
90
91 struct rtc_wkalrm saved_wkalrm;
92};
93
94/* both platform and pnp busses use negative numbers for invalid irqs */
95#define is_valid_irq(n) ((n) > 0)
96
97static const char driver_name[] = "rtc_cmos";
98
99/* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
100 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
101 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
102 */
103#define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
104
105static inline int is_intr(u8 rtc_intr)
106{
107 if (!(rtc_intr & RTC_IRQF))
108 return 0;
109 return rtc_intr & RTC_IRQMASK;
110}
111
112/*----------------------------------------------------------------*/
113
114/* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
115 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
116 * used in a broken "legacy replacement" mode. The breakage includes
117 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
118 * other (better) use.
119 *
120 * When that broken mode is in use, platform glue provides a partial
121 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
122 * want to use HPET for anything except those IRQs though...
123 */
124#ifdef CONFIG_HPET_EMULATE_RTC
125#include <asm/hpet.h>
126#else
127
128static inline int is_hpet_enabled(void)
129{
130 return 0;
131}
132
133static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
134{
135 return 0;
136}
137
138static inline int hpet_set_rtc_irq_bit(unsigned long mask)
139{
140 return 0;
141}
142
143static inline int
144hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
145{
146 return 0;
147}
148
149static inline int hpet_set_periodic_freq(unsigned long freq)
150{
151 return 0;
152}
153
154static inline int hpet_rtc_dropped_irq(void)
155{
156 return 0;
157}
158
159static inline int hpet_rtc_timer_init(void)
160{
161 return 0;
162}
163
164extern irq_handler_t hpet_rtc_interrupt;
165
166static inline int hpet_register_irq_handler(irq_handler_t handler)
167{
168 return 0;
169}
170
171static inline int hpet_unregister_irq_handler(irq_handler_t handler)
172{
173 return 0;
174}
175
176#endif
177
178/* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */
179static inline int use_hpet_alarm(void)
180{
181 return is_hpet_enabled() && !cmos_use_acpi_alarm();
182}
183
184/*----------------------------------------------------------------*/
185
186#ifdef RTC_PORT
187
188/* Most newer x86 systems have two register banks, the first used
189 * for RTC and NVRAM and the second only for NVRAM. Caller must
190 * own rtc_lock ... and we won't worry about access during NMI.
191 */
192#define can_bank2 true
193
194static inline unsigned char cmos_read_bank2(unsigned char addr)
195{
196 outb(addr, RTC_PORT(2));
197 return inb(RTC_PORT(3));
198}
199
200static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
201{
202 outb(addr, RTC_PORT(2));
203 outb(val, RTC_PORT(3));
204}
205
206#else
207
208#define can_bank2 false
209
210static inline unsigned char cmos_read_bank2(unsigned char addr)
211{
212 return 0;
213}
214
215static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
216{
217}
218
219#endif
220
221/*----------------------------------------------------------------*/
222
223static int cmos_read_time(struct device *dev, struct rtc_time *t)
224{
225 /*
226 * If pm_trace abused the RTC for storage, set the timespec to 0,
227 * which tells the caller that this RTC value is unusable.
228 */
229 if (!pm_trace_rtc_valid())
230 return -EIO;
231
232 /* REVISIT: if the clock has a "century" register, use
233 * that instead of the heuristic in mc146818_get_time().
234 * That'll make Y3K compatility (year > 2070) easy!
235 */
236 mc146818_get_time(t);
237 return 0;
238}
239
240static int cmos_set_time(struct device *dev, struct rtc_time *t)
241{
242 /* REVISIT: set the "century" register if available
243 *
244 * NOTE: this ignores the issue whereby updating the seconds
245 * takes effect exactly 500ms after we write the register.
246 * (Also queueing and other delays before we get this far.)
247 */
248 return mc146818_set_time(t);
249}
250
251static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
252{
253 struct cmos_rtc *cmos = dev_get_drvdata(dev);
254 unsigned char rtc_control;
255
256 /* This not only a rtc_op, but also called directly */
257 if (!is_valid_irq(cmos->irq))
258 return -EIO;
259
260 /* Basic alarms only support hour, minute, and seconds fields.
261 * Some also support day and month, for alarms up to a year in
262 * the future.
263 */
264
265 spin_lock_irq(&rtc_lock);
266 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
267 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
268 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
269
270 if (cmos->day_alrm) {
271 /* ignore upper bits on readback per ACPI spec */
272 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
273 if (!t->time.tm_mday)
274 t->time.tm_mday = -1;
275
276 if (cmos->mon_alrm) {
277 t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
278 if (!t->time.tm_mon)
279 t->time.tm_mon = -1;
280 }
281 }
282
283 rtc_control = CMOS_READ(RTC_CONTROL);
284 spin_unlock_irq(&rtc_lock);
285
286 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
287 if (((unsigned)t->time.tm_sec) < 0x60)
288 t->time.tm_sec = bcd2bin(t->time.tm_sec);
289 else
290 t->time.tm_sec = -1;
291 if (((unsigned)t->time.tm_min) < 0x60)
292 t->time.tm_min = bcd2bin(t->time.tm_min);
293 else
294 t->time.tm_min = -1;
295 if (((unsigned)t->time.tm_hour) < 0x24)
296 t->time.tm_hour = bcd2bin(t->time.tm_hour);
297 else
298 t->time.tm_hour = -1;
299
300 if (cmos->day_alrm) {
301 if (((unsigned)t->time.tm_mday) <= 0x31)
302 t->time.tm_mday = bcd2bin(t->time.tm_mday);
303 else
304 t->time.tm_mday = -1;
305
306 if (cmos->mon_alrm) {
307 if (((unsigned)t->time.tm_mon) <= 0x12)
308 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
309 else
310 t->time.tm_mon = -1;
311 }
312 }
313 }
314
315 t->enabled = !!(rtc_control & RTC_AIE);
316 t->pending = 0;
317
318 return 0;
319}
320
321static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
322{
323 unsigned char rtc_intr;
324
325 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
326 * allegedly some older rtcs need that to handle irqs properly
327 */
328 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
329
330 if (use_hpet_alarm())
331 return;
332
333 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
334 if (is_intr(rtc_intr))
335 rtc_update_irq(cmos->rtc, 1, rtc_intr);
336}
337
338static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
339{
340 unsigned char rtc_control;
341
342 /* flush any pending IRQ status, notably for update irqs,
343 * before we enable new IRQs
344 */
345 rtc_control = CMOS_READ(RTC_CONTROL);
346 cmos_checkintr(cmos, rtc_control);
347
348 rtc_control |= mask;
349 CMOS_WRITE(rtc_control, RTC_CONTROL);
350 if (use_hpet_alarm())
351 hpet_set_rtc_irq_bit(mask);
352
353 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
354 if (cmos->wake_on)
355 cmos->wake_on(cmos->dev);
356 }
357
358 cmos_checkintr(cmos, rtc_control);
359}
360
361static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
362{
363 unsigned char rtc_control;
364
365 rtc_control = CMOS_READ(RTC_CONTROL);
366 rtc_control &= ~mask;
367 CMOS_WRITE(rtc_control, RTC_CONTROL);
368 if (use_hpet_alarm())
369 hpet_mask_rtc_irq_bit(mask);
370
371 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
372 if (cmos->wake_off)
373 cmos->wake_off(cmos->dev);
374 }
375
376 cmos_checkintr(cmos, rtc_control);
377}
378
379static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
380{
381 struct cmos_rtc *cmos = dev_get_drvdata(dev);
382 struct rtc_time now;
383
384 cmos_read_time(dev, &now);
385
386 if (!cmos->day_alrm) {
387 time64_t t_max_date;
388 time64_t t_alrm;
389
390 t_max_date = rtc_tm_to_time64(&now);
391 t_max_date += 24 * 60 * 60 - 1;
392 t_alrm = rtc_tm_to_time64(&t->time);
393 if (t_alrm > t_max_date) {
394 dev_err(dev,
395 "Alarms can be up to one day in the future\n");
396 return -EINVAL;
397 }
398 } else if (!cmos->mon_alrm) {
399 struct rtc_time max_date = now;
400 time64_t t_max_date;
401 time64_t t_alrm;
402 int max_mday;
403
404 if (max_date.tm_mon == 11) {
405 max_date.tm_mon = 0;
406 max_date.tm_year += 1;
407 } else {
408 max_date.tm_mon += 1;
409 }
410 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
411 if (max_date.tm_mday > max_mday)
412 max_date.tm_mday = max_mday;
413
414 t_max_date = rtc_tm_to_time64(&max_date);
415 t_max_date -= 1;
416 t_alrm = rtc_tm_to_time64(&t->time);
417 if (t_alrm > t_max_date) {
418 dev_err(dev,
419 "Alarms can be up to one month in the future\n");
420 return -EINVAL;
421 }
422 } else {
423 struct rtc_time max_date = now;
424 time64_t t_max_date;
425 time64_t t_alrm;
426 int max_mday;
427
428 max_date.tm_year += 1;
429 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
430 if (max_date.tm_mday > max_mday)
431 max_date.tm_mday = max_mday;
432
433 t_max_date = rtc_tm_to_time64(&max_date);
434 t_max_date -= 1;
435 t_alrm = rtc_tm_to_time64(&t->time);
436 if (t_alrm > t_max_date) {
437 dev_err(dev,
438 "Alarms can be up to one year in the future\n");
439 return -EINVAL;
440 }
441 }
442
443 return 0;
444}
445
446static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
447{
448 struct cmos_rtc *cmos = dev_get_drvdata(dev);
449 unsigned char mon, mday, hrs, min, sec, rtc_control;
450 int ret;
451
452 /* This not only a rtc_op, but also called directly */
453 if (!is_valid_irq(cmos->irq))
454 return -EIO;
455
456 ret = cmos_validate_alarm(dev, t);
457 if (ret < 0)
458 return ret;
459
460 mon = t->time.tm_mon + 1;
461 mday = t->time.tm_mday;
462 hrs = t->time.tm_hour;
463 min = t->time.tm_min;
464 sec = t->time.tm_sec;
465
Olivier Deprez157378f2022-04-04 15:47:50 +0200466 spin_lock_irq(&rtc_lock);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000467 rtc_control = CMOS_READ(RTC_CONTROL);
Olivier Deprez157378f2022-04-04 15:47:50 +0200468 spin_unlock_irq(&rtc_lock);
469
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000470 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
471 /* Writing 0xff means "don't care" or "match all". */
472 mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
473 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
474 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
475 min = (min < 60) ? bin2bcd(min) : 0xff;
476 sec = (sec < 60) ? bin2bcd(sec) : 0xff;
477 }
478
479 spin_lock_irq(&rtc_lock);
480
481 /* next rtc irq must not be from previous alarm setting */
482 cmos_irq_disable(cmos, RTC_AIE);
483
484 /* update alarm */
485 CMOS_WRITE(hrs, RTC_HOURS_ALARM);
486 CMOS_WRITE(min, RTC_MINUTES_ALARM);
487 CMOS_WRITE(sec, RTC_SECONDS_ALARM);
488
489 /* the system may support an "enhanced" alarm */
490 if (cmos->day_alrm) {
491 CMOS_WRITE(mday, cmos->day_alrm);
492 if (cmos->mon_alrm)
493 CMOS_WRITE(mon, cmos->mon_alrm);
494 }
495
496 if (use_hpet_alarm()) {
497 /*
498 * FIXME the HPET alarm glue currently ignores day_alrm
499 * and mon_alrm ...
500 */
501 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min,
502 t->time.tm_sec);
503 }
504
505 if (t->enabled)
506 cmos_irq_enable(cmos, RTC_AIE);
507
508 spin_unlock_irq(&rtc_lock);
509
510 cmos->alarm_expires = rtc_tm_to_time64(&t->time);
511
512 return 0;
513}
514
515static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
516{
517 struct cmos_rtc *cmos = dev_get_drvdata(dev);
518 unsigned long flags;
519
520 spin_lock_irqsave(&rtc_lock, flags);
521
522 if (enabled)
523 cmos_irq_enable(cmos, RTC_AIE);
524 else
525 cmos_irq_disable(cmos, RTC_AIE);
526
527 spin_unlock_irqrestore(&rtc_lock, flags);
528 return 0;
529}
530
531#if IS_ENABLED(CONFIG_RTC_INTF_PROC)
532
533static int cmos_procfs(struct device *dev, struct seq_file *seq)
534{
535 struct cmos_rtc *cmos = dev_get_drvdata(dev);
536 unsigned char rtc_control, valid;
537
538 spin_lock_irq(&rtc_lock);
539 rtc_control = CMOS_READ(RTC_CONTROL);
540 valid = CMOS_READ(RTC_VALID);
541 spin_unlock_irq(&rtc_lock);
542
543 /* NOTE: at least ICH6 reports battery status using a different
544 * (non-RTC) bit; and SQWE is ignored on many current systems.
545 */
546 seq_printf(seq,
547 "periodic_IRQ\t: %s\n"
548 "update_IRQ\t: %s\n"
549 "HPET_emulated\t: %s\n"
550 // "square_wave\t: %s\n"
551 "BCD\t\t: %s\n"
552 "DST_enable\t: %s\n"
553 "periodic_freq\t: %d\n"
554 "batt_status\t: %s\n",
555 (rtc_control & RTC_PIE) ? "yes" : "no",
556 (rtc_control & RTC_UIE) ? "yes" : "no",
557 use_hpet_alarm() ? "yes" : "no",
558 // (rtc_control & RTC_SQWE) ? "yes" : "no",
559 (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
560 (rtc_control & RTC_DST_EN) ? "yes" : "no",
561 cmos->rtc->irq_freq,
562 (valid & RTC_VRT) ? "okay" : "dead");
563
564 return 0;
565}
566
567#else
568#define cmos_procfs NULL
569#endif
570
571static const struct rtc_class_ops cmos_rtc_ops = {
572 .read_time = cmos_read_time,
573 .set_time = cmos_set_time,
574 .read_alarm = cmos_read_alarm,
575 .set_alarm = cmos_set_alarm,
576 .proc = cmos_procfs,
577 .alarm_irq_enable = cmos_alarm_irq_enable,
578};
579
580static const struct rtc_class_ops cmos_rtc_ops_no_alarm = {
581 .read_time = cmos_read_time,
582 .set_time = cmos_set_time,
583 .proc = cmos_procfs,
584};
585
586/*----------------------------------------------------------------*/
587
588/*
589 * All these chips have at least 64 bytes of address space, shared by
590 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
591 * by boot firmware. Modern chips have 128 or 256 bytes.
592 */
593
594#define NVRAM_OFFSET (RTC_REG_D + 1)
595
596static int cmos_nvram_read(void *priv, unsigned int off, void *val,
597 size_t count)
598{
599 unsigned char *buf = val;
600 int retval;
601
602 off += NVRAM_OFFSET;
603 spin_lock_irq(&rtc_lock);
604 for (retval = 0; count; count--, off++, retval++) {
605 if (off < 128)
606 *buf++ = CMOS_READ(off);
607 else if (can_bank2)
608 *buf++ = cmos_read_bank2(off);
609 else
610 break;
611 }
612 spin_unlock_irq(&rtc_lock);
613
614 return retval;
615}
616
617static int cmos_nvram_write(void *priv, unsigned int off, void *val,
618 size_t count)
619{
620 struct cmos_rtc *cmos = priv;
621 unsigned char *buf = val;
622 int retval;
623
624 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
625 * checksum on part of the NVRAM data. That's currently ignored
626 * here. If userspace is smart enough to know what fields of
627 * NVRAM to update, updating checksums is also part of its job.
628 */
629 off += NVRAM_OFFSET;
630 spin_lock_irq(&rtc_lock);
631 for (retval = 0; count; count--, off++, retval++) {
632 /* don't trash RTC registers */
633 if (off == cmos->day_alrm
634 || off == cmos->mon_alrm
635 || off == cmos->century)
636 buf++;
637 else if (off < 128)
638 CMOS_WRITE(*buf++, off);
639 else if (can_bank2)
640 cmos_write_bank2(*buf++, off);
641 else
642 break;
643 }
644 spin_unlock_irq(&rtc_lock);
645
646 return retval;
647}
648
649/*----------------------------------------------------------------*/
650
651static struct cmos_rtc cmos_rtc;
652
653static irqreturn_t cmos_interrupt(int irq, void *p)
654{
Olivier Deprez157378f2022-04-04 15:47:50 +0200655 unsigned long flags;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000656 u8 irqstat;
657 u8 rtc_control;
658
Olivier Deprez157378f2022-04-04 15:47:50 +0200659 spin_lock_irqsave(&rtc_lock, flags);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000660
661 /* When the HPET interrupt handler calls us, the interrupt
662 * status is passed as arg1 instead of the irq number. But
663 * always clear irq status, even when HPET is in the way.
664 *
665 * Note that HPET and RTC are almost certainly out of phase,
666 * giving different IRQ status ...
667 */
668 irqstat = CMOS_READ(RTC_INTR_FLAGS);
669 rtc_control = CMOS_READ(RTC_CONTROL);
670 if (use_hpet_alarm())
671 irqstat = (unsigned long)irq & 0xF0;
672
673 /* If we were suspended, RTC_CONTROL may not be accurate since the
674 * bios may have cleared it.
675 */
676 if (!cmos_rtc.suspend_ctrl)
677 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
678 else
679 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
680
681 /* All Linux RTC alarms should be treated as if they were oneshot.
682 * Similar code may be needed in system wakeup paths, in case the
683 * alarm woke the system.
684 */
685 if (irqstat & RTC_AIE) {
686 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
687 rtc_control &= ~RTC_AIE;
688 CMOS_WRITE(rtc_control, RTC_CONTROL);
689 if (use_hpet_alarm())
690 hpet_mask_rtc_irq_bit(RTC_AIE);
691 CMOS_READ(RTC_INTR_FLAGS);
692 }
Olivier Deprez157378f2022-04-04 15:47:50 +0200693 spin_unlock_irqrestore(&rtc_lock, flags);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000694
695 if (is_intr(irqstat)) {
696 rtc_update_irq(p, 1, irqstat);
697 return IRQ_HANDLED;
698 } else
699 return IRQ_NONE;
700}
701
702#ifdef CONFIG_PNP
703#define INITSECTION
704
705#else
706#define INITSECTION __init
707#endif
708
709static int INITSECTION
710cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
711{
712 struct cmos_rtc_board_info *info = dev_get_platdata(dev);
713 int retval = 0;
714 unsigned char rtc_control;
715 unsigned address_space;
716 u32 flags = 0;
717 struct nvmem_config nvmem_cfg = {
718 .name = "cmos_nvram",
719 .word_size = 1,
720 .stride = 1,
721 .reg_read = cmos_nvram_read,
722 .reg_write = cmos_nvram_write,
723 .priv = &cmos_rtc,
724 };
725
726 /* there can be only one ... */
727 if (cmos_rtc.dev)
728 return -EBUSY;
729
730 if (!ports)
731 return -ENODEV;
732
733 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
734 *
735 * REVISIT non-x86 systems may instead use memory space resources
736 * (needing ioremap etc), not i/o space resources like this ...
737 */
738 if (RTC_IOMAPPED)
739 ports = request_region(ports->start, resource_size(ports),
740 driver_name);
741 else
742 ports = request_mem_region(ports->start, resource_size(ports),
743 driver_name);
744 if (!ports) {
745 dev_dbg(dev, "i/o registers already in use\n");
746 return -EBUSY;
747 }
748
749 cmos_rtc.irq = rtc_irq;
750 cmos_rtc.iomem = ports;
751
752 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
753 * driver did, but don't reject unknown configs. Old hardware
754 * won't address 128 bytes. Newer chips have multiple banks,
755 * though they may not be listed in one I/O resource.
756 */
757#if defined(CONFIG_ATARI)
758 address_space = 64;
759#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
760 || defined(__sparc__) || defined(__mips__) \
761 || defined(__powerpc__)
762 address_space = 128;
763#else
764#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
765 address_space = 128;
766#endif
767 if (can_bank2 && ports->end > (ports->start + 1))
768 address_space = 256;
769
770 /* For ACPI systems extension info comes from the FADT. On others,
771 * board specific setup provides it as appropriate. Systems where
772 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
773 * some almost-clones) can provide hooks to make that behave.
774 *
775 * Note that ACPI doesn't preclude putting these registers into
776 * "extended" areas of the chip, including some that we won't yet
777 * expect CMOS_READ and friends to handle.
778 */
779 if (info) {
780 if (info->flags)
781 flags = info->flags;
782 if (info->address_space)
783 address_space = info->address_space;
784
785 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
786 cmos_rtc.day_alrm = info->rtc_day_alarm;
787 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
788 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
789 if (info->rtc_century && info->rtc_century < 128)
790 cmos_rtc.century = info->rtc_century;
791
792 if (info->wake_on && info->wake_off) {
793 cmos_rtc.wake_on = info->wake_on;
794 cmos_rtc.wake_off = info->wake_off;
795 }
796 }
797
798 cmos_rtc.dev = dev;
799 dev_set_drvdata(dev, &cmos_rtc);
800
801 cmos_rtc.rtc = devm_rtc_allocate_device(dev);
802 if (IS_ERR(cmos_rtc.rtc)) {
803 retval = PTR_ERR(cmos_rtc.rtc);
804 goto cleanup0;
805 }
806
807 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
808
809 spin_lock_irq(&rtc_lock);
810
811 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
812 /* force periodic irq to CMOS reset default of 1024Hz;
813 *
814 * REVISIT it's been reported that at least one x86_64 ALI
815 * mobo doesn't use 32KHz here ... for portability we might
816 * need to do something about other clock frequencies.
817 */
818 cmos_rtc.rtc->irq_freq = 1024;
819 if (use_hpet_alarm())
820 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
821 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
822 }
823
824 /* disable irqs */
825 if (is_valid_irq(rtc_irq))
826 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
827
828 rtc_control = CMOS_READ(RTC_CONTROL);
829
830 spin_unlock_irq(&rtc_lock);
831
832 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
833 dev_warn(dev, "only 24-hr supported\n");
834 retval = -ENXIO;
835 goto cleanup1;
836 }
837
838 if (use_hpet_alarm())
839 hpet_rtc_timer_init();
840
841 if (is_valid_irq(rtc_irq)) {
842 irq_handler_t rtc_cmos_int_handler;
843
844 if (use_hpet_alarm()) {
845 rtc_cmos_int_handler = hpet_rtc_interrupt;
846 retval = hpet_register_irq_handler(cmos_interrupt);
847 if (retval) {
848 hpet_mask_rtc_irq_bit(RTC_IRQMASK);
849 dev_warn(dev, "hpet_register_irq_handler "
850 " failed in rtc_init().");
851 goto cleanup1;
852 }
853 } else
854 rtc_cmos_int_handler = cmos_interrupt;
855
856 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
Olivier Deprez0e641232021-09-23 10:07:05 +0200857 0, dev_name(&cmos_rtc.rtc->dev),
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000858 cmos_rtc.rtc);
859 if (retval < 0) {
860 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
861 goto cleanup1;
862 }
863
864 cmos_rtc.rtc->ops = &cmos_rtc_ops;
865 } else {
866 cmos_rtc.rtc->ops = &cmos_rtc_ops_no_alarm;
867 }
868
869 cmos_rtc.rtc->nvram_old_abi = true;
870 retval = rtc_register_device(cmos_rtc.rtc);
871 if (retval)
872 goto cleanup2;
873
874 /* export at least the first block of NVRAM */
875 nvmem_cfg.size = address_space - NVRAM_OFFSET;
876 if (rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg))
877 dev_err(dev, "nvmem registration failed\n");
878
879 dev_info(dev, "%s%s, %d bytes nvram%s\n",
880 !is_valid_irq(rtc_irq) ? "no alarms" :
881 cmos_rtc.mon_alrm ? "alarms up to one year" :
882 cmos_rtc.day_alrm ? "alarms up to one month" :
883 "alarms up to one day",
884 cmos_rtc.century ? ", y3k" : "",
885 nvmem_cfg.size,
886 use_hpet_alarm() ? ", hpet irqs" : "");
887
888 return 0;
889
890cleanup2:
891 if (is_valid_irq(rtc_irq))
892 free_irq(rtc_irq, cmos_rtc.rtc);
893cleanup1:
894 cmos_rtc.dev = NULL;
895cleanup0:
896 if (RTC_IOMAPPED)
897 release_region(ports->start, resource_size(ports));
898 else
899 release_mem_region(ports->start, resource_size(ports));
900 return retval;
901}
902
903static void cmos_do_shutdown(int rtc_irq)
904{
905 spin_lock_irq(&rtc_lock);
906 if (is_valid_irq(rtc_irq))
907 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
908 spin_unlock_irq(&rtc_lock);
909}
910
911static void cmos_do_remove(struct device *dev)
912{
913 struct cmos_rtc *cmos = dev_get_drvdata(dev);
914 struct resource *ports;
915
916 cmos_do_shutdown(cmos->irq);
917
918 if (is_valid_irq(cmos->irq)) {
919 free_irq(cmos->irq, cmos->rtc);
920 if (use_hpet_alarm())
921 hpet_unregister_irq_handler(cmos_interrupt);
922 }
923
924 cmos->rtc = NULL;
925
926 ports = cmos->iomem;
927 if (RTC_IOMAPPED)
928 release_region(ports->start, resource_size(ports));
929 else
930 release_mem_region(ports->start, resource_size(ports));
931 cmos->iomem = NULL;
932
933 cmos->dev = NULL;
934}
935
936static int cmos_aie_poweroff(struct device *dev)
937{
938 struct cmos_rtc *cmos = dev_get_drvdata(dev);
939 struct rtc_time now;
940 time64_t t_now;
941 int retval = 0;
942 unsigned char rtc_control;
943
944 if (!cmos->alarm_expires)
945 return -EINVAL;
946
947 spin_lock_irq(&rtc_lock);
948 rtc_control = CMOS_READ(RTC_CONTROL);
949 spin_unlock_irq(&rtc_lock);
950
951 /* We only care about the situation where AIE is disabled. */
952 if (rtc_control & RTC_AIE)
953 return -EBUSY;
954
955 cmos_read_time(dev, &now);
956 t_now = rtc_tm_to_time64(&now);
957
958 /*
959 * When enabling "RTC wake-up" in BIOS setup, the machine reboots
960 * automatically right after shutdown on some buggy boxes.
961 * This automatic rebooting issue won't happen when the alarm
962 * time is larger than now+1 seconds.
963 *
964 * If the alarm time is equal to now+1 seconds, the issue can be
965 * prevented by cancelling the alarm.
966 */
967 if (cmos->alarm_expires == t_now + 1) {
968 struct rtc_wkalrm alarm;
969
970 /* Cancel the AIE timer by configuring the past time. */
971 rtc_time64_to_tm(t_now - 1, &alarm.time);
972 alarm.enabled = 0;
973 retval = cmos_set_alarm(dev, &alarm);
974 } else if (cmos->alarm_expires > t_now + 1) {
975 retval = -EBUSY;
976 }
977
978 return retval;
979}
980
981static int cmos_suspend(struct device *dev)
982{
983 struct cmos_rtc *cmos = dev_get_drvdata(dev);
984 unsigned char tmp;
985
986 /* only the alarm might be a wakeup event source */
987 spin_lock_irq(&rtc_lock);
988 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
989 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
990 unsigned char mask;
991
992 if (device_may_wakeup(dev))
993 mask = RTC_IRQMASK & ~RTC_AIE;
994 else
995 mask = RTC_IRQMASK;
996 tmp &= ~mask;
997 CMOS_WRITE(tmp, RTC_CONTROL);
998 if (use_hpet_alarm())
999 hpet_mask_rtc_irq_bit(mask);
1000 cmos_checkintr(cmos, tmp);
1001 }
1002 spin_unlock_irq(&rtc_lock);
1003
1004 if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) {
1005 cmos->enabled_wake = 1;
1006 if (cmos->wake_on)
1007 cmos->wake_on(dev);
1008 else
1009 enable_irq_wake(cmos->irq);
1010 }
1011
Olivier Deprez157378f2022-04-04 15:47:50 +02001012 memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm));
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001013 cmos_read_alarm(dev, &cmos->saved_wkalrm);
1014
1015 dev_dbg(dev, "suspend%s, ctrl %02x\n",
1016 (tmp & RTC_AIE) ? ", alarm may wake" : "",
1017 tmp);
1018
1019 return 0;
1020}
1021
1022/* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
1023 * after a detour through G3 "mechanical off", although the ACPI spec
1024 * says wakeup should only work from G1/S4 "hibernate". To most users,
1025 * distinctions between S4 and S5 are pointless. So when the hardware
1026 * allows, don't draw that distinction.
1027 */
1028static inline int cmos_poweroff(struct device *dev)
1029{
1030 if (!IS_ENABLED(CONFIG_PM))
1031 return -ENOSYS;
1032
1033 return cmos_suspend(dev);
1034}
1035
1036static void cmos_check_wkalrm(struct device *dev)
1037{
1038 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1039 struct rtc_wkalrm current_alarm;
1040 time64_t t_now;
1041 time64_t t_current_expires;
1042 time64_t t_saved_expires;
1043 struct rtc_time now;
1044
1045 /* Check if we have RTC Alarm armed */
1046 if (!(cmos->suspend_ctrl & RTC_AIE))
1047 return;
1048
1049 cmos_read_time(dev, &now);
1050 t_now = rtc_tm_to_time64(&now);
1051
1052 /*
1053 * ACPI RTC wake event is cleared after resume from STR,
1054 * ACK the rtc irq here
1055 */
1056 if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) {
1057 cmos_interrupt(0, (void *)cmos->rtc);
1058 return;
1059 }
1060
Olivier Deprez157378f2022-04-04 15:47:50 +02001061 memset(&current_alarm, 0, sizeof(struct rtc_wkalrm));
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001062 cmos_read_alarm(dev, &current_alarm);
1063 t_current_expires = rtc_tm_to_time64(&current_alarm.time);
1064 t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
1065 if (t_current_expires != t_saved_expires ||
1066 cmos->saved_wkalrm.enabled != current_alarm.enabled) {
1067 cmos_set_alarm(dev, &cmos->saved_wkalrm);
1068 }
1069}
1070
1071static void cmos_check_acpi_rtc_status(struct device *dev,
1072 unsigned char *rtc_control);
1073
1074static int __maybe_unused cmos_resume(struct device *dev)
1075{
1076 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1077 unsigned char tmp;
1078
1079 if (cmos->enabled_wake && !cmos_use_acpi_alarm()) {
1080 if (cmos->wake_off)
1081 cmos->wake_off(dev);
1082 else
1083 disable_irq_wake(cmos->irq);
1084 cmos->enabled_wake = 0;
1085 }
1086
1087 /* The BIOS might have changed the alarm, restore it */
1088 cmos_check_wkalrm(dev);
1089
1090 spin_lock_irq(&rtc_lock);
1091 tmp = cmos->suspend_ctrl;
1092 cmos->suspend_ctrl = 0;
1093 /* re-enable any irqs previously active */
1094 if (tmp & RTC_IRQMASK) {
1095 unsigned char mask;
1096
1097 if (device_may_wakeup(dev) && use_hpet_alarm())
1098 hpet_rtc_timer_init();
1099
1100 do {
1101 CMOS_WRITE(tmp, RTC_CONTROL);
1102 if (use_hpet_alarm())
1103 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
1104
1105 mask = CMOS_READ(RTC_INTR_FLAGS);
1106 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
1107 if (!use_hpet_alarm() || !is_intr(mask))
1108 break;
1109
1110 /* force one-shot behavior if HPET blocked
1111 * the wake alarm's irq
1112 */
1113 rtc_update_irq(cmos->rtc, 1, mask);
1114 tmp &= ~RTC_AIE;
1115 hpet_mask_rtc_irq_bit(RTC_AIE);
1116 } while (mask & RTC_AIE);
1117
1118 if (tmp & RTC_AIE)
1119 cmos_check_acpi_rtc_status(dev, &tmp);
1120 }
1121 spin_unlock_irq(&rtc_lock);
1122
1123 dev_dbg(dev, "resume, ctrl %02x\n", tmp);
1124
1125 return 0;
1126}
1127
1128static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
1129
1130/*----------------------------------------------------------------*/
1131
1132/* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
1133 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
1134 * probably list them in similar PNPBIOS tables; so PNP is more common.
1135 *
1136 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
1137 * predate even PNPBIOS should set up platform_bus devices.
1138 */
1139
1140#ifdef CONFIG_ACPI
1141
1142#include <linux/acpi.h>
1143
1144static u32 rtc_handler(void *context)
1145{
1146 struct device *dev = context;
1147 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1148 unsigned char rtc_control = 0;
1149 unsigned char rtc_intr;
1150 unsigned long flags;
1151
1152
1153 /*
1154 * Always update rtc irq when ACPI is used as RTC Alarm.
1155 * Or else, ACPI SCI is enabled during suspend/resume only,
1156 * update rtc irq in that case.
1157 */
1158 if (cmos_use_acpi_alarm())
1159 cmos_interrupt(0, (void *)cmos->rtc);
1160 else {
1161 /* Fix me: can we use cmos_interrupt() here as well? */
1162 spin_lock_irqsave(&rtc_lock, flags);
1163 if (cmos_rtc.suspend_ctrl)
1164 rtc_control = CMOS_READ(RTC_CONTROL);
1165 if (rtc_control & RTC_AIE) {
1166 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
1167 CMOS_WRITE(rtc_control, RTC_CONTROL);
1168 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
1169 rtc_update_irq(cmos->rtc, 1, rtc_intr);
1170 }
1171 spin_unlock_irqrestore(&rtc_lock, flags);
1172 }
1173
1174 pm_wakeup_hard_event(dev);
1175 acpi_clear_event(ACPI_EVENT_RTC);
1176 acpi_disable_event(ACPI_EVENT_RTC, 0);
1177 return ACPI_INTERRUPT_HANDLED;
1178}
1179
1180static inline void rtc_wake_setup(struct device *dev)
1181{
1182 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
1183 /*
1184 * After the RTC handler is installed, the Fixed_RTC event should
1185 * be disabled. Only when the RTC alarm is set will it be enabled.
1186 */
1187 acpi_clear_event(ACPI_EVENT_RTC);
1188 acpi_disable_event(ACPI_EVENT_RTC, 0);
1189}
1190
1191static void rtc_wake_on(struct device *dev)
1192{
1193 acpi_clear_event(ACPI_EVENT_RTC);
1194 acpi_enable_event(ACPI_EVENT_RTC, 0);
1195}
1196
1197static void rtc_wake_off(struct device *dev)
1198{
1199 acpi_disable_event(ACPI_EVENT_RTC, 0);
1200}
1201
1202#ifdef CONFIG_X86
1203/* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */
1204static void use_acpi_alarm_quirks(void)
1205{
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001206 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
1207 return;
1208
1209 if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0))
1210 return;
1211
1212 if (!is_hpet_enabled())
1213 return;
1214
Olivier Deprez157378f2022-04-04 15:47:50 +02001215 if (dmi_get_bios_year() < 2015)
1216 return;
1217
1218 use_acpi_alarm = true;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001219}
1220#else
1221static inline void use_acpi_alarm_quirks(void) { }
1222#endif
1223
1224/* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
1225 * its device node and pass extra config data. This helps its driver use
1226 * capabilities that the now-obsolete mc146818 didn't have, and informs it
1227 * that this board's RTC is wakeup-capable (per ACPI spec).
1228 */
1229static struct cmos_rtc_board_info acpi_rtc_info;
1230
1231static void cmos_wake_setup(struct device *dev)
1232{
1233 if (acpi_disabled)
1234 return;
1235
1236 use_acpi_alarm_quirks();
1237
1238 rtc_wake_setup(dev);
1239 acpi_rtc_info.wake_on = rtc_wake_on;
1240 acpi_rtc_info.wake_off = rtc_wake_off;
1241
1242 /* workaround bug in some ACPI tables */
1243 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1244 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1245 acpi_gbl_FADT.month_alarm);
1246 acpi_gbl_FADT.month_alarm = 0;
1247 }
1248
1249 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1250 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1251 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1252
1253 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
1254 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1255 dev_info(dev, "RTC can wake from S4\n");
1256
1257 dev->platform_data = &acpi_rtc_info;
1258
1259 /* RTC always wakes from S1/S2/S3, and often S4/STD */
1260 device_init_wakeup(dev, 1);
1261}
1262
1263static void cmos_check_acpi_rtc_status(struct device *dev,
1264 unsigned char *rtc_control)
1265{
1266 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1267 acpi_event_status rtc_status;
1268 acpi_status status;
1269
1270 if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
1271 return;
1272
1273 status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
1274 if (ACPI_FAILURE(status)) {
1275 dev_err(dev, "Could not get RTC status\n");
1276 } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
1277 unsigned char mask;
1278 *rtc_control &= ~RTC_AIE;
1279 CMOS_WRITE(*rtc_control, RTC_CONTROL);
1280 mask = CMOS_READ(RTC_INTR_FLAGS);
1281 rtc_update_irq(cmos->rtc, 1, mask);
1282 }
1283}
1284
1285#else
1286
1287static void cmos_wake_setup(struct device *dev)
1288{
1289}
1290
1291static void cmos_check_acpi_rtc_status(struct device *dev,
1292 unsigned char *rtc_control)
1293{
1294}
1295
1296#endif
1297
1298#ifdef CONFIG_PNP
1299
1300#include <linux/pnp.h>
1301
1302static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1303{
1304 cmos_wake_setup(&pnp->dev);
1305
1306 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) {
1307 unsigned int irq = 0;
1308#ifdef CONFIG_X86
1309 /* Some machines contain a PNP entry for the RTC, but
1310 * don't define the IRQ. It should always be safe to
1311 * hardcode it on systems with a legacy PIC.
1312 */
1313 if (nr_legacy_irqs())
Olivier Deprez157378f2022-04-04 15:47:50 +02001314 irq = RTC_IRQ;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001315#endif
1316 return cmos_do_probe(&pnp->dev,
1317 pnp_get_resource(pnp, IORESOURCE_IO, 0), irq);
1318 } else {
1319 return cmos_do_probe(&pnp->dev,
1320 pnp_get_resource(pnp, IORESOURCE_IO, 0),
1321 pnp_irq(pnp, 0));
1322 }
1323}
1324
1325static void cmos_pnp_remove(struct pnp_dev *pnp)
1326{
1327 cmos_do_remove(&pnp->dev);
1328}
1329
1330static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1331{
1332 struct device *dev = &pnp->dev;
1333 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1334
1335 if (system_state == SYSTEM_POWER_OFF) {
1336 int retval = cmos_poweroff(dev);
1337
1338 if (cmos_aie_poweroff(dev) < 0 && !retval)
1339 return;
1340 }
1341
1342 cmos_do_shutdown(cmos->irq);
1343}
1344
1345static const struct pnp_device_id rtc_ids[] = {
1346 { .id = "PNP0b00", },
1347 { .id = "PNP0b01", },
1348 { .id = "PNP0b02", },
1349 { },
1350};
1351MODULE_DEVICE_TABLE(pnp, rtc_ids);
1352
1353static struct pnp_driver cmos_pnp_driver = {
Olivier Deprez157378f2022-04-04 15:47:50 +02001354 .name = driver_name,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001355 .id_table = rtc_ids,
1356 .probe = cmos_pnp_probe,
1357 .remove = cmos_pnp_remove,
1358 .shutdown = cmos_pnp_shutdown,
1359
1360 /* flag ensures resume() gets called, and stops syslog spam */
1361 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1362 .driver = {
1363 .pm = &cmos_pm_ops,
1364 },
1365};
1366
1367#endif /* CONFIG_PNP */
1368
1369#ifdef CONFIG_OF
1370static const struct of_device_id of_cmos_match[] = {
1371 {
1372 .compatible = "motorola,mc146818",
1373 },
1374 { },
1375};
1376MODULE_DEVICE_TABLE(of, of_cmos_match);
1377
1378static __init void cmos_of_init(struct platform_device *pdev)
1379{
1380 struct device_node *node = pdev->dev.of_node;
1381 const __be32 *val;
1382
1383 if (!node)
1384 return;
1385
1386 val = of_get_property(node, "ctrl-reg", NULL);
1387 if (val)
1388 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1389
1390 val = of_get_property(node, "freq-reg", NULL);
1391 if (val)
1392 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1393}
1394#else
1395static inline void cmos_of_init(struct platform_device *pdev) {}
1396#endif
1397/*----------------------------------------------------------------*/
1398
1399/* Platform setup should have set up an RTC device, when PNP is
1400 * unavailable ... this could happen even on (older) PCs.
1401 */
1402
1403static int __init cmos_platform_probe(struct platform_device *pdev)
1404{
1405 struct resource *resource;
1406 int irq;
1407
1408 cmos_of_init(pdev);
1409 cmos_wake_setup(&pdev->dev);
1410
1411 if (RTC_IOMAPPED)
1412 resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
1413 else
1414 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1415 irq = platform_get_irq(pdev, 0);
1416 if (irq < 0)
1417 irq = -1;
1418
1419 return cmos_do_probe(&pdev->dev, resource, irq);
1420}
1421
1422static int cmos_platform_remove(struct platform_device *pdev)
1423{
1424 cmos_do_remove(&pdev->dev);
1425 return 0;
1426}
1427
1428static void cmos_platform_shutdown(struct platform_device *pdev)
1429{
1430 struct device *dev = &pdev->dev;
1431 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1432
1433 if (system_state == SYSTEM_POWER_OFF) {
1434 int retval = cmos_poweroff(dev);
1435
1436 if (cmos_aie_poweroff(dev) < 0 && !retval)
1437 return;
1438 }
1439
1440 cmos_do_shutdown(cmos->irq);
1441}
1442
1443/* work with hotplug and coldplug */
1444MODULE_ALIAS("platform:rtc_cmos");
1445
1446static struct platform_driver cmos_platform_driver = {
1447 .remove = cmos_platform_remove,
1448 .shutdown = cmos_platform_shutdown,
1449 .driver = {
1450 .name = driver_name,
1451 .pm = &cmos_pm_ops,
1452 .of_match_table = of_match_ptr(of_cmos_match),
1453 }
1454};
1455
1456#ifdef CONFIG_PNP
1457static bool pnp_driver_registered;
1458#endif
1459static bool platform_driver_registered;
1460
1461static int __init cmos_init(void)
1462{
1463 int retval = 0;
1464
1465#ifdef CONFIG_PNP
1466 retval = pnp_register_driver(&cmos_pnp_driver);
1467 if (retval == 0)
1468 pnp_driver_registered = true;
1469#endif
1470
1471 if (!cmos_rtc.dev) {
1472 retval = platform_driver_probe(&cmos_platform_driver,
1473 cmos_platform_probe);
1474 if (retval == 0)
1475 platform_driver_registered = true;
1476 }
1477
1478 if (retval == 0)
1479 return 0;
1480
1481#ifdef CONFIG_PNP
1482 if (pnp_driver_registered)
1483 pnp_unregister_driver(&cmos_pnp_driver);
1484#endif
1485 return retval;
1486}
1487module_init(cmos_init);
1488
1489static void __exit cmos_exit(void)
1490{
1491#ifdef CONFIG_PNP
1492 if (pnp_driver_registered)
1493 pnp_unregister_driver(&cmos_pnp_driver);
1494#endif
1495 if (platform_driver_registered)
1496 platform_driver_unregister(&cmos_platform_driver);
1497}
1498module_exit(cmos_exit);
1499
1500
1501MODULE_AUTHOR("David Brownell");
1502MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1503MODULE_LICENSE("GPL");