blob: 959dcbd8a29c175b3b697e23b784779a365f04ef [file] [log] [blame]
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001/*
2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
David Brazdil0f672f62019-12-10 10:32:29 +000024#include <linux/delay.h>
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000025#include <linux/gpio/consumer.h>
Olivier Deprez157378f2022-04-04 15:47:50 +020026#include <linux/iopoll.h>
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000027#include <linux/module.h>
28#include <linux/of_platform.h>
29#include <linux/platform_device.h>
30#include <linux/regulator/consumer.h>
31
David Brazdil0f672f62019-12-10 10:32:29 +000032#include <video/display_timing.h>
33#include <video/of_display_timing.h>
34#include <video/videomode.h>
35
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000036#include <drm/drm_crtc.h>
David Brazdil0f672f62019-12-10 10:32:29 +000037#include <drm/drm_device.h>
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000038#include <drm/drm_mipi_dsi.h>
39#include <drm/drm_panel.h>
40
David Brazdil0f672f62019-12-10 10:32:29 +000041/**
42 * @modes: Pointer to array of fixed modes appropriate for this panel. If
43 * only one mode then this can just be the address of this the mode.
44 * NOTE: cannot be used with "timings" and also if this is specified
45 * then you cannot override the mode in the device tree.
46 * @num_modes: Number of elements in modes array.
47 * @timings: Pointer to array of display timings. NOTE: cannot be used with
48 * "modes" and also these will be used to validate a device tree
49 * override if one is present.
50 * @num_timings: Number of elements in timings array.
51 * @bpc: Bits per color.
52 * @size: Structure containing the physical size of this panel.
53 * @delay: Structure containing various delay values for this panel.
54 * @bus_format: See MEDIA_BUS_FMT_... defines.
55 * @bus_flags: See DRM_BUS_FLAG_... defines.
56 */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000057struct panel_desc {
58 const struct drm_display_mode *modes;
59 unsigned int num_modes;
60 const struct display_timing *timings;
61 unsigned int num_timings;
62
63 unsigned int bpc;
64
65 /**
66 * @width: width (in millimeters) of the panel's active display area
67 * @height: height (in millimeters) of the panel's active display area
68 */
69 struct {
70 unsigned int width;
71 unsigned int height;
72 } size;
73
74 /**
75 * @prepare: the time (in milliseconds) that it takes for the panel to
76 * become ready and start receiving video data
David Brazdil0f672f62019-12-10 10:32:29 +000077 * @hpd_absent_delay: Add this to the prepare delay if we know Hot
78 * Plug Detect isn't used.
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000079 * @enable: the time (in milliseconds) that it takes for the panel to
80 * display the first valid frame after starting to receive
81 * video data
82 * @disable: the time (in milliseconds) that it takes for the panel to
83 * turn the display off (no content is visible)
84 * @unprepare: the time (in milliseconds) that it takes for the panel
85 * to power itself down completely
86 */
87 struct {
88 unsigned int prepare;
David Brazdil0f672f62019-12-10 10:32:29 +000089 unsigned int hpd_absent_delay;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000090 unsigned int enable;
91 unsigned int disable;
92 unsigned int unprepare;
93 } delay;
94
95 u32 bus_format;
96 u32 bus_flags;
Olivier Deprez157378f2022-04-04 15:47:50 +020097 int connector_type;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000098};
99
100struct panel_simple {
101 struct drm_panel base;
102 bool prepared;
103 bool enabled;
David Brazdil0f672f62019-12-10 10:32:29 +0000104 bool no_hpd;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000105
106 const struct panel_desc *desc;
107
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000108 struct regulator *supply;
109 struct i2c_adapter *ddc;
110
111 struct gpio_desc *enable_gpio;
Olivier Deprez157378f2022-04-04 15:47:50 +0200112 struct gpio_desc *hpd_gpio;
David Brazdil0f672f62019-12-10 10:32:29 +0000113
114 struct drm_display_mode override_mode;
Olivier Deprez157378f2022-04-04 15:47:50 +0200115
116 enum drm_panel_orientation orientation;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000117};
118
119static inline struct panel_simple *to_panel_simple(struct drm_panel *panel)
120{
121 return container_of(panel, struct panel_simple, base);
122}
123
Olivier Deprez157378f2022-04-04 15:47:50 +0200124static unsigned int panel_simple_get_timings_modes(struct panel_simple *panel,
125 struct drm_connector *connector)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000126{
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000127 struct drm_display_mode *mode;
128 unsigned int i, num = 0;
129
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000130 for (i = 0; i < panel->desc->num_timings; i++) {
131 const struct display_timing *dt = &panel->desc->timings[i];
132 struct videomode vm;
133
134 videomode_from_timing(dt, &vm);
Olivier Deprez157378f2022-04-04 15:47:50 +0200135 mode = drm_mode_create(connector->dev);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000136 if (!mode) {
Olivier Deprez157378f2022-04-04 15:47:50 +0200137 dev_err(panel->base.dev, "failed to add mode %ux%u\n",
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000138 dt->hactive.typ, dt->vactive.typ);
139 continue;
140 }
141
142 drm_display_mode_from_videomode(&vm, mode);
143
144 mode->type |= DRM_MODE_TYPE_DRIVER;
145
146 if (panel->desc->num_timings == 1)
147 mode->type |= DRM_MODE_TYPE_PREFERRED;
148
149 drm_mode_probed_add(connector, mode);
150 num++;
151 }
152
David Brazdil0f672f62019-12-10 10:32:29 +0000153 return num;
154}
155
Olivier Deprez157378f2022-04-04 15:47:50 +0200156static unsigned int panel_simple_get_display_modes(struct panel_simple *panel,
157 struct drm_connector *connector)
David Brazdil0f672f62019-12-10 10:32:29 +0000158{
David Brazdil0f672f62019-12-10 10:32:29 +0000159 struct drm_display_mode *mode;
160 unsigned int i, num = 0;
161
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000162 for (i = 0; i < panel->desc->num_modes; i++) {
163 const struct drm_display_mode *m = &panel->desc->modes[i];
164
Olivier Deprez157378f2022-04-04 15:47:50 +0200165 mode = drm_mode_duplicate(connector->dev, m);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000166 if (!mode) {
Olivier Deprez157378f2022-04-04 15:47:50 +0200167 dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n",
168 m->hdisplay, m->vdisplay,
169 drm_mode_vrefresh(m));
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000170 continue;
171 }
172
173 mode->type |= DRM_MODE_TYPE_DRIVER;
174
175 if (panel->desc->num_modes == 1)
176 mode->type |= DRM_MODE_TYPE_PREFERRED;
177
178 drm_mode_set_name(mode);
179
180 drm_mode_probed_add(connector, mode);
181 num++;
182 }
183
David Brazdil0f672f62019-12-10 10:32:29 +0000184 return num;
185}
186
Olivier Deprez157378f2022-04-04 15:47:50 +0200187static int panel_simple_get_non_edid_modes(struct panel_simple *panel,
188 struct drm_connector *connector)
David Brazdil0f672f62019-12-10 10:32:29 +0000189{
David Brazdil0f672f62019-12-10 10:32:29 +0000190 struct drm_display_mode *mode;
191 bool has_override = panel->override_mode.type;
192 unsigned int num = 0;
193
194 if (!panel->desc)
195 return 0;
196
197 if (has_override) {
Olivier Deprez157378f2022-04-04 15:47:50 +0200198 mode = drm_mode_duplicate(connector->dev,
199 &panel->override_mode);
David Brazdil0f672f62019-12-10 10:32:29 +0000200 if (mode) {
201 drm_mode_probed_add(connector, mode);
202 num = 1;
203 } else {
Olivier Deprez157378f2022-04-04 15:47:50 +0200204 dev_err(panel->base.dev, "failed to add override mode\n");
David Brazdil0f672f62019-12-10 10:32:29 +0000205 }
206 }
207
208 /* Only add timings if override was not there or failed to validate */
209 if (num == 0 && panel->desc->num_timings)
Olivier Deprez157378f2022-04-04 15:47:50 +0200210 num = panel_simple_get_timings_modes(panel, connector);
David Brazdil0f672f62019-12-10 10:32:29 +0000211
212 /*
213 * Only add fixed modes if timings/override added no mode.
214 *
215 * We should only ever have either the display timings specified
216 * or a fixed mode. Anything else is rather bogus.
217 */
218 WARN_ON(panel->desc->num_timings && panel->desc->num_modes);
219 if (num == 0)
Olivier Deprez157378f2022-04-04 15:47:50 +0200220 num = panel_simple_get_display_modes(panel, connector);
David Brazdil0f672f62019-12-10 10:32:29 +0000221
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000222 connector->display_info.bpc = panel->desc->bpc;
223 connector->display_info.width_mm = panel->desc->size.width;
224 connector->display_info.height_mm = panel->desc->size.height;
225 if (panel->desc->bus_format)
226 drm_display_info_set_bus_formats(&connector->display_info,
227 &panel->desc->bus_format, 1);
228 connector->display_info.bus_flags = panel->desc->bus_flags;
229
230 return num;
231}
232
233static int panel_simple_disable(struct drm_panel *panel)
234{
235 struct panel_simple *p = to_panel_simple(panel);
236
237 if (!p->enabled)
238 return 0;
239
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000240 if (p->desc->delay.disable)
241 msleep(p->desc->delay.disable);
242
243 p->enabled = false;
244
245 return 0;
246}
247
248static int panel_simple_unprepare(struct drm_panel *panel)
249{
250 struct panel_simple *p = to_panel_simple(panel);
251
252 if (!p->prepared)
253 return 0;
254
255 gpiod_set_value_cansleep(p->enable_gpio, 0);
256
257 regulator_disable(p->supply);
258
259 if (p->desc->delay.unprepare)
260 msleep(p->desc->delay.unprepare);
261
262 p->prepared = false;
263
264 return 0;
265}
266
Olivier Deprez157378f2022-04-04 15:47:50 +0200267static int panel_simple_get_hpd_gpio(struct device *dev,
268 struct panel_simple *p, bool from_probe)
269{
270 int err;
271
272 p->hpd_gpio = devm_gpiod_get_optional(dev, "hpd", GPIOD_IN);
273 if (IS_ERR(p->hpd_gpio)) {
274 err = PTR_ERR(p->hpd_gpio);
275
276 /*
277 * If we're called from probe we won't consider '-EPROBE_DEFER'
278 * to be an error--we'll leave the error code in "hpd_gpio".
279 * When we try to use it we'll try again. This allows for
280 * circular dependencies where the component providing the
281 * hpd gpio needs the panel to init before probing.
282 */
283 if (err != -EPROBE_DEFER || !from_probe) {
284 dev_err(dev, "failed to get 'hpd' GPIO: %d\n", err);
285 return err;
286 }
287 }
288
289 return 0;
290}
291
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000292static int panel_simple_prepare(struct drm_panel *panel)
293{
294 struct panel_simple *p = to_panel_simple(panel);
David Brazdil0f672f62019-12-10 10:32:29 +0000295 unsigned int delay;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000296 int err;
Olivier Deprez157378f2022-04-04 15:47:50 +0200297 int hpd_asserted;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000298
299 if (p->prepared)
300 return 0;
301
302 err = regulator_enable(p->supply);
303 if (err < 0) {
304 dev_err(panel->dev, "failed to enable supply: %d\n", err);
305 return err;
306 }
307
308 gpiod_set_value_cansleep(p->enable_gpio, 1);
309
David Brazdil0f672f62019-12-10 10:32:29 +0000310 delay = p->desc->delay.prepare;
311 if (p->no_hpd)
312 delay += p->desc->delay.hpd_absent_delay;
313 if (delay)
314 msleep(delay);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000315
Olivier Deprez157378f2022-04-04 15:47:50 +0200316 if (p->hpd_gpio) {
317 if (IS_ERR(p->hpd_gpio)) {
318 err = panel_simple_get_hpd_gpio(panel->dev, p, false);
319 if (err)
320 return err;
321 }
322
323 err = readx_poll_timeout(gpiod_get_value_cansleep, p->hpd_gpio,
324 hpd_asserted, hpd_asserted,
325 1000, 2000000);
326 if (hpd_asserted < 0)
327 err = hpd_asserted;
328
329 if (err) {
330 dev_err(panel->dev,
331 "error waiting for hpd GPIO: %d\n", err);
332 return err;
333 }
334 }
335
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000336 p->prepared = true;
337
338 return 0;
339}
340
341static int panel_simple_enable(struct drm_panel *panel)
342{
343 struct panel_simple *p = to_panel_simple(panel);
344
345 if (p->enabled)
346 return 0;
347
348 if (p->desc->delay.enable)
349 msleep(p->desc->delay.enable);
350
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000351 p->enabled = true;
352
353 return 0;
354}
355
Olivier Deprez157378f2022-04-04 15:47:50 +0200356static int panel_simple_get_modes(struct drm_panel *panel,
357 struct drm_connector *connector)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000358{
359 struct panel_simple *p = to_panel_simple(panel);
360 int num = 0;
361
362 /* probe EDID if a DDC bus is available */
363 if (p->ddc) {
Olivier Deprez157378f2022-04-04 15:47:50 +0200364 struct edid *edid = drm_get_edid(connector, p->ddc);
365
366 drm_connector_update_edid_property(connector, edid);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000367 if (edid) {
Olivier Deprez157378f2022-04-04 15:47:50 +0200368 num += drm_add_edid_modes(connector, edid);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000369 kfree(edid);
370 }
371 }
372
373 /* add hard-coded panel modes */
Olivier Deprez157378f2022-04-04 15:47:50 +0200374 num += panel_simple_get_non_edid_modes(p, connector);
375
376 /* set up connector's "panel orientation" property */
377 drm_connector_set_panel_orientation(connector, p->orientation);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000378
379 return num;
380}
381
382static int panel_simple_get_timings(struct drm_panel *panel,
383 unsigned int num_timings,
384 struct display_timing *timings)
385{
386 struct panel_simple *p = to_panel_simple(panel);
387 unsigned int i;
388
389 if (p->desc->num_timings < num_timings)
390 num_timings = p->desc->num_timings;
391
392 if (timings)
393 for (i = 0; i < num_timings; i++)
394 timings[i] = p->desc->timings[i];
395
396 return p->desc->num_timings;
397}
398
399static const struct drm_panel_funcs panel_simple_funcs = {
400 .disable = panel_simple_disable,
401 .unprepare = panel_simple_unprepare,
402 .prepare = panel_simple_prepare,
403 .enable = panel_simple_enable,
404 .get_modes = panel_simple_get_modes,
405 .get_timings = panel_simple_get_timings,
406};
407
Olivier Deprez157378f2022-04-04 15:47:50 +0200408static struct panel_desc panel_dpi;
409
410static int panel_dpi_probe(struct device *dev,
411 struct panel_simple *panel)
412{
413 struct display_timing *timing;
414 const struct device_node *np;
415 struct panel_desc *desc;
416 unsigned int bus_flags;
417 struct videomode vm;
418 int ret;
419
420 np = dev->of_node;
421 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
422 if (!desc)
423 return -ENOMEM;
424
425 timing = devm_kzalloc(dev, sizeof(*timing), GFP_KERNEL);
426 if (!timing)
427 return -ENOMEM;
428
429 ret = of_get_display_timing(np, "panel-timing", timing);
430 if (ret < 0) {
431 dev_err(dev, "%pOF: no panel-timing node found for \"panel-dpi\" binding\n",
432 np);
433 return ret;
434 }
435
436 desc->timings = timing;
437 desc->num_timings = 1;
438
439 of_property_read_u32(np, "width-mm", &desc->size.width);
440 of_property_read_u32(np, "height-mm", &desc->size.height);
441
442 /* Extract bus_flags from display_timing */
443 bus_flags = 0;
444 vm.flags = timing->flags;
445 drm_bus_flags_from_videomode(&vm, &bus_flags);
446 desc->bus_flags = bus_flags;
447
448 /* We do not know the connector for the DT node, so guess it */
449 desc->connector_type = DRM_MODE_CONNECTOR_DPI;
450
451 panel->desc = desc;
452
453 return 0;
454}
455
David Brazdil0f672f62019-12-10 10:32:29 +0000456#define PANEL_SIMPLE_BOUNDS_CHECK(to_check, bounds, field) \
457 (to_check->field.typ >= bounds->field.min && \
458 to_check->field.typ <= bounds->field.max)
459static void panel_simple_parse_panel_timing_node(struct device *dev,
460 struct panel_simple *panel,
461 const struct display_timing *ot)
462{
463 const struct panel_desc *desc = panel->desc;
464 struct videomode vm;
465 unsigned int i;
466
467 if (WARN_ON(desc->num_modes)) {
468 dev_err(dev, "Reject override mode: panel has a fixed mode\n");
469 return;
470 }
471 if (WARN_ON(!desc->num_timings)) {
472 dev_err(dev, "Reject override mode: no timings specified\n");
473 return;
474 }
475
476 for (i = 0; i < panel->desc->num_timings; i++) {
477 const struct display_timing *dt = &panel->desc->timings[i];
478
479 if (!PANEL_SIMPLE_BOUNDS_CHECK(ot, dt, hactive) ||
480 !PANEL_SIMPLE_BOUNDS_CHECK(ot, dt, hfront_porch) ||
481 !PANEL_SIMPLE_BOUNDS_CHECK(ot, dt, hback_porch) ||
482 !PANEL_SIMPLE_BOUNDS_CHECK(ot, dt, hsync_len) ||
483 !PANEL_SIMPLE_BOUNDS_CHECK(ot, dt, vactive) ||
484 !PANEL_SIMPLE_BOUNDS_CHECK(ot, dt, vfront_porch) ||
485 !PANEL_SIMPLE_BOUNDS_CHECK(ot, dt, vback_porch) ||
486 !PANEL_SIMPLE_BOUNDS_CHECK(ot, dt, vsync_len))
487 continue;
488
489 if (ot->flags != dt->flags)
490 continue;
491
492 videomode_from_timing(ot, &vm);
493 drm_display_mode_from_videomode(&vm, &panel->override_mode);
494 panel->override_mode.type |= DRM_MODE_TYPE_DRIVER |
495 DRM_MODE_TYPE_PREFERRED;
496 break;
497 }
498
499 if (WARN_ON(!panel->override_mode.type))
500 dev_err(dev, "Reject override mode: No display_timing found\n");
501}
502
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000503static int panel_simple_probe(struct device *dev, const struct panel_desc *desc)
504{
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000505 struct panel_simple *panel;
David Brazdil0f672f62019-12-10 10:32:29 +0000506 struct display_timing dt;
Olivier Deprez157378f2022-04-04 15:47:50 +0200507 struct device_node *ddc;
508 int connector_type;
509 u32 bus_flags;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000510 int err;
511
512 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
513 if (!panel)
514 return -ENOMEM;
515
516 panel->enabled = false;
517 panel->prepared = false;
518 panel->desc = desc;
519
David Brazdil0f672f62019-12-10 10:32:29 +0000520 panel->no_hpd = of_property_read_bool(dev->of_node, "no-hpd");
Olivier Deprez157378f2022-04-04 15:47:50 +0200521 if (!panel->no_hpd) {
522 err = panel_simple_get_hpd_gpio(dev, panel, true);
523 if (err)
524 return err;
525 }
David Brazdil0f672f62019-12-10 10:32:29 +0000526
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000527 panel->supply = devm_regulator_get(dev, "power");
528 if (IS_ERR(panel->supply))
529 return PTR_ERR(panel->supply);
530
531 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable",
532 GPIOD_OUT_LOW);
533 if (IS_ERR(panel->enable_gpio)) {
534 err = PTR_ERR(panel->enable_gpio);
535 if (err != -EPROBE_DEFER)
536 dev_err(dev, "failed to request GPIO: %d\n", err);
537 return err;
538 }
539
Olivier Deprez157378f2022-04-04 15:47:50 +0200540 err = of_drm_get_panel_orientation(dev->of_node, &panel->orientation);
541 if (err) {
542 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
543 return err;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000544 }
545
546 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0);
547 if (ddc) {
548 panel->ddc = of_find_i2c_adapter_by_node(ddc);
549 of_node_put(ddc);
550
Olivier Deprez157378f2022-04-04 15:47:50 +0200551 if (!panel->ddc)
552 return -EPROBE_DEFER;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000553 }
554
Olivier Deprez157378f2022-04-04 15:47:50 +0200555 if (desc == &panel_dpi) {
556 /* Handle the generic panel-dpi binding */
557 err = panel_dpi_probe(dev, panel);
558 if (err)
559 goto free_ddc;
560 desc = panel->desc;
561 } else {
562 if (!of_get_display_timing(dev->of_node, "panel-timing", &dt))
563 panel_simple_parse_panel_timing_node(dev, panel, &dt);
564 }
David Brazdil0f672f62019-12-10 10:32:29 +0000565
Olivier Deprez157378f2022-04-04 15:47:50 +0200566 connector_type = desc->connector_type;
567 /* Catch common mistakes for panels. */
568 switch (connector_type) {
569 case 0:
570 dev_warn(dev, "Specify missing connector_type\n");
571 connector_type = DRM_MODE_CONNECTOR_DPI;
572 break;
573 case DRM_MODE_CONNECTOR_LVDS:
574 WARN_ON(desc->bus_flags &
575 ~(DRM_BUS_FLAG_DE_LOW |
576 DRM_BUS_FLAG_DE_HIGH |
577 DRM_BUS_FLAG_DATA_MSB_TO_LSB |
578 DRM_BUS_FLAG_DATA_LSB_TO_MSB));
579 WARN_ON(desc->bus_format != MEDIA_BUS_FMT_RGB666_1X7X3_SPWG &&
580 desc->bus_format != MEDIA_BUS_FMT_RGB888_1X7X4_SPWG &&
581 desc->bus_format != MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA);
582 WARN_ON(desc->bus_format == MEDIA_BUS_FMT_RGB666_1X7X3_SPWG &&
583 desc->bpc != 6);
584 WARN_ON((desc->bus_format == MEDIA_BUS_FMT_RGB888_1X7X4_SPWG ||
585 desc->bus_format == MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA) &&
586 desc->bpc != 8);
587 break;
588 case DRM_MODE_CONNECTOR_eDP:
589 if (desc->bus_format == 0)
590 dev_warn(dev, "Specify missing bus_format\n");
591 if (desc->bpc != 6 && desc->bpc != 8)
592 dev_warn(dev, "Expected bpc in {6,8} but got: %u\n", desc->bpc);
593 break;
594 case DRM_MODE_CONNECTOR_DSI:
595 if (desc->bpc != 6 && desc->bpc != 8)
596 dev_warn(dev, "Expected bpc in {6,8} but got: %u\n", desc->bpc);
597 break;
598 case DRM_MODE_CONNECTOR_DPI:
599 bus_flags = DRM_BUS_FLAG_DE_LOW |
600 DRM_BUS_FLAG_DE_HIGH |
601 DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE |
602 DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE |
603 DRM_BUS_FLAG_DATA_MSB_TO_LSB |
604 DRM_BUS_FLAG_DATA_LSB_TO_MSB |
605 DRM_BUS_FLAG_SYNC_SAMPLE_POSEDGE |
606 DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE;
607 if (desc->bus_flags & ~bus_flags)
608 dev_warn(dev, "Unexpected bus_flags(%d)\n", desc->bus_flags & ~bus_flags);
609 if (!(desc->bus_flags & bus_flags))
610 dev_warn(dev, "Specify missing bus_flags\n");
611 if (desc->bus_format == 0)
612 dev_warn(dev, "Specify missing bus_format\n");
613 if (desc->bpc != 6 && desc->bpc != 8)
614 dev_warn(dev, "Expected bpc in {6,8} but got: %u\n", desc->bpc);
615 break;
616 default:
617 dev_warn(dev, "Specify a valid connector_type: %d\n", desc->connector_type);
618 connector_type = DRM_MODE_CONNECTOR_DPI;
619 break;
620 }
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000621
Olivier Deprez157378f2022-04-04 15:47:50 +0200622 drm_panel_init(&panel->base, dev, &panel_simple_funcs, connector_type);
623
624 err = drm_panel_of_backlight(&panel->base);
625 if (err)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000626 goto free_ddc;
627
Olivier Deprez157378f2022-04-04 15:47:50 +0200628 drm_panel_add(&panel->base);
629
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000630 dev_set_drvdata(dev, panel);
631
632 return 0;
633
634free_ddc:
635 if (panel->ddc)
636 put_device(&panel->ddc->dev);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000637
638 return err;
639}
640
641static int panel_simple_remove(struct device *dev)
642{
643 struct panel_simple *panel = dev_get_drvdata(dev);
644
645 drm_panel_remove(&panel->base);
Olivier Deprez157378f2022-04-04 15:47:50 +0200646 drm_panel_disable(&panel->base);
647 drm_panel_unprepare(&panel->base);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000648
649 if (panel->ddc)
650 put_device(&panel->ddc->dev);
651
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000652 return 0;
653}
654
655static void panel_simple_shutdown(struct device *dev)
656{
657 struct panel_simple *panel = dev_get_drvdata(dev);
658
Olivier Deprez157378f2022-04-04 15:47:50 +0200659 drm_panel_disable(&panel->base);
660 drm_panel_unprepare(&panel->base);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000661}
662
Olivier Deprez157378f2022-04-04 15:47:50 +0200663static const struct drm_display_mode ampire_am_1280800n3tzqw_t00h_mode = {
664 .clock = 71100,
665 .hdisplay = 1280,
666 .hsync_start = 1280 + 40,
667 .hsync_end = 1280 + 40 + 80,
668 .htotal = 1280 + 40 + 80 + 40,
669 .vdisplay = 800,
670 .vsync_start = 800 + 3,
671 .vsync_end = 800 + 3 + 10,
672 .vtotal = 800 + 3 + 10 + 10,
673 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
674};
675
676static const struct panel_desc ampire_am_1280800n3tzqw_t00h = {
677 .modes = &ampire_am_1280800n3tzqw_t00h_mode,
678 .num_modes = 1,
679 .bpc = 6,
680 .size = {
681 .width = 217,
682 .height = 136,
683 },
684 .bus_flags = DRM_BUS_FLAG_DE_HIGH,
685 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
686 .connector_type = DRM_MODE_CONNECTOR_LVDS,
687};
688
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000689static const struct drm_display_mode ampire_am_480272h3tmqw_t01h_mode = {
690 .clock = 9000,
691 .hdisplay = 480,
692 .hsync_start = 480 + 2,
693 .hsync_end = 480 + 2 + 41,
694 .htotal = 480 + 2 + 41 + 2,
695 .vdisplay = 272,
696 .vsync_start = 272 + 2,
697 .vsync_end = 272 + 2 + 10,
698 .vtotal = 272 + 2 + 10 + 2,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000699 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
700};
701
702static const struct panel_desc ampire_am_480272h3tmqw_t01h = {
703 .modes = &ampire_am_480272h3tmqw_t01h_mode,
704 .num_modes = 1,
705 .bpc = 8,
706 .size = {
707 .width = 105,
708 .height = 67,
709 },
710 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
711};
712
713static const struct drm_display_mode ampire_am800480r3tmqwa1h_mode = {
714 .clock = 33333,
715 .hdisplay = 800,
716 .hsync_start = 800 + 0,
717 .hsync_end = 800 + 0 + 255,
718 .htotal = 800 + 0 + 255 + 0,
719 .vdisplay = 480,
720 .vsync_start = 480 + 2,
721 .vsync_end = 480 + 2 + 45,
722 .vtotal = 480 + 2 + 45 + 0,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000723 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
724};
725
726static const struct panel_desc ampire_am800480r3tmqwa1h = {
727 .modes = &ampire_am800480r3tmqwa1h_mode,
728 .num_modes = 1,
729 .bpc = 6,
730 .size = {
731 .width = 152,
732 .height = 91,
733 },
734 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
735};
736
David Brazdil0f672f62019-12-10 10:32:29 +0000737static const struct display_timing santek_st0700i5y_rbslw_f_timing = {
738 .pixelclock = { 26400000, 33300000, 46800000 },
739 .hactive = { 800, 800, 800 },
740 .hfront_porch = { 16, 210, 354 },
741 .hback_porch = { 45, 36, 6 },
742 .hsync_len = { 1, 10, 40 },
743 .vactive = { 480, 480, 480 },
744 .vfront_porch = { 7, 22, 147 },
745 .vback_porch = { 22, 13, 3 },
746 .vsync_len = { 1, 10, 20 },
747 .flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
748 DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE
749};
750
751static const struct panel_desc armadeus_st0700_adapt = {
752 .timings = &santek_st0700i5y_rbslw_f_timing,
753 .num_timings = 1,
754 .bpc = 6,
755 .size = {
756 .width = 154,
757 .height = 86,
758 },
759 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
Olivier Deprez157378f2022-04-04 15:47:50 +0200760 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE,
David Brazdil0f672f62019-12-10 10:32:29 +0000761};
762
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000763static const struct drm_display_mode auo_b101aw03_mode = {
764 .clock = 51450,
765 .hdisplay = 1024,
766 .hsync_start = 1024 + 156,
767 .hsync_end = 1024 + 156 + 8,
768 .htotal = 1024 + 156 + 8 + 156,
769 .vdisplay = 600,
770 .vsync_start = 600 + 16,
771 .vsync_end = 600 + 16 + 6,
772 .vtotal = 600 + 16 + 6 + 16,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000773};
774
775static const struct panel_desc auo_b101aw03 = {
776 .modes = &auo_b101aw03_mode,
777 .num_modes = 1,
778 .bpc = 6,
779 .size = {
780 .width = 223,
781 .height = 125,
782 },
Olivier Deprez157378f2022-04-04 15:47:50 +0200783 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
784 .bus_flags = DRM_BUS_FLAG_DE_HIGH,
785 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000786};
787
David Brazdil0f672f62019-12-10 10:32:29 +0000788static const struct display_timing auo_b101ean01_timing = {
789 .pixelclock = { 65300000, 72500000, 75000000 },
790 .hactive = { 1280, 1280, 1280 },
791 .hfront_porch = { 18, 119, 119 },
792 .hback_porch = { 21, 21, 21 },
793 .hsync_len = { 32, 32, 32 },
794 .vactive = { 800, 800, 800 },
795 .vfront_porch = { 4, 4, 4 },
796 .vback_porch = { 8, 8, 8 },
797 .vsync_len = { 18, 20, 20 },
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000798};
799
800static const struct panel_desc auo_b101ean01 = {
David Brazdil0f672f62019-12-10 10:32:29 +0000801 .timings = &auo_b101ean01_timing,
802 .num_timings = 1,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000803 .bpc = 6,
804 .size = {
805 .width = 217,
806 .height = 136,
807 },
808};
809
810static const struct drm_display_mode auo_b101xtn01_mode = {
811 .clock = 72000,
812 .hdisplay = 1366,
813 .hsync_start = 1366 + 20,
814 .hsync_end = 1366 + 20 + 70,
815 .htotal = 1366 + 20 + 70,
816 .vdisplay = 768,
817 .vsync_start = 768 + 14,
818 .vsync_end = 768 + 14 + 42,
819 .vtotal = 768 + 14 + 42,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000820 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
821};
822
823static const struct panel_desc auo_b101xtn01 = {
824 .modes = &auo_b101xtn01_mode,
825 .num_modes = 1,
826 .bpc = 6,
827 .size = {
828 .width = 223,
829 .height = 125,
830 },
831};
832
Olivier Deprez157378f2022-04-04 15:47:50 +0200833static const struct drm_display_mode auo_b116xak01_mode = {
834 .clock = 69300,
835 .hdisplay = 1366,
836 .hsync_start = 1366 + 48,
837 .hsync_end = 1366 + 48 + 32,
838 .htotal = 1366 + 48 + 32 + 10,
839 .vdisplay = 768,
840 .vsync_start = 768 + 4,
841 .vsync_end = 768 + 4 + 6,
842 .vtotal = 768 + 4 + 6 + 15,
843 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
844};
845
846static const struct panel_desc auo_b116xak01 = {
847 .modes = &auo_b116xak01_mode,
848 .num_modes = 1,
849 .bpc = 6,
850 .size = {
851 .width = 256,
852 .height = 144,
853 },
854 .delay = {
855 .hpd_absent_delay = 200,
856 },
857 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
858 .connector_type = DRM_MODE_CONNECTOR_eDP,
859};
860
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000861static const struct drm_display_mode auo_b116xw03_mode = {
862 .clock = 70589,
863 .hdisplay = 1366,
864 .hsync_start = 1366 + 40,
865 .hsync_end = 1366 + 40 + 40,
866 .htotal = 1366 + 40 + 40 + 32,
867 .vdisplay = 768,
868 .vsync_start = 768 + 10,
869 .vsync_end = 768 + 10 + 12,
870 .vtotal = 768 + 10 + 12 + 6,
Olivier Deprez157378f2022-04-04 15:47:50 +0200871 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000872};
873
874static const struct panel_desc auo_b116xw03 = {
875 .modes = &auo_b116xw03_mode,
876 .num_modes = 1,
877 .bpc = 6,
878 .size = {
879 .width = 256,
880 .height = 144,
881 },
Olivier Deprez157378f2022-04-04 15:47:50 +0200882 .delay = {
883 .enable = 400,
884 },
885 .bus_flags = DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE,
886 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
887 .connector_type = DRM_MODE_CONNECTOR_eDP,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000888};
889
890static const struct drm_display_mode auo_b133xtn01_mode = {
891 .clock = 69500,
892 .hdisplay = 1366,
893 .hsync_start = 1366 + 48,
894 .hsync_end = 1366 + 48 + 32,
895 .htotal = 1366 + 48 + 32 + 20,
896 .vdisplay = 768,
897 .vsync_start = 768 + 3,
898 .vsync_end = 768 + 3 + 6,
899 .vtotal = 768 + 3 + 6 + 13,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000900};
901
902static const struct panel_desc auo_b133xtn01 = {
903 .modes = &auo_b133xtn01_mode,
904 .num_modes = 1,
905 .bpc = 6,
906 .size = {
907 .width = 293,
908 .height = 165,
909 },
910};
911
912static const struct drm_display_mode auo_b133htn01_mode = {
913 .clock = 150660,
914 .hdisplay = 1920,
915 .hsync_start = 1920 + 172,
916 .hsync_end = 1920 + 172 + 80,
917 .htotal = 1920 + 172 + 80 + 60,
918 .vdisplay = 1080,
919 .vsync_start = 1080 + 25,
920 .vsync_end = 1080 + 25 + 10,
921 .vtotal = 1080 + 25 + 10 + 10,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000922};
923
924static const struct panel_desc auo_b133htn01 = {
925 .modes = &auo_b133htn01_mode,
926 .num_modes = 1,
927 .bpc = 6,
928 .size = {
929 .width = 293,
930 .height = 165,
931 },
932 .delay = {
933 .prepare = 105,
934 .enable = 20,
935 .unprepare = 50,
936 },
937};
938
939static const struct display_timing auo_g070vvn01_timings = {
940 .pixelclock = { 33300000, 34209000, 45000000 },
941 .hactive = { 800, 800, 800 },
942 .hfront_porch = { 20, 40, 200 },
943 .hback_porch = { 87, 40, 1 },
944 .hsync_len = { 1, 48, 87 },
945 .vactive = { 480, 480, 480 },
946 .vfront_porch = { 5, 13, 200 },
947 .vback_porch = { 31, 31, 29 },
948 .vsync_len = { 1, 1, 3 },
949};
950
951static const struct panel_desc auo_g070vvn01 = {
952 .timings = &auo_g070vvn01_timings,
953 .num_timings = 1,
954 .bpc = 8,
955 .size = {
956 .width = 152,
957 .height = 91,
958 },
959 .delay = {
960 .prepare = 200,
961 .enable = 50,
962 .disable = 50,
963 .unprepare = 1000,
964 },
965};
966
David Brazdil0f672f62019-12-10 10:32:29 +0000967static const struct drm_display_mode auo_g101evn010_mode = {
968 .clock = 68930,
969 .hdisplay = 1280,
970 .hsync_start = 1280 + 82,
971 .hsync_end = 1280 + 82 + 2,
972 .htotal = 1280 + 82 + 2 + 84,
973 .vdisplay = 800,
974 .vsync_start = 800 + 8,
975 .vsync_end = 800 + 8 + 2,
976 .vtotal = 800 + 8 + 2 + 6,
David Brazdil0f672f62019-12-10 10:32:29 +0000977};
978
979static const struct panel_desc auo_g101evn010 = {
980 .modes = &auo_g101evn010_mode,
981 .num_modes = 1,
982 .bpc = 6,
983 .size = {
984 .width = 216,
985 .height = 135,
986 },
Olivier Deprez157378f2022-04-04 15:47:50 +0200987 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
988 .connector_type = DRM_MODE_CONNECTOR_LVDS,
David Brazdil0f672f62019-12-10 10:32:29 +0000989};
990
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000991static const struct drm_display_mode auo_g104sn02_mode = {
992 .clock = 40000,
993 .hdisplay = 800,
994 .hsync_start = 800 + 40,
995 .hsync_end = 800 + 40 + 216,
996 .htotal = 800 + 40 + 216 + 128,
997 .vdisplay = 600,
998 .vsync_start = 600 + 10,
999 .vsync_end = 600 + 10 + 35,
1000 .vtotal = 600 + 10 + 35 + 2,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001001};
1002
1003static const struct panel_desc auo_g104sn02 = {
1004 .modes = &auo_g104sn02_mode,
1005 .num_modes = 1,
1006 .bpc = 8,
1007 .size = {
1008 .width = 211,
1009 .height = 158,
1010 },
1011};
1012
Olivier Deprez157378f2022-04-04 15:47:50 +02001013static const struct drm_display_mode auo_g121ean01_mode = {
1014 .clock = 66700,
1015 .hdisplay = 1280,
1016 .hsync_start = 1280 + 58,
1017 .hsync_end = 1280 + 58 + 8,
1018 .htotal = 1280 + 58 + 8 + 70,
1019 .vdisplay = 800,
1020 .vsync_start = 800 + 6,
1021 .vsync_end = 800 + 6 + 4,
1022 .vtotal = 800 + 6 + 4 + 10,
1023};
1024
1025static const struct panel_desc auo_g121ean01 = {
1026 .modes = &auo_g121ean01_mode,
1027 .num_modes = 1,
1028 .bpc = 8,
1029 .size = {
1030 .width = 261,
1031 .height = 163,
1032 },
1033 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
1034 .connector_type = DRM_MODE_CONNECTOR_LVDS,
1035};
1036
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001037static const struct display_timing auo_g133han01_timings = {
1038 .pixelclock = { 134000000, 141200000, 149000000 },
1039 .hactive = { 1920, 1920, 1920 },
1040 .hfront_porch = { 39, 58, 77 },
1041 .hback_porch = { 59, 88, 117 },
1042 .hsync_len = { 28, 42, 56 },
1043 .vactive = { 1080, 1080, 1080 },
1044 .vfront_porch = { 3, 8, 11 },
1045 .vback_porch = { 5, 14, 19 },
1046 .vsync_len = { 4, 14, 19 },
1047};
1048
1049static const struct panel_desc auo_g133han01 = {
1050 .timings = &auo_g133han01_timings,
1051 .num_timings = 1,
1052 .bpc = 8,
1053 .size = {
1054 .width = 293,
1055 .height = 165,
1056 },
1057 .delay = {
1058 .prepare = 200,
1059 .enable = 50,
1060 .disable = 50,
1061 .unprepare = 1000,
1062 },
1063 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA,
Olivier Deprez157378f2022-04-04 15:47:50 +02001064 .connector_type = DRM_MODE_CONNECTOR_LVDS,
1065};
1066
1067static const struct drm_display_mode auo_g156xtn01_mode = {
1068 .clock = 76000,
1069 .hdisplay = 1366,
1070 .hsync_start = 1366 + 33,
1071 .hsync_end = 1366 + 33 + 67,
1072 .htotal = 1560,
1073 .vdisplay = 768,
1074 .vsync_start = 768 + 4,
1075 .vsync_end = 768 + 4 + 4,
1076 .vtotal = 806,
1077};
1078
1079static const struct panel_desc auo_g156xtn01 = {
1080 .modes = &auo_g156xtn01_mode,
1081 .num_modes = 1,
1082 .bpc = 8,
1083 .size = {
1084 .width = 344,
1085 .height = 194,
1086 },
1087 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
1088 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001089};
1090
1091static const struct display_timing auo_g185han01_timings = {
1092 .pixelclock = { 120000000, 144000000, 175000000 },
1093 .hactive = { 1920, 1920, 1920 },
David Brazdil0f672f62019-12-10 10:32:29 +00001094 .hfront_porch = { 36, 120, 148 },
1095 .hback_porch = { 24, 88, 108 },
1096 .hsync_len = { 20, 48, 64 },
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001097 .vactive = { 1080, 1080, 1080 },
1098 .vfront_porch = { 6, 10, 40 },
1099 .vback_porch = { 2, 5, 20 },
1100 .vsync_len = { 2, 5, 20 },
1101};
1102
1103static const struct panel_desc auo_g185han01 = {
1104 .timings = &auo_g185han01_timings,
1105 .num_timings = 1,
1106 .bpc = 8,
1107 .size = {
1108 .width = 409,
1109 .height = 230,
1110 },
1111 .delay = {
1112 .prepare = 50,
1113 .enable = 200,
1114 .disable = 110,
1115 .unprepare = 1000,
1116 },
1117 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02001118 .connector_type = DRM_MODE_CONNECTOR_LVDS,
1119};
1120
1121static const struct display_timing auo_g190ean01_timings = {
1122 .pixelclock = { 90000000, 108000000, 135000000 },
1123 .hactive = { 1280, 1280, 1280 },
1124 .hfront_porch = { 126, 184, 1266 },
1125 .hback_porch = { 84, 122, 844 },
1126 .hsync_len = { 70, 102, 704 },
1127 .vactive = { 1024, 1024, 1024 },
1128 .vfront_porch = { 4, 26, 76 },
1129 .vback_porch = { 2, 8, 25 },
1130 .vsync_len = { 2, 8, 25 },
1131};
1132
1133static const struct panel_desc auo_g190ean01 = {
1134 .timings = &auo_g190ean01_timings,
1135 .num_timings = 1,
1136 .bpc = 8,
1137 .size = {
1138 .width = 376,
1139 .height = 301,
1140 },
1141 .delay = {
1142 .prepare = 50,
1143 .enable = 200,
1144 .disable = 110,
1145 .unprepare = 1000,
1146 },
1147 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
1148 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001149};
1150
1151static const struct display_timing auo_p320hvn03_timings = {
1152 .pixelclock = { 106000000, 148500000, 164000000 },
1153 .hactive = { 1920, 1920, 1920 },
1154 .hfront_porch = { 25, 50, 130 },
1155 .hback_porch = { 25, 50, 130 },
1156 .hsync_len = { 20, 40, 105 },
1157 .vactive = { 1080, 1080, 1080 },
1158 .vfront_porch = { 8, 17, 150 },
1159 .vback_porch = { 8, 17, 150 },
1160 .vsync_len = { 4, 11, 100 },
1161};
1162
1163static const struct panel_desc auo_p320hvn03 = {
1164 .timings = &auo_p320hvn03_timings,
1165 .num_timings = 1,
1166 .bpc = 8,
1167 .size = {
1168 .width = 698,
1169 .height = 393,
1170 },
1171 .delay = {
1172 .prepare = 1,
1173 .enable = 450,
1174 .unprepare = 500,
1175 },
1176 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02001177 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001178};
1179
1180static const struct drm_display_mode auo_t215hvn01_mode = {
1181 .clock = 148800,
1182 .hdisplay = 1920,
1183 .hsync_start = 1920 + 88,
1184 .hsync_end = 1920 + 88 + 44,
1185 .htotal = 1920 + 88 + 44 + 148,
1186 .vdisplay = 1080,
1187 .vsync_start = 1080 + 4,
1188 .vsync_end = 1080 + 4 + 5,
1189 .vtotal = 1080 + 4 + 5 + 36,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001190};
1191
1192static const struct panel_desc auo_t215hvn01 = {
1193 .modes = &auo_t215hvn01_mode,
1194 .num_modes = 1,
1195 .bpc = 8,
1196 .size = {
1197 .width = 430,
1198 .height = 270,
1199 },
1200 .delay = {
1201 .disable = 5,
1202 .unprepare = 1000,
1203 }
1204};
1205
1206static const struct drm_display_mode avic_tm070ddh03_mode = {
1207 .clock = 51200,
1208 .hdisplay = 1024,
1209 .hsync_start = 1024 + 160,
1210 .hsync_end = 1024 + 160 + 4,
1211 .htotal = 1024 + 160 + 4 + 156,
1212 .vdisplay = 600,
1213 .vsync_start = 600 + 17,
1214 .vsync_end = 600 + 17 + 1,
1215 .vtotal = 600 + 17 + 1 + 17,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001216};
1217
1218static const struct panel_desc avic_tm070ddh03 = {
1219 .modes = &avic_tm070ddh03_mode,
1220 .num_modes = 1,
1221 .bpc = 8,
1222 .size = {
1223 .width = 154,
1224 .height = 90,
1225 },
1226 .delay = {
1227 .prepare = 20,
1228 .enable = 200,
1229 .disable = 200,
1230 },
1231};
1232
David Brazdil0f672f62019-12-10 10:32:29 +00001233static const struct drm_display_mode bananapi_s070wv20_ct16_mode = {
1234 .clock = 30000,
1235 .hdisplay = 800,
1236 .hsync_start = 800 + 40,
1237 .hsync_end = 800 + 40 + 48,
1238 .htotal = 800 + 40 + 48 + 40,
1239 .vdisplay = 480,
1240 .vsync_start = 480 + 13,
1241 .vsync_end = 480 + 13 + 3,
1242 .vtotal = 480 + 13 + 3 + 29,
1243};
1244
1245static const struct panel_desc bananapi_s070wv20_ct16 = {
1246 .modes = &bananapi_s070wv20_ct16_mode,
1247 .num_modes = 1,
1248 .bpc = 6,
1249 .size = {
1250 .width = 154,
1251 .height = 86,
1252 },
1253};
1254
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001255static const struct drm_display_mode boe_hv070wsa_mode = {
David Brazdil0f672f62019-12-10 10:32:29 +00001256 .clock = 42105,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001257 .hdisplay = 1024,
David Brazdil0f672f62019-12-10 10:32:29 +00001258 .hsync_start = 1024 + 30,
1259 .hsync_end = 1024 + 30 + 30,
1260 .htotal = 1024 + 30 + 30 + 30,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001261 .vdisplay = 600,
David Brazdil0f672f62019-12-10 10:32:29 +00001262 .vsync_start = 600 + 10,
1263 .vsync_end = 600 + 10 + 10,
1264 .vtotal = 600 + 10 + 10 + 10,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001265};
1266
1267static const struct panel_desc boe_hv070wsa = {
1268 .modes = &boe_hv070wsa_mode,
1269 .num_modes = 1,
Olivier Deprez157378f2022-04-04 15:47:50 +02001270 .bpc = 8,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001271 .size = {
1272 .width = 154,
1273 .height = 90,
1274 },
Olivier Deprez157378f2022-04-04 15:47:50 +02001275 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
1276 .bus_flags = DRM_BUS_FLAG_DE_HIGH,
1277 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001278};
1279
1280static const struct drm_display_mode boe_nv101wxmn51_modes[] = {
1281 {
1282 .clock = 71900,
1283 .hdisplay = 1280,
1284 .hsync_start = 1280 + 48,
1285 .hsync_end = 1280 + 48 + 32,
1286 .htotal = 1280 + 48 + 32 + 80,
1287 .vdisplay = 800,
1288 .vsync_start = 800 + 3,
1289 .vsync_end = 800 + 3 + 5,
1290 .vtotal = 800 + 3 + 5 + 24,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001291 },
1292 {
1293 .clock = 57500,
1294 .hdisplay = 1280,
1295 .hsync_start = 1280 + 48,
1296 .hsync_end = 1280 + 48 + 32,
1297 .htotal = 1280 + 48 + 32 + 80,
1298 .vdisplay = 800,
1299 .vsync_start = 800 + 3,
1300 .vsync_end = 800 + 3 + 5,
1301 .vtotal = 800 + 3 + 5 + 24,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001302 },
1303};
1304
1305static const struct panel_desc boe_nv101wxmn51 = {
1306 .modes = boe_nv101wxmn51_modes,
1307 .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes),
1308 .bpc = 8,
1309 .size = {
1310 .width = 217,
1311 .height = 136,
1312 },
1313 .delay = {
1314 .prepare = 210,
1315 .enable = 50,
1316 .unprepare = 160,
1317 },
1318};
1319
Olivier Deprez157378f2022-04-04 15:47:50 +02001320/* Also used for boe_nv133fhm_n62 */
1321static const struct drm_display_mode boe_nv133fhm_n61_modes = {
1322 .clock = 147840,
1323 .hdisplay = 1920,
1324 .hsync_start = 1920 + 48,
1325 .hsync_end = 1920 + 48 + 32,
1326 .htotal = 1920 + 48 + 32 + 200,
1327 .vdisplay = 1080,
1328 .vsync_start = 1080 + 3,
1329 .vsync_end = 1080 + 3 + 6,
1330 .vtotal = 1080 + 3 + 6 + 31,
1331 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
1332};
1333
1334/* Also used for boe_nv133fhm_n62 */
1335static const struct panel_desc boe_nv133fhm_n61 = {
1336 .modes = &boe_nv133fhm_n61_modes,
1337 .num_modes = 1,
1338 .bpc = 6,
1339 .size = {
1340 .width = 294,
1341 .height = 165,
1342 },
1343 .delay = {
1344 /*
1345 * When power is first given to the panel there's a short
1346 * spike on the HPD line. It was explained that this spike
1347 * was until the TCON data download was complete. On
1348 * one system this was measured at 8 ms. We'll put 15 ms
1349 * in the prepare delay just to be safe and take it away
1350 * from the hpd_absent_delay (which would otherwise be 200 ms)
1351 * to handle this. That means:
1352 * - If HPD isn't hooked up you still have 200 ms delay.
1353 * - If HPD is hooked up we won't try to look at it for the
1354 * first 15 ms.
1355 */
1356 .prepare = 15,
1357 .hpd_absent_delay = 185,
1358
1359 .unprepare = 500,
1360 },
1361 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
1362 .bus_flags = DRM_BUS_FLAG_DATA_MSB_TO_LSB,
1363 .connector_type = DRM_MODE_CONNECTOR_eDP,
1364};
1365
1366static const struct drm_display_mode boe_nv140fhmn49_modes[] = {
1367 {
1368 .clock = 148500,
1369 .hdisplay = 1920,
1370 .hsync_start = 1920 + 48,
1371 .hsync_end = 1920 + 48 + 32,
1372 .htotal = 2200,
1373 .vdisplay = 1080,
1374 .vsync_start = 1080 + 3,
1375 .vsync_end = 1080 + 3 + 5,
1376 .vtotal = 1125,
1377 },
1378};
1379
1380static const struct panel_desc boe_nv140fhmn49 = {
1381 .modes = boe_nv140fhmn49_modes,
1382 .num_modes = ARRAY_SIZE(boe_nv140fhmn49_modes),
1383 .bpc = 6,
1384 .size = {
1385 .width = 309,
1386 .height = 174,
1387 },
1388 .delay = {
1389 .prepare = 210,
1390 .enable = 50,
1391 .unprepare = 160,
1392 },
1393 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
1394 .connector_type = DRM_MODE_CONNECTOR_eDP,
1395};
1396
David Brazdil0f672f62019-12-10 10:32:29 +00001397static const struct drm_display_mode cdtech_s043wq26h_ct7_mode = {
1398 .clock = 9000,
1399 .hdisplay = 480,
1400 .hsync_start = 480 + 5,
1401 .hsync_end = 480 + 5 + 5,
1402 .htotal = 480 + 5 + 5 + 40,
1403 .vdisplay = 272,
1404 .vsync_start = 272 + 8,
1405 .vsync_end = 272 + 8 + 8,
1406 .vtotal = 272 + 8 + 8 + 8,
David Brazdil0f672f62019-12-10 10:32:29 +00001407 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
1408};
1409
1410static const struct panel_desc cdtech_s043wq26h_ct7 = {
1411 .modes = &cdtech_s043wq26h_ct7_mode,
1412 .num_modes = 1,
1413 .bpc = 8,
1414 .size = {
1415 .width = 95,
1416 .height = 54,
1417 },
1418 .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
1419};
1420
Olivier Deprez157378f2022-04-04 15:47:50 +02001421/* S070PWS19HP-FC21 2017/04/22 */
1422static const struct drm_display_mode cdtech_s070pws19hp_fc21_mode = {
1423 .clock = 51200,
1424 .hdisplay = 1024,
1425 .hsync_start = 1024 + 160,
1426 .hsync_end = 1024 + 160 + 20,
1427 .htotal = 1024 + 160 + 20 + 140,
1428 .vdisplay = 600,
1429 .vsync_start = 600 + 12,
1430 .vsync_end = 600 + 12 + 3,
1431 .vtotal = 600 + 12 + 3 + 20,
1432 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
1433};
1434
1435static const struct panel_desc cdtech_s070pws19hp_fc21 = {
1436 .modes = &cdtech_s070pws19hp_fc21_mode,
1437 .num_modes = 1,
1438 .bpc = 6,
1439 .size = {
1440 .width = 154,
1441 .height = 86,
1442 },
1443 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
1444 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE,
1445 .connector_type = DRM_MODE_CONNECTOR_DPI,
1446};
1447
1448/* S070SWV29HG-DC44 2017/09/21 */
1449static const struct drm_display_mode cdtech_s070swv29hg_dc44_mode = {
1450 .clock = 33300,
1451 .hdisplay = 800,
1452 .hsync_start = 800 + 210,
1453 .hsync_end = 800 + 210 + 2,
1454 .htotal = 800 + 210 + 2 + 44,
1455 .vdisplay = 480,
1456 .vsync_start = 480 + 22,
1457 .vsync_end = 480 + 22 + 2,
1458 .vtotal = 480 + 22 + 2 + 21,
1459 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
1460};
1461
1462static const struct panel_desc cdtech_s070swv29hg_dc44 = {
1463 .modes = &cdtech_s070swv29hg_dc44_mode,
1464 .num_modes = 1,
1465 .bpc = 6,
1466 .size = {
1467 .width = 154,
1468 .height = 86,
1469 },
1470 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
1471 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE,
1472 .connector_type = DRM_MODE_CONNECTOR_DPI,
1473};
1474
David Brazdil0f672f62019-12-10 10:32:29 +00001475static const struct drm_display_mode cdtech_s070wv95_ct16_mode = {
1476 .clock = 35000,
1477 .hdisplay = 800,
1478 .hsync_start = 800 + 40,
1479 .hsync_end = 800 + 40 + 40,
1480 .htotal = 800 + 40 + 40 + 48,
1481 .vdisplay = 480,
1482 .vsync_start = 480 + 29,
1483 .vsync_end = 480 + 29 + 13,
1484 .vtotal = 480 + 29 + 13 + 3,
David Brazdil0f672f62019-12-10 10:32:29 +00001485 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
1486};
1487
1488static const struct panel_desc cdtech_s070wv95_ct16 = {
1489 .modes = &cdtech_s070wv95_ct16_mode,
1490 .num_modes = 1,
1491 .bpc = 8,
1492 .size = {
1493 .width = 154,
1494 .height = 85,
1495 },
1496};
1497
Olivier Deprez157378f2022-04-04 15:47:50 +02001498static const struct display_timing chefree_ch101olhlwh_002_timing = {
1499 .pixelclock = { 68900000, 71100000, 73400000 },
1500 .hactive = { 1280, 1280, 1280 },
1501 .hfront_porch = { 65, 80, 95 },
1502 .hback_porch = { 64, 79, 94 },
1503 .hsync_len = { 1, 1, 1 },
1504 .vactive = { 800, 800, 800 },
1505 .vfront_porch = { 7, 11, 14 },
1506 .vback_porch = { 7, 11, 14 },
1507 .vsync_len = { 1, 1, 1 },
1508 .flags = DISPLAY_FLAGS_DE_HIGH,
1509};
1510
1511static const struct panel_desc chefree_ch101olhlwh_002 = {
1512 .timings = &chefree_ch101olhlwh_002_timing,
1513 .num_timings = 1,
1514 .bpc = 8,
1515 .size = {
1516 .width = 217,
1517 .height = 135,
1518 },
1519 .delay = {
1520 .enable = 200,
1521 .disable = 200,
1522 },
1523 .bus_flags = DRM_BUS_FLAG_DE_HIGH,
1524 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
1525 .connector_type = DRM_MODE_CONNECTOR_LVDS,
1526};
1527
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001528static const struct drm_display_mode chunghwa_claa070wp03xg_mode = {
1529 .clock = 66770,
1530 .hdisplay = 800,
1531 .hsync_start = 800 + 49,
1532 .hsync_end = 800 + 49 + 33,
1533 .htotal = 800 + 49 + 33 + 17,
1534 .vdisplay = 1280,
1535 .vsync_start = 1280 + 1,
1536 .vsync_end = 1280 + 1 + 7,
1537 .vtotal = 1280 + 1 + 7 + 15,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001538 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1539};
1540
1541static const struct panel_desc chunghwa_claa070wp03xg = {
1542 .modes = &chunghwa_claa070wp03xg_mode,
1543 .num_modes = 1,
1544 .bpc = 6,
1545 .size = {
1546 .width = 94,
1547 .height = 150,
1548 },
Olivier Deprez157378f2022-04-04 15:47:50 +02001549 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
1550 .bus_flags = DRM_BUS_FLAG_DE_HIGH,
1551 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001552};
1553
1554static const struct drm_display_mode chunghwa_claa101wa01a_mode = {
1555 .clock = 72070,
1556 .hdisplay = 1366,
1557 .hsync_start = 1366 + 58,
1558 .hsync_end = 1366 + 58 + 58,
1559 .htotal = 1366 + 58 + 58 + 58,
1560 .vdisplay = 768,
1561 .vsync_start = 768 + 4,
1562 .vsync_end = 768 + 4 + 4,
1563 .vtotal = 768 + 4 + 4 + 4,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001564};
1565
1566static const struct panel_desc chunghwa_claa101wa01a = {
1567 .modes = &chunghwa_claa101wa01a_mode,
1568 .num_modes = 1,
1569 .bpc = 6,
1570 .size = {
1571 .width = 220,
1572 .height = 120,
1573 },
Olivier Deprez157378f2022-04-04 15:47:50 +02001574 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
1575 .bus_flags = DRM_BUS_FLAG_DE_HIGH,
1576 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001577};
1578
1579static const struct drm_display_mode chunghwa_claa101wb01_mode = {
1580 .clock = 69300,
1581 .hdisplay = 1366,
1582 .hsync_start = 1366 + 48,
1583 .hsync_end = 1366 + 48 + 32,
1584 .htotal = 1366 + 48 + 32 + 20,
1585 .vdisplay = 768,
1586 .vsync_start = 768 + 16,
1587 .vsync_end = 768 + 16 + 8,
1588 .vtotal = 768 + 16 + 8 + 16,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001589};
1590
1591static const struct panel_desc chunghwa_claa101wb01 = {
1592 .modes = &chunghwa_claa101wb01_mode,
1593 .num_modes = 1,
1594 .bpc = 6,
1595 .size = {
1596 .width = 223,
1597 .height = 125,
1598 },
Olivier Deprez157378f2022-04-04 15:47:50 +02001599 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
1600 .bus_flags = DRM_BUS_FLAG_DE_HIGH,
1601 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001602};
1603
1604static const struct drm_display_mode dataimage_scf0700c48ggu18_mode = {
1605 .clock = 33260,
1606 .hdisplay = 800,
1607 .hsync_start = 800 + 40,
1608 .hsync_end = 800 + 40 + 128,
1609 .htotal = 800 + 40 + 128 + 88,
1610 .vdisplay = 480,
1611 .vsync_start = 480 + 10,
1612 .vsync_end = 480 + 10 + 2,
1613 .vtotal = 480 + 10 + 2 + 33,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001614 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1615};
1616
1617static const struct panel_desc dataimage_scf0700c48ggu18 = {
1618 .modes = &dataimage_scf0700c48ggu18_mode,
1619 .num_modes = 1,
1620 .bpc = 8,
1621 .size = {
1622 .width = 152,
1623 .height = 91,
1624 },
1625 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
David Brazdil0f672f62019-12-10 10:32:29 +00001626 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001627};
1628
1629static const struct display_timing dlc_dlc0700yzg_1_timing = {
1630 .pixelclock = { 45000000, 51200000, 57000000 },
1631 .hactive = { 1024, 1024, 1024 },
1632 .hfront_porch = { 100, 106, 113 },
1633 .hback_porch = { 100, 106, 113 },
1634 .hsync_len = { 100, 108, 114 },
1635 .vactive = { 600, 600, 600 },
1636 .vfront_porch = { 8, 11, 15 },
1637 .vback_porch = { 8, 11, 15 },
1638 .vsync_len = { 9, 13, 15 },
1639 .flags = DISPLAY_FLAGS_DE_HIGH,
1640};
1641
1642static const struct panel_desc dlc_dlc0700yzg_1 = {
1643 .timings = &dlc_dlc0700yzg_1_timing,
1644 .num_timings = 1,
1645 .bpc = 6,
1646 .size = {
1647 .width = 154,
1648 .height = 86,
1649 },
1650 .delay = {
1651 .prepare = 30,
1652 .enable = 200,
1653 .disable = 200,
1654 },
1655 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02001656 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001657};
1658
David Brazdil0f672f62019-12-10 10:32:29 +00001659static const struct display_timing dlc_dlc1010gig_timing = {
1660 .pixelclock = { 68900000, 71100000, 73400000 },
1661 .hactive = { 1280, 1280, 1280 },
1662 .hfront_porch = { 43, 53, 63 },
1663 .hback_porch = { 43, 53, 63 },
1664 .hsync_len = { 44, 54, 64 },
1665 .vactive = { 800, 800, 800 },
1666 .vfront_porch = { 5, 8, 11 },
1667 .vback_porch = { 5, 8, 11 },
1668 .vsync_len = { 5, 7, 11 },
1669 .flags = DISPLAY_FLAGS_DE_HIGH,
1670};
1671
1672static const struct panel_desc dlc_dlc1010gig = {
1673 .timings = &dlc_dlc1010gig_timing,
1674 .num_timings = 1,
1675 .bpc = 8,
1676 .size = {
1677 .width = 216,
1678 .height = 135,
1679 },
1680 .delay = {
1681 .prepare = 60,
1682 .enable = 150,
1683 .disable = 100,
1684 .unprepare = 60,
1685 },
1686 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02001687 .connector_type = DRM_MODE_CONNECTOR_LVDS,
David Brazdil0f672f62019-12-10 10:32:29 +00001688};
1689
1690static const struct drm_display_mode edt_et035012dm6_mode = {
1691 .clock = 6500,
1692 .hdisplay = 320,
1693 .hsync_start = 320 + 20,
1694 .hsync_end = 320 + 20 + 30,
1695 .htotal = 320 + 20 + 68,
1696 .vdisplay = 240,
1697 .vsync_start = 240 + 4,
1698 .vsync_end = 240 + 4 + 4,
1699 .vtotal = 240 + 4 + 4 + 14,
David Brazdil0f672f62019-12-10 10:32:29 +00001700 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1701};
1702
1703static const struct panel_desc edt_et035012dm6 = {
1704 .modes = &edt_et035012dm6_mode,
1705 .num_modes = 1,
1706 .bpc = 8,
1707 .size = {
1708 .width = 70,
1709 .height = 52,
1710 },
1711 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
Olivier Deprez157378f2022-04-04 15:47:50 +02001712 .bus_flags = DRM_BUS_FLAG_DE_LOW | DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE,
1713};
1714
1715static const struct drm_display_mode edt_etm043080dh6gp_mode = {
1716 .clock = 10870,
1717 .hdisplay = 480,
1718 .hsync_start = 480 + 8,
1719 .hsync_end = 480 + 8 + 4,
1720 .htotal = 480 + 8 + 4 + 41,
1721
1722 /*
1723 * IWG22M: Y resolution changed for "dc_linuxfb" module crashing while
1724 * fb_align
1725 */
1726
1727 .vdisplay = 288,
1728 .vsync_start = 288 + 2,
1729 .vsync_end = 288 + 2 + 4,
1730 .vtotal = 288 + 2 + 4 + 10,
1731};
1732
1733static const struct panel_desc edt_etm043080dh6gp = {
1734 .modes = &edt_etm043080dh6gp_mode,
1735 .num_modes = 1,
1736 .bpc = 8,
1737 .size = {
1738 .width = 100,
1739 .height = 65,
1740 },
1741 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
1742 .connector_type = DRM_MODE_CONNECTOR_DPI,
David Brazdil0f672f62019-12-10 10:32:29 +00001743};
1744
1745static const struct drm_display_mode edt_etm0430g0dh6_mode = {
1746 .clock = 9000,
1747 .hdisplay = 480,
1748 .hsync_start = 480 + 2,
1749 .hsync_end = 480 + 2 + 41,
1750 .htotal = 480 + 2 + 41 + 2,
1751 .vdisplay = 272,
1752 .vsync_start = 272 + 2,
1753 .vsync_end = 272 + 2 + 10,
1754 .vtotal = 272 + 2 + 10 + 2,
David Brazdil0f672f62019-12-10 10:32:29 +00001755 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
1756};
1757
1758static const struct panel_desc edt_etm0430g0dh6 = {
1759 .modes = &edt_etm0430g0dh6_mode,
1760 .num_modes = 1,
1761 .bpc = 6,
1762 .size = {
1763 .width = 95,
1764 .height = 54,
1765 },
1766};
1767
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001768static const struct drm_display_mode edt_et057090dhu_mode = {
1769 .clock = 25175,
1770 .hdisplay = 640,
1771 .hsync_start = 640 + 16,
1772 .hsync_end = 640 + 16 + 30,
1773 .htotal = 640 + 16 + 30 + 114,
1774 .vdisplay = 480,
1775 .vsync_start = 480 + 10,
1776 .vsync_end = 480 + 10 + 3,
1777 .vtotal = 480 + 10 + 3 + 32,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001778 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1779};
1780
1781static const struct panel_desc edt_et057090dhu = {
1782 .modes = &edt_et057090dhu_mode,
1783 .num_modes = 1,
1784 .bpc = 6,
1785 .size = {
1786 .width = 115,
1787 .height = 86,
1788 },
1789 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
David Brazdil0f672f62019-12-10 10:32:29 +00001790 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
Olivier Deprez157378f2022-04-04 15:47:50 +02001791 .connector_type = DRM_MODE_CONNECTOR_DPI,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001792};
1793
1794static const struct drm_display_mode edt_etm0700g0dh6_mode = {
1795 .clock = 33260,
1796 .hdisplay = 800,
1797 .hsync_start = 800 + 40,
1798 .hsync_end = 800 + 40 + 128,
1799 .htotal = 800 + 40 + 128 + 88,
1800 .vdisplay = 480,
1801 .vsync_start = 480 + 10,
1802 .vsync_end = 480 + 10 + 2,
1803 .vtotal = 480 + 10 + 2 + 33,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001804 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
1805};
1806
1807static const struct panel_desc edt_etm0700g0dh6 = {
1808 .modes = &edt_etm0700g0dh6_mode,
1809 .num_modes = 1,
1810 .bpc = 6,
1811 .size = {
1812 .width = 152,
1813 .height = 91,
1814 },
1815 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
David Brazdil0f672f62019-12-10 10:32:29 +00001816 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001817};
1818
1819static const struct panel_desc edt_etm0700g0bdh6 = {
1820 .modes = &edt_etm0700g0dh6_mode,
1821 .num_modes = 1,
1822 .bpc = 6,
1823 .size = {
1824 .width = 152,
1825 .height = 91,
1826 },
1827 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
David Brazdil0f672f62019-12-10 10:32:29 +00001828 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
1829};
1830
1831static const struct display_timing evervision_vgg804821_timing = {
1832 .pixelclock = { 27600000, 33300000, 50000000 },
1833 .hactive = { 800, 800, 800 },
1834 .hfront_porch = { 40, 66, 70 },
1835 .hback_porch = { 40, 67, 70 },
1836 .hsync_len = { 40, 67, 70 },
1837 .vactive = { 480, 480, 480 },
1838 .vfront_porch = { 6, 10, 10 },
1839 .vback_porch = { 7, 11, 11 },
1840 .vsync_len = { 7, 11, 11 },
1841 .flags = DISPLAY_FLAGS_HSYNC_HIGH | DISPLAY_FLAGS_VSYNC_HIGH |
1842 DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_NEGEDGE |
1843 DISPLAY_FLAGS_SYNC_NEGEDGE,
1844};
1845
1846static const struct panel_desc evervision_vgg804821 = {
1847 .timings = &evervision_vgg804821_timing,
1848 .num_timings = 1,
1849 .bpc = 8,
1850 .size = {
1851 .width = 108,
1852 .height = 64,
1853 },
1854 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
Olivier Deprez157378f2022-04-04 15:47:50 +02001855 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001856};
1857
1858static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode = {
1859 .clock = 32260,
1860 .hdisplay = 800,
1861 .hsync_start = 800 + 168,
1862 .hsync_end = 800 + 168 + 64,
1863 .htotal = 800 + 168 + 64 + 88,
1864 .vdisplay = 480,
1865 .vsync_start = 480 + 37,
1866 .vsync_end = 480 + 37 + 2,
1867 .vtotal = 480 + 37 + 2 + 8,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001868};
1869
1870static const struct panel_desc foxlink_fl500wvr00_a0t = {
1871 .modes = &foxlink_fl500wvr00_a0t_mode,
1872 .num_modes = 1,
1873 .bpc = 8,
1874 .size = {
1875 .width = 108,
1876 .height = 65,
1877 },
1878 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
1879};
1880
Olivier Deprez157378f2022-04-04 15:47:50 +02001881static const struct drm_display_mode frida_frd350h54004_modes[] = {
1882 { /* 60 Hz */
1883 .clock = 6000,
1884 .hdisplay = 320,
1885 .hsync_start = 320 + 44,
1886 .hsync_end = 320 + 44 + 16,
1887 .htotal = 320 + 44 + 16 + 20,
1888 .vdisplay = 240,
1889 .vsync_start = 240 + 2,
1890 .vsync_end = 240 + 2 + 6,
1891 .vtotal = 240 + 2 + 6 + 2,
1892 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
1893 },
1894 { /* 50 Hz */
1895 .clock = 5400,
1896 .hdisplay = 320,
1897 .hsync_start = 320 + 56,
1898 .hsync_end = 320 + 56 + 16,
1899 .htotal = 320 + 56 + 16 + 40,
1900 .vdisplay = 240,
1901 .vsync_start = 240 + 2,
1902 .vsync_end = 240 + 2 + 6,
1903 .vtotal = 240 + 2 + 6 + 2,
1904 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
1905 },
1906};
1907
1908static const struct panel_desc frida_frd350h54004 = {
1909 .modes = frida_frd350h54004_modes,
1910 .num_modes = ARRAY_SIZE(frida_frd350h54004_modes),
1911 .bpc = 8,
1912 .size = {
1913 .width = 77,
1914 .height = 64,
1915 },
1916 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
1917 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE,
1918 .connector_type = DRM_MODE_CONNECTOR_DPI,
1919};
1920
David Brazdil0f672f62019-12-10 10:32:29 +00001921static const struct drm_display_mode friendlyarm_hd702e_mode = {
1922 .clock = 67185,
1923 .hdisplay = 800,
1924 .hsync_start = 800 + 20,
1925 .hsync_end = 800 + 20 + 24,
1926 .htotal = 800 + 20 + 24 + 20,
1927 .vdisplay = 1280,
1928 .vsync_start = 1280 + 4,
1929 .vsync_end = 1280 + 4 + 8,
1930 .vtotal = 1280 + 4 + 8 + 4,
David Brazdil0f672f62019-12-10 10:32:29 +00001931 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1932};
1933
1934static const struct panel_desc friendlyarm_hd702e = {
1935 .modes = &friendlyarm_hd702e_mode,
1936 .num_modes = 1,
1937 .size = {
1938 .width = 94,
1939 .height = 151,
1940 },
1941};
1942
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001943static const struct drm_display_mode giantplus_gpg482739qs5_mode = {
1944 .clock = 9000,
1945 .hdisplay = 480,
1946 .hsync_start = 480 + 5,
1947 .hsync_end = 480 + 5 + 1,
1948 .htotal = 480 + 5 + 1 + 40,
1949 .vdisplay = 272,
1950 .vsync_start = 272 + 8,
1951 .vsync_end = 272 + 8 + 1,
1952 .vtotal = 272 + 8 + 1 + 8,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001953};
1954
1955static const struct panel_desc giantplus_gpg482739qs5 = {
1956 .modes = &giantplus_gpg482739qs5_mode,
1957 .num_modes = 1,
1958 .bpc = 8,
1959 .size = {
1960 .width = 95,
1961 .height = 54,
1962 },
1963 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
1964};
1965
David Brazdil0f672f62019-12-10 10:32:29 +00001966static const struct display_timing giantplus_gpm940b0_timing = {
1967 .pixelclock = { 13500000, 27000000, 27500000 },
1968 .hactive = { 320, 320, 320 },
1969 .hfront_porch = { 14, 686, 718 },
1970 .hback_porch = { 50, 70, 255 },
1971 .hsync_len = { 1, 1, 1 },
1972 .vactive = { 240, 240, 240 },
1973 .vfront_porch = { 1, 1, 179 },
1974 .vback_porch = { 1, 21, 31 },
1975 .vsync_len = { 1, 1, 6 },
1976 .flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW,
1977};
1978
1979static const struct panel_desc giantplus_gpm940b0 = {
1980 .timings = &giantplus_gpm940b0_timing,
1981 .num_timings = 1,
1982 .bpc = 8,
1983 .size = {
1984 .width = 60,
1985 .height = 45,
1986 },
1987 .bus_format = MEDIA_BUS_FMT_RGB888_3X8,
Olivier Deprez157378f2022-04-04 15:47:50 +02001988 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE,
David Brazdil0f672f62019-12-10 10:32:29 +00001989};
1990
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001991static const struct display_timing hannstar_hsd070pww1_timing = {
1992 .pixelclock = { 64300000, 71100000, 82000000 },
1993 .hactive = { 1280, 1280, 1280 },
1994 .hfront_porch = { 1, 1, 10 },
1995 .hback_porch = { 1, 1, 10 },
1996 /*
1997 * According to the data sheet, the minimum horizontal blanking interval
1998 * is 54 clocks (1 + 52 + 1), but tests with a Nitrogen6X have shown the
1999 * minimum working horizontal blanking interval to be 60 clocks.
2000 */
2001 .hsync_len = { 58, 158, 661 },
2002 .vactive = { 800, 800, 800 },
2003 .vfront_porch = { 1, 1, 10 },
2004 .vback_porch = { 1, 1, 10 },
2005 .vsync_len = { 1, 21, 203 },
2006 .flags = DISPLAY_FLAGS_DE_HIGH,
2007};
2008
2009static const struct panel_desc hannstar_hsd070pww1 = {
2010 .timings = &hannstar_hsd070pww1_timing,
2011 .num_timings = 1,
2012 .bpc = 6,
2013 .size = {
2014 .width = 151,
2015 .height = 94,
2016 },
2017 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02002018 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002019};
2020
2021static const struct display_timing hannstar_hsd100pxn1_timing = {
2022 .pixelclock = { 55000000, 65000000, 75000000 },
2023 .hactive = { 1024, 1024, 1024 },
2024 .hfront_porch = { 40, 40, 40 },
2025 .hback_porch = { 220, 220, 220 },
2026 .hsync_len = { 20, 60, 100 },
2027 .vactive = { 768, 768, 768 },
2028 .vfront_porch = { 7, 7, 7 },
2029 .vback_porch = { 21, 21, 21 },
2030 .vsync_len = { 10, 10, 10 },
2031 .flags = DISPLAY_FLAGS_DE_HIGH,
2032};
2033
2034static const struct panel_desc hannstar_hsd100pxn1 = {
2035 .timings = &hannstar_hsd100pxn1_timing,
2036 .num_timings = 1,
2037 .bpc = 6,
2038 .size = {
2039 .width = 203,
2040 .height = 152,
2041 },
2042 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02002043 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002044};
2045
2046static const struct drm_display_mode hitachi_tx23d38vm0caa_mode = {
2047 .clock = 33333,
2048 .hdisplay = 800,
2049 .hsync_start = 800 + 85,
2050 .hsync_end = 800 + 85 + 86,
2051 .htotal = 800 + 85 + 86 + 85,
2052 .vdisplay = 480,
2053 .vsync_start = 480 + 16,
2054 .vsync_end = 480 + 16 + 13,
2055 .vtotal = 480 + 16 + 13 + 16,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002056};
2057
2058static const struct panel_desc hitachi_tx23d38vm0caa = {
2059 .modes = &hitachi_tx23d38vm0caa_mode,
2060 .num_modes = 1,
2061 .bpc = 6,
2062 .size = {
2063 .width = 195,
2064 .height = 117,
2065 },
2066 .delay = {
2067 .enable = 160,
2068 .disable = 160,
2069 },
2070};
2071
2072static const struct drm_display_mode innolux_at043tn24_mode = {
2073 .clock = 9000,
2074 .hdisplay = 480,
2075 .hsync_start = 480 + 2,
2076 .hsync_end = 480 + 2 + 41,
2077 .htotal = 480 + 2 + 41 + 2,
2078 .vdisplay = 272,
2079 .vsync_start = 272 + 2,
2080 .vsync_end = 272 + 2 + 10,
2081 .vtotal = 272 + 2 + 10 + 2,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002082 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
2083};
2084
2085static const struct panel_desc innolux_at043tn24 = {
2086 .modes = &innolux_at043tn24_mode,
2087 .num_modes = 1,
2088 .bpc = 8,
2089 .size = {
2090 .width = 95,
2091 .height = 54,
2092 },
2093 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
David Brazdil0f672f62019-12-10 10:32:29 +00002094 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002095};
2096
2097static const struct drm_display_mode innolux_at070tn92_mode = {
2098 .clock = 33333,
2099 .hdisplay = 800,
2100 .hsync_start = 800 + 210,
2101 .hsync_end = 800 + 210 + 20,
2102 .htotal = 800 + 210 + 20 + 46,
2103 .vdisplay = 480,
2104 .vsync_start = 480 + 22,
2105 .vsync_end = 480 + 22 + 10,
2106 .vtotal = 480 + 22 + 23 + 10,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002107};
2108
2109static const struct panel_desc innolux_at070tn92 = {
2110 .modes = &innolux_at070tn92_mode,
2111 .num_modes = 1,
2112 .size = {
2113 .width = 154,
2114 .height = 86,
2115 },
2116 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
2117};
2118
2119static const struct display_timing innolux_g070y2_l01_timing = {
2120 .pixelclock = { 28000000, 29500000, 32000000 },
2121 .hactive = { 800, 800, 800 },
2122 .hfront_porch = { 61, 91, 141 },
2123 .hback_porch = { 60, 90, 140 },
2124 .hsync_len = { 12, 12, 12 },
2125 .vactive = { 480, 480, 480 },
2126 .vfront_porch = { 4, 9, 30 },
2127 .vback_porch = { 4, 8, 28 },
2128 .vsync_len = { 2, 2, 2 },
2129 .flags = DISPLAY_FLAGS_DE_HIGH,
2130};
2131
2132static const struct panel_desc innolux_g070y2_l01 = {
2133 .timings = &innolux_g070y2_l01_timing,
2134 .num_timings = 1,
Olivier Deprez157378f2022-04-04 15:47:50 +02002135 .bpc = 8,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002136 .size = {
2137 .width = 152,
2138 .height = 91,
2139 },
2140 .delay = {
2141 .prepare = 10,
2142 .enable = 100,
2143 .disable = 100,
2144 .unprepare = 800,
2145 },
2146 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02002147 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002148};
2149
2150static const struct display_timing innolux_g101ice_l01_timing = {
2151 .pixelclock = { 60400000, 71100000, 74700000 },
2152 .hactive = { 1280, 1280, 1280 },
2153 .hfront_porch = { 41, 80, 100 },
2154 .hback_porch = { 40, 79, 99 },
2155 .hsync_len = { 1, 1, 1 },
2156 .vactive = { 800, 800, 800 },
2157 .vfront_porch = { 5, 11, 14 },
2158 .vback_porch = { 4, 11, 14 },
2159 .vsync_len = { 1, 1, 1 },
2160 .flags = DISPLAY_FLAGS_DE_HIGH,
2161};
2162
2163static const struct panel_desc innolux_g101ice_l01 = {
2164 .timings = &innolux_g101ice_l01_timing,
2165 .num_timings = 1,
2166 .bpc = 8,
2167 .size = {
2168 .width = 217,
2169 .height = 135,
2170 },
2171 .delay = {
2172 .enable = 200,
2173 .disable = 200,
2174 },
2175 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02002176 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002177};
2178
2179static const struct display_timing innolux_g121i1_l01_timing = {
2180 .pixelclock = { 67450000, 71000000, 74550000 },
2181 .hactive = { 1280, 1280, 1280 },
2182 .hfront_porch = { 40, 80, 160 },
2183 .hback_porch = { 39, 79, 159 },
2184 .hsync_len = { 1, 1, 1 },
2185 .vactive = { 800, 800, 800 },
2186 .vfront_porch = { 5, 11, 100 },
2187 .vback_porch = { 4, 11, 99 },
2188 .vsync_len = { 1, 1, 1 },
2189};
2190
2191static const struct panel_desc innolux_g121i1_l01 = {
2192 .timings = &innolux_g121i1_l01_timing,
2193 .num_timings = 1,
2194 .bpc = 6,
2195 .size = {
2196 .width = 261,
2197 .height = 163,
2198 },
2199 .delay = {
2200 .enable = 200,
2201 .disable = 20,
2202 },
2203 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02002204 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002205};
2206
2207static const struct drm_display_mode innolux_g121x1_l03_mode = {
2208 .clock = 65000,
2209 .hdisplay = 1024,
2210 .hsync_start = 1024 + 0,
2211 .hsync_end = 1024 + 1,
2212 .htotal = 1024 + 0 + 1 + 320,
2213 .vdisplay = 768,
2214 .vsync_start = 768 + 38,
2215 .vsync_end = 768 + 38 + 1,
2216 .vtotal = 768 + 38 + 1 + 0,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002217 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
2218};
2219
2220static const struct panel_desc innolux_g121x1_l03 = {
2221 .modes = &innolux_g121x1_l03_mode,
2222 .num_modes = 1,
2223 .bpc = 6,
2224 .size = {
2225 .width = 246,
2226 .height = 185,
2227 },
2228 .delay = {
2229 .enable = 200,
2230 .unprepare = 200,
2231 .disable = 400,
2232 },
2233};
2234
David Brazdil0f672f62019-12-10 10:32:29 +00002235/*
2236 * Datasheet specifies that at 60 Hz refresh rate:
2237 * - total horizontal time: { 1506, 1592, 1716 }
2238 * - total vertical time: { 788, 800, 868 }
2239 *
2240 * ...but doesn't go into exactly how that should be split into a front
2241 * porch, back porch, or sync length. For now we'll leave a single setting
2242 * here which allows a bit of tweaking of the pixel clock at the expense of
2243 * refresh rate.
2244 */
2245static const struct display_timing innolux_n116bge_timing = {
2246 .pixelclock = { 72600000, 76420000, 80240000 },
2247 .hactive = { 1366, 1366, 1366 },
2248 .hfront_porch = { 136, 136, 136 },
2249 .hback_porch = { 60, 60, 60 },
2250 .hsync_len = { 30, 30, 30 },
2251 .vactive = { 768, 768, 768 },
2252 .vfront_porch = { 8, 8, 8 },
2253 .vback_porch = { 12, 12, 12 },
2254 .vsync_len = { 12, 12, 12 },
2255 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002256};
2257
2258static const struct panel_desc innolux_n116bge = {
David Brazdil0f672f62019-12-10 10:32:29 +00002259 .timings = &innolux_n116bge_timing,
2260 .num_timings = 1,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002261 .bpc = 6,
2262 .size = {
2263 .width = 256,
2264 .height = 144,
2265 },
2266};
2267
2268static const struct drm_display_mode innolux_n156bge_l21_mode = {
2269 .clock = 69300,
2270 .hdisplay = 1366,
2271 .hsync_start = 1366 + 16,
2272 .hsync_end = 1366 + 16 + 34,
2273 .htotal = 1366 + 16 + 34 + 50,
2274 .vdisplay = 768,
2275 .vsync_start = 768 + 2,
2276 .vsync_end = 768 + 2 + 6,
2277 .vtotal = 768 + 2 + 6 + 12,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002278};
2279
2280static const struct panel_desc innolux_n156bge_l21 = {
2281 .modes = &innolux_n156bge_l21_mode,
2282 .num_modes = 1,
2283 .bpc = 6,
2284 .size = {
2285 .width = 344,
2286 .height = 193,
2287 },
Olivier Deprez157378f2022-04-04 15:47:50 +02002288 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
2289 .bus_flags = DRM_BUS_FLAG_DE_HIGH,
2290 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002291};
2292
David Brazdil0f672f62019-12-10 10:32:29 +00002293static const struct drm_display_mode innolux_p120zdg_bf1_mode = {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002294 .clock = 206016,
2295 .hdisplay = 2160,
2296 .hsync_start = 2160 + 48,
2297 .hsync_end = 2160 + 48 + 32,
2298 .htotal = 2160 + 48 + 32 + 80,
2299 .vdisplay = 1440,
2300 .vsync_start = 1440 + 3,
2301 .vsync_end = 1440 + 3 + 10,
2302 .vtotal = 1440 + 3 + 10 + 27,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002303 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
2304};
2305
David Brazdil0f672f62019-12-10 10:32:29 +00002306static const struct panel_desc innolux_p120zdg_bf1 = {
2307 .modes = &innolux_p120zdg_bf1_mode,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002308 .num_modes = 1,
2309 .bpc = 8,
2310 .size = {
David Brazdil0f672f62019-12-10 10:32:29 +00002311 .width = 254,
2312 .height = 169,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002313 },
2314 .delay = {
David Brazdil0f672f62019-12-10 10:32:29 +00002315 .hpd_absent_delay = 200,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002316 .unprepare = 500,
2317 },
2318};
2319
2320static const struct drm_display_mode innolux_zj070na_01p_mode = {
2321 .clock = 51501,
2322 .hdisplay = 1024,
2323 .hsync_start = 1024 + 128,
2324 .hsync_end = 1024 + 128 + 64,
2325 .htotal = 1024 + 128 + 64 + 128,
2326 .vdisplay = 600,
2327 .vsync_start = 600 + 16,
2328 .vsync_end = 600 + 16 + 4,
2329 .vtotal = 600 + 16 + 4 + 16,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002330};
2331
2332static const struct panel_desc innolux_zj070na_01p = {
2333 .modes = &innolux_zj070na_01p_mode,
2334 .num_modes = 1,
2335 .bpc = 6,
2336 .size = {
2337 .width = 154,
2338 .height = 90,
2339 },
2340};
2341
Olivier Deprez157378f2022-04-04 15:47:50 +02002342static const struct drm_display_mode ivo_m133nwf4_r0_mode = {
2343 .clock = 138778,
2344 .hdisplay = 1920,
2345 .hsync_start = 1920 + 24,
2346 .hsync_end = 1920 + 24 + 48,
2347 .htotal = 1920 + 24 + 48 + 88,
2348 .vdisplay = 1080,
2349 .vsync_start = 1080 + 3,
2350 .vsync_end = 1080 + 3 + 12,
2351 .vtotal = 1080 + 3 + 12 + 17,
2352 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
2353};
2354
2355static const struct panel_desc ivo_m133nwf4_r0 = {
2356 .modes = &ivo_m133nwf4_r0_mode,
2357 .num_modes = 1,
2358 .bpc = 8,
2359 .size = {
2360 .width = 294,
2361 .height = 165,
2362 },
2363 .delay = {
2364 .hpd_absent_delay = 200,
2365 .unprepare = 500,
2366 },
2367 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
2368 .bus_flags = DRM_BUS_FLAG_DATA_MSB_TO_LSB,
2369 .connector_type = DRM_MODE_CONNECTOR_eDP,
2370};
2371
2372static const struct drm_display_mode kingdisplay_kd116n21_30nv_a010_mode = {
2373 .clock = 81000,
2374 .hdisplay = 1366,
2375 .hsync_start = 1366 + 40,
2376 .hsync_end = 1366 + 40 + 32,
2377 .htotal = 1366 + 40 + 32 + 62,
2378 .vdisplay = 768,
2379 .vsync_start = 768 + 5,
2380 .vsync_end = 768 + 5 + 5,
2381 .vtotal = 768 + 5 + 5 + 122,
2382 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
2383};
2384
2385static const struct panel_desc kingdisplay_kd116n21_30nv_a010 = {
2386 .modes = &kingdisplay_kd116n21_30nv_a010_mode,
2387 .num_modes = 1,
2388 .bpc = 6,
2389 .size = {
2390 .width = 256,
2391 .height = 144,
2392 },
2393 .delay = {
2394 .hpd_absent_delay = 200,
2395 },
2396 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
2397 .connector_type = DRM_MODE_CONNECTOR_eDP,
2398};
2399
David Brazdil0f672f62019-12-10 10:32:29 +00002400static const struct display_timing koe_tx14d24vm1bpa_timing = {
2401 .pixelclock = { 5580000, 5850000, 6200000 },
2402 .hactive = { 320, 320, 320 },
2403 .hfront_porch = { 30, 30, 30 },
2404 .hback_porch = { 30, 30, 30 },
2405 .hsync_len = { 1, 5, 17 },
2406 .vactive = { 240, 240, 240 },
2407 .vfront_porch = { 6, 6, 6 },
2408 .vback_porch = { 5, 5, 5 },
2409 .vsync_len = { 1, 2, 11 },
2410 .flags = DISPLAY_FLAGS_DE_HIGH,
2411};
2412
2413static const struct panel_desc koe_tx14d24vm1bpa = {
2414 .timings = &koe_tx14d24vm1bpa_timing,
2415 .num_timings = 1,
2416 .bpc = 6,
2417 .size = {
2418 .width = 115,
2419 .height = 86,
2420 },
2421};
2422
Olivier Deprez157378f2022-04-04 15:47:50 +02002423static const struct display_timing koe_tx26d202vm0bwa_timing = {
2424 .pixelclock = { 151820000, 156720000, 159780000 },
2425 .hactive = { 1920, 1920, 1920 },
2426 .hfront_porch = { 105, 130, 142 },
2427 .hback_porch = { 45, 70, 82 },
2428 .hsync_len = { 30, 30, 30 },
2429 .vactive = { 1200, 1200, 1200},
2430 .vfront_porch = { 3, 5, 10 },
2431 .vback_porch = { 2, 5, 10 },
2432 .vsync_len = { 5, 5, 5 },
2433};
2434
2435static const struct panel_desc koe_tx26d202vm0bwa = {
2436 .timings = &koe_tx26d202vm0bwa_timing,
2437 .num_timings = 1,
2438 .bpc = 8,
2439 .size = {
2440 .width = 217,
2441 .height = 136,
2442 },
2443 .delay = {
2444 .prepare = 1000,
2445 .enable = 1000,
2446 .unprepare = 1000,
2447 .disable = 1000,
2448 },
2449 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
2450 .bus_flags = DRM_BUS_FLAG_DE_HIGH,
2451 .connector_type = DRM_MODE_CONNECTOR_LVDS,
2452};
2453
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002454static const struct display_timing koe_tx31d200vm0baa_timing = {
2455 .pixelclock = { 39600000, 43200000, 48000000 },
2456 .hactive = { 1280, 1280, 1280 },
2457 .hfront_porch = { 16, 36, 56 },
2458 .hback_porch = { 16, 36, 56 },
2459 .hsync_len = { 8, 8, 8 },
2460 .vactive = { 480, 480, 480 },
2461 .vfront_porch = { 6, 21, 33 },
2462 .vback_porch = { 6, 21, 33 },
2463 .vsync_len = { 8, 8, 8 },
2464 .flags = DISPLAY_FLAGS_DE_HIGH,
2465};
2466
2467static const struct panel_desc koe_tx31d200vm0baa = {
2468 .timings = &koe_tx31d200vm0baa_timing,
2469 .num_timings = 1,
2470 .bpc = 6,
2471 .size = {
2472 .width = 292,
2473 .height = 109,
2474 },
2475 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02002476 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002477};
2478
2479static const struct display_timing kyo_tcg121xglp_timing = {
2480 .pixelclock = { 52000000, 65000000, 71000000 },
2481 .hactive = { 1024, 1024, 1024 },
2482 .hfront_porch = { 2, 2, 2 },
2483 .hback_porch = { 2, 2, 2 },
2484 .hsync_len = { 86, 124, 244 },
2485 .vactive = { 768, 768, 768 },
2486 .vfront_porch = { 2, 2, 2 },
2487 .vback_porch = { 2, 2, 2 },
2488 .vsync_len = { 6, 34, 73 },
2489 .flags = DISPLAY_FLAGS_DE_HIGH,
2490};
2491
2492static const struct panel_desc kyo_tcg121xglp = {
2493 .timings = &kyo_tcg121xglp_timing,
2494 .num_timings = 1,
2495 .bpc = 8,
2496 .size = {
2497 .width = 246,
2498 .height = 184,
2499 },
2500 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02002501 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002502};
2503
David Brazdil0f672f62019-12-10 10:32:29 +00002504static const struct drm_display_mode lemaker_bl035_rgb_002_mode = {
2505 .clock = 7000,
2506 .hdisplay = 320,
2507 .hsync_start = 320 + 20,
2508 .hsync_end = 320 + 20 + 30,
2509 .htotal = 320 + 20 + 30 + 38,
2510 .vdisplay = 240,
2511 .vsync_start = 240 + 4,
2512 .vsync_end = 240 + 4 + 3,
2513 .vtotal = 240 + 4 + 3 + 15,
David Brazdil0f672f62019-12-10 10:32:29 +00002514};
2515
2516static const struct panel_desc lemaker_bl035_rgb_002 = {
2517 .modes = &lemaker_bl035_rgb_002_mode,
2518 .num_modes = 1,
2519 .size = {
2520 .width = 70,
2521 .height = 52,
2522 },
2523 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
2524 .bus_flags = DRM_BUS_FLAG_DE_LOW,
2525};
2526
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002527static const struct drm_display_mode lg_lb070wv8_mode = {
2528 .clock = 33246,
2529 .hdisplay = 800,
2530 .hsync_start = 800 + 88,
2531 .hsync_end = 800 + 88 + 80,
2532 .htotal = 800 + 88 + 80 + 88,
2533 .vdisplay = 480,
2534 .vsync_start = 480 + 10,
2535 .vsync_end = 480 + 10 + 25,
2536 .vtotal = 480 + 10 + 25 + 10,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002537};
2538
2539static const struct panel_desc lg_lb070wv8 = {
2540 .modes = &lg_lb070wv8_mode,
2541 .num_modes = 1,
Olivier Deprez0e641232021-09-23 10:07:05 +02002542 .bpc = 8,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002543 .size = {
2544 .width = 151,
2545 .height = 91,
2546 },
2547 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02002548 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002549};
2550
2551static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
2552 .clock = 200000,
2553 .hdisplay = 1536,
2554 .hsync_start = 1536 + 12,
2555 .hsync_end = 1536 + 12 + 16,
2556 .htotal = 1536 + 12 + 16 + 48,
2557 .vdisplay = 2048,
2558 .vsync_start = 2048 + 8,
2559 .vsync_end = 2048 + 8 + 4,
2560 .vtotal = 2048 + 8 + 4 + 8,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002561 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
2562};
2563
2564static const struct panel_desc lg_lp079qx1_sp0v = {
2565 .modes = &lg_lp079qx1_sp0v_mode,
2566 .num_modes = 1,
2567 .size = {
2568 .width = 129,
2569 .height = 171,
2570 },
2571};
2572
2573static const struct drm_display_mode lg_lp097qx1_spa1_mode = {
2574 .clock = 205210,
2575 .hdisplay = 2048,
2576 .hsync_start = 2048 + 150,
2577 .hsync_end = 2048 + 150 + 5,
2578 .htotal = 2048 + 150 + 5 + 5,
2579 .vdisplay = 1536,
2580 .vsync_start = 1536 + 3,
2581 .vsync_end = 1536 + 3 + 1,
2582 .vtotal = 1536 + 3 + 1 + 9,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002583};
2584
2585static const struct panel_desc lg_lp097qx1_spa1 = {
2586 .modes = &lg_lp097qx1_spa1_mode,
2587 .num_modes = 1,
2588 .size = {
2589 .width = 208,
2590 .height = 147,
2591 },
2592};
2593
2594static const struct drm_display_mode lg_lp120up1_mode = {
2595 .clock = 162300,
2596 .hdisplay = 1920,
2597 .hsync_start = 1920 + 40,
2598 .hsync_end = 1920 + 40 + 40,
2599 .htotal = 1920 + 40 + 40+ 80,
2600 .vdisplay = 1280,
2601 .vsync_start = 1280 + 4,
2602 .vsync_end = 1280 + 4 + 4,
2603 .vtotal = 1280 + 4 + 4 + 12,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002604};
2605
2606static const struct panel_desc lg_lp120up1 = {
2607 .modes = &lg_lp120up1_mode,
2608 .num_modes = 1,
2609 .bpc = 8,
2610 .size = {
2611 .width = 267,
2612 .height = 183,
2613 },
Olivier Deprez157378f2022-04-04 15:47:50 +02002614 .connector_type = DRM_MODE_CONNECTOR_eDP,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002615};
2616
2617static const struct drm_display_mode lg_lp129qe_mode = {
2618 .clock = 285250,
2619 .hdisplay = 2560,
2620 .hsync_start = 2560 + 48,
2621 .hsync_end = 2560 + 48 + 32,
2622 .htotal = 2560 + 48 + 32 + 80,
2623 .vdisplay = 1700,
2624 .vsync_start = 1700 + 3,
2625 .vsync_end = 1700 + 3 + 10,
2626 .vtotal = 1700 + 3 + 10 + 36,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002627};
2628
2629static const struct panel_desc lg_lp129qe = {
2630 .modes = &lg_lp129qe_mode,
2631 .num_modes = 1,
2632 .bpc = 8,
2633 .size = {
2634 .width = 272,
2635 .height = 181,
2636 },
2637};
2638
Olivier Deprez157378f2022-04-04 15:47:50 +02002639static const struct display_timing logictechno_lt161010_2nh_timing = {
2640 .pixelclock = { 26400000, 33300000, 46800000 },
2641 .hactive = { 800, 800, 800 },
2642 .hfront_porch = { 16, 210, 354 },
2643 .hback_porch = { 46, 46, 46 },
2644 .hsync_len = { 1, 20, 40 },
2645 .vactive = { 480, 480, 480 },
2646 .vfront_porch = { 7, 22, 147 },
2647 .vback_porch = { 23, 23, 23 },
2648 .vsync_len = { 1, 10, 20 },
2649 .flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
2650 DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE |
2651 DISPLAY_FLAGS_SYNC_POSEDGE,
2652};
2653
2654static const struct panel_desc logictechno_lt161010_2nh = {
2655 .timings = &logictechno_lt161010_2nh_timing,
2656 .num_timings = 1,
2657 .size = {
2658 .width = 154,
2659 .height = 86,
2660 },
2661 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
2662 .bus_flags = DRM_BUS_FLAG_DE_HIGH |
2663 DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE |
2664 DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE,
2665 .connector_type = DRM_MODE_CONNECTOR_DPI,
2666};
2667
2668static const struct display_timing logictechno_lt170410_2whc_timing = {
2669 .pixelclock = { 68900000, 71100000, 73400000 },
2670 .hactive = { 1280, 1280, 1280 },
2671 .hfront_porch = { 23, 60, 71 },
2672 .hback_porch = { 23, 60, 71 },
2673 .hsync_len = { 15, 40, 47 },
2674 .vactive = { 800, 800, 800 },
2675 .vfront_porch = { 5, 7, 10 },
2676 .vback_porch = { 5, 7, 10 },
2677 .vsync_len = { 6, 9, 12 },
2678 .flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
2679 DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_POSEDGE |
2680 DISPLAY_FLAGS_SYNC_POSEDGE,
2681};
2682
2683static const struct panel_desc logictechno_lt170410_2whc = {
2684 .timings = &logictechno_lt170410_2whc_timing,
2685 .num_timings = 1,
2686 .size = {
2687 .width = 217,
2688 .height = 136,
2689 },
2690 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
2691 .bus_flags = DRM_BUS_FLAG_DE_HIGH,
2692 .connector_type = DRM_MODE_CONNECTOR_LVDS,
2693};
2694
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002695static const struct drm_display_mode mitsubishi_aa070mc01_mode = {
2696 .clock = 30400,
2697 .hdisplay = 800,
2698 .hsync_start = 800 + 0,
2699 .hsync_end = 800 + 1,
2700 .htotal = 800 + 0 + 1 + 160,
2701 .vdisplay = 480,
2702 .vsync_start = 480 + 0,
2703 .vsync_end = 480 + 48 + 1,
2704 .vtotal = 480 + 48 + 1 + 0,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002705 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
2706};
2707
Olivier Deprez0e641232021-09-23 10:07:05 +02002708static const struct drm_display_mode logicpd_type_28_mode = {
Olivier Deprez157378f2022-04-04 15:47:50 +02002709 .clock = 9107,
Olivier Deprez0e641232021-09-23 10:07:05 +02002710 .hdisplay = 480,
2711 .hsync_start = 480 + 3,
2712 .hsync_end = 480 + 3 + 42,
2713 .htotal = 480 + 3 + 42 + 2,
2714
2715 .vdisplay = 272,
2716 .vsync_start = 272 + 2,
2717 .vsync_end = 272 + 2 + 11,
2718 .vtotal = 272 + 2 + 11 + 3,
Olivier Deprez0e641232021-09-23 10:07:05 +02002719 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
2720};
2721
2722static const struct panel_desc logicpd_type_28 = {
2723 .modes = &logicpd_type_28_mode,
2724 .num_modes = 1,
2725 .bpc = 8,
2726 .size = {
2727 .width = 105,
2728 .height = 67,
2729 },
2730 .delay = {
2731 .prepare = 200,
2732 .enable = 200,
2733 .unprepare = 200,
2734 .disable = 200,
2735 },
2736 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
2737 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE |
2738 DRM_BUS_FLAG_SYNC_DRIVE_NEGEDGE,
Olivier Deprez157378f2022-04-04 15:47:50 +02002739 .connector_type = DRM_MODE_CONNECTOR_DPI,
Olivier Deprez0e641232021-09-23 10:07:05 +02002740};
2741
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002742static const struct panel_desc mitsubishi_aa070mc01 = {
2743 .modes = &mitsubishi_aa070mc01_mode,
2744 .num_modes = 1,
2745 .bpc = 8,
2746 .size = {
2747 .width = 152,
2748 .height = 91,
2749 },
2750
2751 .delay = {
2752 .enable = 200,
2753 .unprepare = 200,
2754 .disable = 400,
2755 },
2756 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02002757 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002758 .bus_flags = DRM_BUS_FLAG_DE_HIGH,
2759};
2760
2761static const struct display_timing nec_nl12880bc20_05_timing = {
2762 .pixelclock = { 67000000, 71000000, 75000000 },
2763 .hactive = { 1280, 1280, 1280 },
2764 .hfront_porch = { 2, 30, 30 },
2765 .hback_porch = { 6, 100, 100 },
2766 .hsync_len = { 2, 30, 30 },
2767 .vactive = { 800, 800, 800 },
2768 .vfront_porch = { 5, 5, 5 },
2769 .vback_porch = { 11, 11, 11 },
2770 .vsync_len = { 7, 7, 7 },
2771};
2772
2773static const struct panel_desc nec_nl12880bc20_05 = {
2774 .timings = &nec_nl12880bc20_05_timing,
2775 .num_timings = 1,
2776 .bpc = 8,
2777 .size = {
2778 .width = 261,
2779 .height = 163,
2780 },
2781 .delay = {
2782 .enable = 50,
2783 .disable = 50,
2784 },
2785 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02002786 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002787};
2788
2789static const struct drm_display_mode nec_nl4827hc19_05b_mode = {
2790 .clock = 10870,
2791 .hdisplay = 480,
2792 .hsync_start = 480 + 2,
2793 .hsync_end = 480 + 2 + 41,
2794 .htotal = 480 + 2 + 41 + 2,
2795 .vdisplay = 272,
2796 .vsync_start = 272 + 2,
2797 .vsync_end = 272 + 2 + 4,
2798 .vtotal = 272 + 2 + 4 + 2,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002799 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
2800};
2801
2802static const struct panel_desc nec_nl4827hc19_05b = {
2803 .modes = &nec_nl4827hc19_05b_mode,
2804 .num_modes = 1,
2805 .bpc = 8,
2806 .size = {
2807 .width = 95,
2808 .height = 54,
2809 },
2810 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
David Brazdil0f672f62019-12-10 10:32:29 +00002811 .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002812};
2813
2814static const struct drm_display_mode netron_dy_e231732_mode = {
2815 .clock = 66000,
2816 .hdisplay = 1024,
2817 .hsync_start = 1024 + 160,
2818 .hsync_end = 1024 + 160 + 70,
2819 .htotal = 1024 + 160 + 70 + 90,
2820 .vdisplay = 600,
2821 .vsync_start = 600 + 127,
2822 .vsync_end = 600 + 127 + 20,
2823 .vtotal = 600 + 127 + 20 + 3,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002824};
2825
2826static const struct panel_desc netron_dy_e231732 = {
2827 .modes = &netron_dy_e231732_mode,
2828 .num_modes = 1,
2829 .size = {
2830 .width = 154,
2831 .height = 87,
2832 },
2833 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
2834};
2835
Olivier Deprez157378f2022-04-04 15:47:50 +02002836static const struct drm_display_mode neweast_wjfh116008a_modes[] = {
2837 {
2838 .clock = 138500,
2839 .hdisplay = 1920,
2840 .hsync_start = 1920 + 48,
2841 .hsync_end = 1920 + 48 + 32,
2842 .htotal = 1920 + 48 + 32 + 80,
2843 .vdisplay = 1080,
2844 .vsync_start = 1080 + 3,
2845 .vsync_end = 1080 + 3 + 5,
2846 .vtotal = 1080 + 3 + 5 + 23,
2847 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
2848 }, {
2849 .clock = 110920,
2850 .hdisplay = 1920,
2851 .hsync_start = 1920 + 48,
2852 .hsync_end = 1920 + 48 + 32,
2853 .htotal = 1920 + 48 + 32 + 80,
2854 .vdisplay = 1080,
2855 .vsync_start = 1080 + 3,
2856 .vsync_end = 1080 + 3 + 5,
2857 .vtotal = 1080 + 3 + 5 + 23,
2858 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
2859 }
2860};
2861
2862static const struct panel_desc neweast_wjfh116008a = {
2863 .modes = neweast_wjfh116008a_modes,
2864 .num_modes = 2,
2865 .bpc = 6,
2866 .size = {
2867 .width = 260,
2868 .height = 150,
2869 },
2870 .delay = {
2871 .prepare = 110,
2872 .enable = 20,
2873 .unprepare = 500,
2874 },
2875 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
2876 .connector_type = DRM_MODE_CONNECTOR_eDP,
2877};
2878
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002879static const struct drm_display_mode newhaven_nhd_43_480272ef_atxl_mode = {
2880 .clock = 9000,
2881 .hdisplay = 480,
2882 .hsync_start = 480 + 2,
2883 .hsync_end = 480 + 2 + 41,
2884 .htotal = 480 + 2 + 41 + 2,
2885 .vdisplay = 272,
2886 .vsync_start = 272 + 2,
2887 .vsync_end = 272 + 2 + 10,
2888 .vtotal = 272 + 2 + 10 + 2,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002889 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
2890};
2891
2892static const struct panel_desc newhaven_nhd_43_480272ef_atxl = {
2893 .modes = &newhaven_nhd_43_480272ef_atxl_mode,
2894 .num_modes = 1,
2895 .bpc = 8,
2896 .size = {
2897 .width = 95,
2898 .height = 54,
2899 },
2900 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
David Brazdil0f672f62019-12-10 10:32:29 +00002901 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE |
2902 DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE,
Olivier Deprez157378f2022-04-04 15:47:50 +02002903 .connector_type = DRM_MODE_CONNECTOR_DPI,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002904};
2905
2906static const struct display_timing nlt_nl192108ac18_02d_timing = {
2907 .pixelclock = { 130000000, 148350000, 163000000 },
2908 .hactive = { 1920, 1920, 1920 },
2909 .hfront_porch = { 80, 100, 100 },
2910 .hback_porch = { 100, 120, 120 },
2911 .hsync_len = { 50, 60, 60 },
2912 .vactive = { 1080, 1080, 1080 },
2913 .vfront_porch = { 12, 30, 30 },
2914 .vback_porch = { 4, 10, 10 },
2915 .vsync_len = { 4, 5, 5 },
2916};
2917
2918static const struct panel_desc nlt_nl192108ac18_02d = {
2919 .timings = &nlt_nl192108ac18_02d_timing,
2920 .num_timings = 1,
2921 .bpc = 8,
2922 .size = {
2923 .width = 344,
2924 .height = 194,
2925 },
2926 .delay = {
2927 .unprepare = 500,
2928 },
2929 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02002930 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002931};
2932
2933static const struct drm_display_mode nvd_9128_mode = {
2934 .clock = 29500,
2935 .hdisplay = 800,
2936 .hsync_start = 800 + 130,
2937 .hsync_end = 800 + 130 + 98,
2938 .htotal = 800 + 0 + 130 + 98,
2939 .vdisplay = 480,
2940 .vsync_start = 480 + 10,
2941 .vsync_end = 480 + 10 + 50,
2942 .vtotal = 480 + 0 + 10 + 50,
2943};
2944
2945static const struct panel_desc nvd_9128 = {
2946 .modes = &nvd_9128_mode,
2947 .num_modes = 1,
2948 .bpc = 8,
2949 .size = {
2950 .width = 156,
2951 .height = 88,
2952 },
2953 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02002954 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002955};
2956
2957static const struct display_timing okaya_rs800480t_7x0gp_timing = {
2958 .pixelclock = { 30000000, 30000000, 40000000 },
2959 .hactive = { 800, 800, 800 },
2960 .hfront_porch = { 40, 40, 40 },
2961 .hback_porch = { 40, 40, 40 },
2962 .hsync_len = { 1, 48, 48 },
2963 .vactive = { 480, 480, 480 },
2964 .vfront_porch = { 13, 13, 13 },
2965 .vback_porch = { 29, 29, 29 },
2966 .vsync_len = { 3, 3, 3 },
2967 .flags = DISPLAY_FLAGS_DE_HIGH,
2968};
2969
2970static const struct panel_desc okaya_rs800480t_7x0gp = {
2971 .timings = &okaya_rs800480t_7x0gp_timing,
2972 .num_timings = 1,
2973 .bpc = 6,
2974 .size = {
2975 .width = 154,
2976 .height = 87,
2977 },
2978 .delay = {
2979 .prepare = 41,
2980 .enable = 50,
2981 .unprepare = 41,
2982 .disable = 50,
2983 },
2984 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
2985};
2986
2987static const struct drm_display_mode olimex_lcd_olinuxino_43ts_mode = {
2988 .clock = 9000,
2989 .hdisplay = 480,
2990 .hsync_start = 480 + 5,
2991 .hsync_end = 480 + 5 + 30,
2992 .htotal = 480 + 5 + 30 + 10,
2993 .vdisplay = 272,
2994 .vsync_start = 272 + 8,
2995 .vsync_end = 272 + 8 + 5,
2996 .vtotal = 272 + 8 + 5 + 3,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002997};
2998
2999static const struct panel_desc olimex_lcd_olinuxino_43ts = {
3000 .modes = &olimex_lcd_olinuxino_43ts_mode,
3001 .num_modes = 1,
3002 .size = {
3003 .width = 95,
3004 .height = 54,
3005 },
3006 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
3007};
3008
3009/*
3010 * 800x480 CVT. The panel appears to be quite accepting, at least as far as
3011 * pixel clocks, but this is the timing that was being used in the Adafruit
3012 * installation instructions.
3013 */
3014static const struct drm_display_mode ontat_yx700wv03_mode = {
3015 .clock = 29500,
3016 .hdisplay = 800,
3017 .hsync_start = 824,
3018 .hsync_end = 896,
3019 .htotal = 992,
3020 .vdisplay = 480,
3021 .vsync_start = 483,
3022 .vsync_end = 493,
3023 .vtotal = 500,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003024 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
3025};
3026
3027/*
3028 * Specification at:
3029 * https://www.adafruit.com/images/product-files/2406/c3163.pdf
3030 */
3031static const struct panel_desc ontat_yx700wv03 = {
3032 .modes = &ontat_yx700wv03_mode,
3033 .num_modes = 1,
3034 .bpc = 8,
3035 .size = {
3036 .width = 154,
3037 .height = 83,
3038 },
3039 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
3040};
3041
David Brazdil0f672f62019-12-10 10:32:29 +00003042static const struct drm_display_mode ortustech_com37h3m_mode = {
Olivier Deprez157378f2022-04-04 15:47:50 +02003043 .clock = 22230,
David Brazdil0f672f62019-12-10 10:32:29 +00003044 .hdisplay = 480,
Olivier Deprez157378f2022-04-04 15:47:50 +02003045 .hsync_start = 480 + 40,
3046 .hsync_end = 480 + 40 + 10,
3047 .htotal = 480 + 40 + 10 + 40,
David Brazdil0f672f62019-12-10 10:32:29 +00003048 .vdisplay = 640,
3049 .vsync_start = 640 + 4,
Olivier Deprez157378f2022-04-04 15:47:50 +02003050 .vsync_end = 640 + 4 + 2,
3051 .vtotal = 640 + 4 + 2 + 4,
David Brazdil0f672f62019-12-10 10:32:29 +00003052 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
3053};
3054
3055static const struct panel_desc ortustech_com37h3m = {
3056 .modes = &ortustech_com37h3m_mode,
3057 .num_modes = 1,
3058 .bpc = 8,
3059 .size = {
3060 .width = 56, /* 56.16mm */
3061 .height = 75, /* 74.88mm */
3062 },
3063 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
Olivier Deprez157378f2022-04-04 15:47:50 +02003064 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE |
David Brazdil0f672f62019-12-10 10:32:29 +00003065 DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE,
3066};
3067
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003068static const struct drm_display_mode ortustech_com43h4m85ulc_mode = {
3069 .clock = 25000,
3070 .hdisplay = 480,
3071 .hsync_start = 480 + 10,
3072 .hsync_end = 480 + 10 + 10,
3073 .htotal = 480 + 10 + 10 + 15,
3074 .vdisplay = 800,
3075 .vsync_start = 800 + 3,
3076 .vsync_end = 800 + 3 + 3,
3077 .vtotal = 800 + 3 + 3 + 3,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003078};
3079
3080static const struct panel_desc ortustech_com43h4m85ulc = {
3081 .modes = &ortustech_com43h4m85ulc_mode,
3082 .num_modes = 1,
Olivier Deprez0e641232021-09-23 10:07:05 +02003083 .bpc = 6,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003084 .size = {
3085 .width = 56,
3086 .height = 93,
3087 },
Olivier Deprez0e641232021-09-23 10:07:05 +02003088 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
David Brazdil0f672f62019-12-10 10:32:29 +00003089 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
Olivier Deprez157378f2022-04-04 15:47:50 +02003090 .connector_type = DRM_MODE_CONNECTOR_DPI,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003091};
3092
David Brazdil0f672f62019-12-10 10:32:29 +00003093static const struct drm_display_mode osddisplays_osd070t1718_19ts_mode = {
3094 .clock = 33000,
3095 .hdisplay = 800,
3096 .hsync_start = 800 + 210,
3097 .hsync_end = 800 + 210 + 30,
3098 .htotal = 800 + 210 + 30 + 16,
3099 .vdisplay = 480,
3100 .vsync_start = 480 + 22,
3101 .vsync_end = 480 + 22 + 13,
3102 .vtotal = 480 + 22 + 13 + 10,
David Brazdil0f672f62019-12-10 10:32:29 +00003103 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
3104};
3105
3106static const struct panel_desc osddisplays_osd070t1718_19ts = {
3107 .modes = &osddisplays_osd070t1718_19ts_mode,
3108 .num_modes = 1,
3109 .bpc = 8,
3110 .size = {
3111 .width = 152,
3112 .height = 91,
3113 },
3114 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
Olivier Deprez157378f2022-04-04 15:47:50 +02003115 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE |
3116 DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE,
3117 .connector_type = DRM_MODE_CONNECTOR_DPI,
David Brazdil0f672f62019-12-10 10:32:29 +00003118};
3119
3120static const struct drm_display_mode pda_91_00156_a0_mode = {
3121 .clock = 33300,
3122 .hdisplay = 800,
3123 .hsync_start = 800 + 1,
3124 .hsync_end = 800 + 1 + 64,
3125 .htotal = 800 + 1 + 64 + 64,
3126 .vdisplay = 480,
3127 .vsync_start = 480 + 1,
3128 .vsync_end = 480 + 1 + 23,
3129 .vtotal = 480 + 1 + 23 + 22,
David Brazdil0f672f62019-12-10 10:32:29 +00003130};
3131
3132static const struct panel_desc pda_91_00156_a0 = {
3133 .modes = &pda_91_00156_a0_mode,
3134 .num_modes = 1,
3135 .size = {
3136 .width = 152,
3137 .height = 91,
3138 },
3139 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
3140};
3141
Olivier Deprez157378f2022-04-04 15:47:50 +02003142static const struct drm_display_mode powertip_ph800480t013_idf02_mode = {
3143 .clock = 24750,
3144 .hdisplay = 800,
3145 .hsync_start = 800 + 54,
3146 .hsync_end = 800 + 54 + 2,
3147 .htotal = 800 + 54 + 2 + 44,
3148 .vdisplay = 480,
3149 .vsync_start = 480 + 49,
3150 .vsync_end = 480 + 49 + 2,
3151 .vtotal = 480 + 49 + 2 + 22,
3152};
3153
3154static const struct panel_desc powertip_ph800480t013_idf02 = {
3155 .modes = &powertip_ph800480t013_idf02_mode,
3156 .num_modes = 1,
3157 .size = {
3158 .width = 152,
3159 .height = 91,
3160 },
3161 .bus_flags = DRM_BUS_FLAG_DE_HIGH |
3162 DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE |
3163 DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE,
3164 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
3165 .connector_type = DRM_MODE_CONNECTOR_DPI,
3166};
David Brazdil0f672f62019-12-10 10:32:29 +00003167
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003168static const struct drm_display_mode qd43003c0_40_mode = {
3169 .clock = 9000,
3170 .hdisplay = 480,
3171 .hsync_start = 480 + 8,
3172 .hsync_end = 480 + 8 + 4,
3173 .htotal = 480 + 8 + 4 + 39,
3174 .vdisplay = 272,
3175 .vsync_start = 272 + 4,
3176 .vsync_end = 272 + 4 + 10,
3177 .vtotal = 272 + 4 + 10 + 2,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003178};
3179
3180static const struct panel_desc qd43003c0_40 = {
3181 .modes = &qd43003c0_40_mode,
3182 .num_modes = 1,
3183 .bpc = 8,
3184 .size = {
3185 .width = 95,
3186 .height = 53,
3187 },
3188 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
3189};
3190
3191static const struct display_timing rocktech_rk070er9427_timing = {
3192 .pixelclock = { 26400000, 33300000, 46800000 },
3193 .hactive = { 800, 800, 800 },
3194 .hfront_porch = { 16, 210, 354 },
3195 .hback_porch = { 46, 46, 46 },
3196 .hsync_len = { 1, 1, 1 },
3197 .vactive = { 480, 480, 480 },
3198 .vfront_porch = { 7, 22, 147 },
3199 .vback_porch = { 23, 23, 23 },
3200 .vsync_len = { 1, 1, 1 },
3201 .flags = DISPLAY_FLAGS_DE_HIGH,
3202};
3203
3204static const struct panel_desc rocktech_rk070er9427 = {
3205 .timings = &rocktech_rk070er9427_timing,
3206 .num_timings = 1,
3207 .bpc = 6,
3208 .size = {
3209 .width = 154,
3210 .height = 86,
3211 },
3212 .delay = {
3213 .prepare = 41,
3214 .enable = 50,
3215 .unprepare = 41,
3216 .disable = 50,
3217 },
3218 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
3219};
3220
Olivier Deprez157378f2022-04-04 15:47:50 +02003221static const struct drm_display_mode rocktech_rk101ii01d_ct_mode = {
3222 .clock = 71100,
3223 .hdisplay = 1280,
3224 .hsync_start = 1280 + 48,
3225 .hsync_end = 1280 + 48 + 32,
3226 .htotal = 1280 + 48 + 32 + 80,
3227 .vdisplay = 800,
3228 .vsync_start = 800 + 2,
3229 .vsync_end = 800 + 2 + 5,
3230 .vtotal = 800 + 2 + 5 + 16,
3231};
3232
3233static const struct panel_desc rocktech_rk101ii01d_ct = {
3234 .modes = &rocktech_rk101ii01d_ct_mode,
3235 .num_modes = 1,
3236 .size = {
3237 .width = 217,
3238 .height = 136,
3239 },
3240 .delay = {
3241 .prepare = 50,
3242 .disable = 50,
3243 },
3244 .bus_flags = DRM_BUS_FLAG_DE_HIGH,
3245 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
3246 .connector_type = DRM_MODE_CONNECTOR_LVDS,
3247};
3248
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003249static const struct drm_display_mode samsung_lsn122dl01_c01_mode = {
3250 .clock = 271560,
3251 .hdisplay = 2560,
3252 .hsync_start = 2560 + 48,
3253 .hsync_end = 2560 + 48 + 32,
3254 .htotal = 2560 + 48 + 32 + 80,
3255 .vdisplay = 1600,
3256 .vsync_start = 1600 + 2,
3257 .vsync_end = 1600 + 2 + 5,
3258 .vtotal = 1600 + 2 + 5 + 57,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003259};
3260
3261static const struct panel_desc samsung_lsn122dl01_c01 = {
3262 .modes = &samsung_lsn122dl01_c01_mode,
3263 .num_modes = 1,
3264 .size = {
3265 .width = 263,
3266 .height = 164,
3267 },
3268};
3269
3270static const struct drm_display_mode samsung_ltn101nt05_mode = {
3271 .clock = 54030,
3272 .hdisplay = 1024,
3273 .hsync_start = 1024 + 24,
3274 .hsync_end = 1024 + 24 + 136,
3275 .htotal = 1024 + 24 + 136 + 160,
3276 .vdisplay = 600,
3277 .vsync_start = 600 + 3,
3278 .vsync_end = 600 + 3 + 6,
3279 .vtotal = 600 + 3 + 6 + 61,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003280};
3281
3282static const struct panel_desc samsung_ltn101nt05 = {
3283 .modes = &samsung_ltn101nt05_mode,
3284 .num_modes = 1,
3285 .bpc = 6,
3286 .size = {
3287 .width = 223,
3288 .height = 125,
3289 },
Olivier Deprez157378f2022-04-04 15:47:50 +02003290 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
3291 .bus_flags = DRM_BUS_FLAG_DE_HIGH,
3292 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003293};
3294
3295static const struct drm_display_mode samsung_ltn140at29_301_mode = {
3296 .clock = 76300,
3297 .hdisplay = 1366,
3298 .hsync_start = 1366 + 64,
3299 .hsync_end = 1366 + 64 + 48,
3300 .htotal = 1366 + 64 + 48 + 128,
3301 .vdisplay = 768,
3302 .vsync_start = 768 + 2,
3303 .vsync_end = 768 + 2 + 5,
3304 .vtotal = 768 + 2 + 5 + 17,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003305};
3306
3307static const struct panel_desc samsung_ltn140at29_301 = {
3308 .modes = &samsung_ltn140at29_301_mode,
3309 .num_modes = 1,
3310 .bpc = 6,
3311 .size = {
3312 .width = 320,
3313 .height = 187,
3314 },
3315};
3316
Olivier Deprez157378f2022-04-04 15:47:50 +02003317static const struct display_timing satoz_sat050at40h12r2_timing = {
3318 .pixelclock = {33300000, 33300000, 50000000},
3319 .hactive = {800, 800, 800},
3320 .hfront_porch = {16, 210, 354},
3321 .hback_porch = {46, 46, 46},
3322 .hsync_len = {1, 1, 40},
3323 .vactive = {480, 480, 480},
3324 .vfront_porch = {7, 22, 147},
3325 .vback_porch = {23, 23, 23},
3326 .vsync_len = {1, 1, 20},
3327};
3328
3329static const struct panel_desc satoz_sat050at40h12r2 = {
3330 .timings = &satoz_sat050at40h12r2_timing,
3331 .num_timings = 1,
3332 .bpc = 8,
3333 .size = {
3334 .width = 108,
3335 .height = 65,
3336 },
3337 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
3338 .connector_type = DRM_MODE_CONNECTOR_LVDS,
3339};
3340
David Brazdil0f672f62019-12-10 10:32:29 +00003341static const struct drm_display_mode sharp_ld_d5116z01b_mode = {
3342 .clock = 168480,
3343 .hdisplay = 1920,
3344 .hsync_start = 1920 + 48,
3345 .hsync_end = 1920 + 48 + 32,
3346 .htotal = 1920 + 48 + 32 + 80,
3347 .vdisplay = 1280,
3348 .vsync_start = 1280 + 3,
3349 .vsync_end = 1280 + 3 + 10,
3350 .vtotal = 1280 + 3 + 10 + 57,
David Brazdil0f672f62019-12-10 10:32:29 +00003351 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
3352};
3353
3354static const struct panel_desc sharp_ld_d5116z01b = {
3355 .modes = &sharp_ld_d5116z01b_mode,
3356 .num_modes = 1,
3357 .bpc = 8,
3358 .size = {
3359 .width = 260,
3360 .height = 120,
3361 },
3362 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
3363 .bus_flags = DRM_BUS_FLAG_DATA_MSB_TO_LSB,
3364};
3365
3366static const struct drm_display_mode sharp_lq070y3dg3b_mode = {
3367 .clock = 33260,
3368 .hdisplay = 800,
3369 .hsync_start = 800 + 64,
3370 .hsync_end = 800 + 64 + 128,
3371 .htotal = 800 + 64 + 128 + 64,
3372 .vdisplay = 480,
3373 .vsync_start = 480 + 8,
3374 .vsync_end = 480 + 8 + 2,
3375 .vtotal = 480 + 8 + 2 + 35,
David Brazdil0f672f62019-12-10 10:32:29 +00003376 .flags = DISPLAY_FLAGS_PIXDATA_POSEDGE,
3377};
3378
3379static const struct panel_desc sharp_lq070y3dg3b = {
3380 .modes = &sharp_lq070y3dg3b_mode,
3381 .num_modes = 1,
3382 .bpc = 8,
3383 .size = {
3384 .width = 152, /* 152.4mm */
3385 .height = 91, /* 91.4mm */
3386 },
3387 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
Olivier Deprez157378f2022-04-04 15:47:50 +02003388 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE |
David Brazdil0f672f62019-12-10 10:32:29 +00003389 DRM_BUS_FLAG_SYNC_DRIVE_POSEDGE,
3390};
3391
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003392static const struct drm_display_mode sharp_lq035q7db03_mode = {
3393 .clock = 5500,
3394 .hdisplay = 240,
3395 .hsync_start = 240 + 16,
3396 .hsync_end = 240 + 16 + 7,
3397 .htotal = 240 + 16 + 7 + 5,
3398 .vdisplay = 320,
3399 .vsync_start = 320 + 9,
3400 .vsync_end = 320 + 9 + 1,
3401 .vtotal = 320 + 9 + 1 + 7,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003402};
3403
3404static const struct panel_desc sharp_lq035q7db03 = {
3405 .modes = &sharp_lq035q7db03_mode,
3406 .num_modes = 1,
3407 .bpc = 6,
3408 .size = {
3409 .width = 54,
3410 .height = 72,
3411 },
3412 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
3413};
3414
3415static const struct display_timing sharp_lq101k1ly04_timing = {
3416 .pixelclock = { 60000000, 65000000, 80000000 },
3417 .hactive = { 1280, 1280, 1280 },
3418 .hfront_porch = { 20, 20, 20 },
3419 .hback_porch = { 20, 20, 20 },
3420 .hsync_len = { 10, 10, 10 },
3421 .vactive = { 800, 800, 800 },
3422 .vfront_porch = { 4, 4, 4 },
3423 .vback_porch = { 4, 4, 4 },
3424 .vsync_len = { 4, 4, 4 },
3425 .flags = DISPLAY_FLAGS_PIXDATA_POSEDGE,
3426};
3427
3428static const struct panel_desc sharp_lq101k1ly04 = {
3429 .timings = &sharp_lq101k1ly04_timing,
3430 .num_timings = 1,
3431 .bpc = 8,
3432 .size = {
3433 .width = 217,
3434 .height = 136,
3435 },
3436 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA,
Olivier Deprez157378f2022-04-04 15:47:50 +02003437 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003438};
3439
3440static const struct display_timing sharp_lq123p1jx31_timing = {
3441 .pixelclock = { 252750000, 252750000, 266604720 },
3442 .hactive = { 2400, 2400, 2400 },
3443 .hfront_porch = { 48, 48, 48 },
3444 .hback_porch = { 80, 80, 84 },
3445 .hsync_len = { 32, 32, 32 },
3446 .vactive = { 1600, 1600, 1600 },
3447 .vfront_porch = { 3, 3, 3 },
3448 .vback_porch = { 33, 33, 120 },
3449 .vsync_len = { 10, 10, 10 },
3450 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW,
3451};
3452
3453static const struct panel_desc sharp_lq123p1jx31 = {
3454 .timings = &sharp_lq123p1jx31_timing,
3455 .num_timings = 1,
3456 .bpc = 8,
3457 .size = {
3458 .width = 259,
3459 .height = 173,
3460 },
3461 .delay = {
3462 .prepare = 110,
3463 .enable = 50,
3464 .unprepare = 550,
3465 },
3466};
3467
Olivier Deprez157378f2022-04-04 15:47:50 +02003468static const struct drm_display_mode sharp_ls020b1dd01d_modes[] = {
3469 { /* 50 Hz */
3470 .clock = 3000,
3471 .hdisplay = 240,
3472 .hsync_start = 240 + 58,
3473 .hsync_end = 240 + 58 + 1,
3474 .htotal = 240 + 58 + 1 + 1,
3475 .vdisplay = 160,
3476 .vsync_start = 160 + 24,
3477 .vsync_end = 160 + 24 + 10,
3478 .vtotal = 160 + 24 + 10 + 6,
3479 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003480 },
Olivier Deprez157378f2022-04-04 15:47:50 +02003481 { /* 60 Hz */
3482 .clock = 3000,
3483 .hdisplay = 240,
3484 .hsync_start = 240 + 8,
3485 .hsync_end = 240 + 8 + 1,
3486 .htotal = 240 + 8 + 1 + 1,
3487 .vdisplay = 160,
3488 .vsync_start = 160 + 24,
3489 .vsync_end = 160 + 24 + 10,
3490 .vtotal = 160 + 24 + 10 + 6,
3491 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
3492 },
David Brazdil0f672f62019-12-10 10:32:29 +00003493};
3494
3495static const struct panel_desc sharp_ls020b1dd01d = {
Olivier Deprez157378f2022-04-04 15:47:50 +02003496 .modes = sharp_ls020b1dd01d_modes,
3497 .num_modes = ARRAY_SIZE(sharp_ls020b1dd01d_modes),
David Brazdil0f672f62019-12-10 10:32:29 +00003498 .bpc = 6,
3499 .size = {
3500 .width = 42,
3501 .height = 28,
3502 },
3503 .bus_format = MEDIA_BUS_FMT_RGB565_1X16,
3504 .bus_flags = DRM_BUS_FLAG_DE_HIGH
Olivier Deprez157378f2022-04-04 15:47:50 +02003505 | DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE
David Brazdil0f672f62019-12-10 10:32:29 +00003506 | DRM_BUS_FLAG_SHARP_SIGNALS,
3507};
3508
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003509static const struct drm_display_mode shelly_sca07010_bfn_lnn_mode = {
3510 .clock = 33300,
3511 .hdisplay = 800,
3512 .hsync_start = 800 + 1,
3513 .hsync_end = 800 + 1 + 64,
3514 .htotal = 800 + 1 + 64 + 64,
3515 .vdisplay = 480,
3516 .vsync_start = 480 + 1,
3517 .vsync_end = 480 + 1 + 23,
3518 .vtotal = 480 + 1 + 23 + 22,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003519};
3520
3521static const struct panel_desc shelly_sca07010_bfn_lnn = {
3522 .modes = &shelly_sca07010_bfn_lnn_mode,
3523 .num_modes = 1,
3524 .size = {
3525 .width = 152,
3526 .height = 91,
3527 },
3528 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
3529};
3530
Olivier Deprez157378f2022-04-04 15:47:50 +02003531static const struct drm_display_mode starry_kr070pe2t_mode = {
3532 .clock = 33000,
3533 .hdisplay = 800,
3534 .hsync_start = 800 + 209,
3535 .hsync_end = 800 + 209 + 1,
3536 .htotal = 800 + 209 + 1 + 45,
3537 .vdisplay = 480,
3538 .vsync_start = 480 + 22,
3539 .vsync_end = 480 + 22 + 1,
3540 .vtotal = 480 + 22 + 1 + 22,
3541};
3542
3543static const struct panel_desc starry_kr070pe2t = {
3544 .modes = &starry_kr070pe2t_mode,
3545 .num_modes = 1,
3546 .bpc = 8,
3547 .size = {
3548 .width = 152,
3549 .height = 86,
3550 },
3551 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
3552 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE,
3553 .connector_type = DRM_MODE_CONNECTOR_DPI,
3554};
3555
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003556static const struct drm_display_mode starry_kr122ea0sra_mode = {
3557 .clock = 147000,
3558 .hdisplay = 1920,
3559 .hsync_start = 1920 + 16,
3560 .hsync_end = 1920 + 16 + 16,
3561 .htotal = 1920 + 16 + 16 + 32,
3562 .vdisplay = 1200,
3563 .vsync_start = 1200 + 15,
3564 .vsync_end = 1200 + 15 + 2,
3565 .vtotal = 1200 + 15 + 2 + 18,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003566 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
3567};
3568
3569static const struct panel_desc starry_kr122ea0sra = {
3570 .modes = &starry_kr122ea0sra_mode,
3571 .num_modes = 1,
3572 .size = {
3573 .width = 263,
3574 .height = 164,
3575 },
3576 .delay = {
3577 .prepare = 10 + 200,
3578 .enable = 50,
3579 .unprepare = 10 + 500,
3580 },
3581};
3582
David Brazdil0f672f62019-12-10 10:32:29 +00003583static const struct drm_display_mode tfc_s9700rtwv43tr_01b_mode = {
3584 .clock = 30000,
3585 .hdisplay = 800,
3586 .hsync_start = 800 + 39,
3587 .hsync_end = 800 + 39 + 47,
3588 .htotal = 800 + 39 + 47 + 39,
3589 .vdisplay = 480,
3590 .vsync_start = 480 + 13,
3591 .vsync_end = 480 + 13 + 2,
3592 .vtotal = 480 + 13 + 2 + 29,
David Brazdil0f672f62019-12-10 10:32:29 +00003593};
3594
3595static const struct panel_desc tfc_s9700rtwv43tr_01b = {
3596 .modes = &tfc_s9700rtwv43tr_01b_mode,
3597 .num_modes = 1,
3598 .bpc = 8,
3599 .size = {
3600 .width = 155,
3601 .height = 90,
3602 },
3603 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
Olivier Deprez157378f2022-04-04 15:47:50 +02003604 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE,
David Brazdil0f672f62019-12-10 10:32:29 +00003605};
3606
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003607static const struct display_timing tianma_tm070jdhg30_timing = {
3608 .pixelclock = { 62600000, 68200000, 78100000 },
3609 .hactive = { 1280, 1280, 1280 },
3610 .hfront_porch = { 15, 64, 159 },
3611 .hback_porch = { 5, 5, 5 },
3612 .hsync_len = { 1, 1, 256 },
3613 .vactive = { 800, 800, 800 },
3614 .vfront_porch = { 3, 40, 99 },
3615 .vback_porch = { 2, 2, 2 },
3616 .vsync_len = { 1, 1, 128 },
3617 .flags = DISPLAY_FLAGS_DE_HIGH,
3618};
3619
3620static const struct panel_desc tianma_tm070jdhg30 = {
3621 .timings = &tianma_tm070jdhg30_timing,
3622 .num_timings = 1,
3623 .bpc = 8,
3624 .size = {
3625 .width = 151,
3626 .height = 95,
3627 },
3628 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02003629 .connector_type = DRM_MODE_CONNECTOR_LVDS,
3630};
3631
3632static const struct panel_desc tianma_tm070jvhg33 = {
3633 .timings = &tianma_tm070jdhg30_timing,
3634 .num_timings = 1,
3635 .bpc = 8,
3636 .size = {
3637 .width = 150,
3638 .height = 94,
3639 },
3640 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
3641 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003642};
3643
3644static const struct display_timing tianma_tm070rvhg71_timing = {
3645 .pixelclock = { 27700000, 29200000, 39600000 },
3646 .hactive = { 800, 800, 800 },
3647 .hfront_porch = { 12, 40, 212 },
3648 .hback_porch = { 88, 88, 88 },
3649 .hsync_len = { 1, 1, 40 },
3650 .vactive = { 480, 480, 480 },
3651 .vfront_porch = { 1, 13, 88 },
3652 .vback_porch = { 32, 32, 32 },
3653 .vsync_len = { 1, 1, 3 },
3654 .flags = DISPLAY_FLAGS_DE_HIGH,
3655};
3656
3657static const struct panel_desc tianma_tm070rvhg71 = {
3658 .timings = &tianma_tm070rvhg71_timing,
3659 .num_timings = 1,
3660 .bpc = 8,
3661 .size = {
3662 .width = 154,
3663 .height = 86,
3664 },
3665 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02003666 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003667};
3668
David Brazdil0f672f62019-12-10 10:32:29 +00003669static const struct drm_display_mode ti_nspire_cx_lcd_mode[] = {
3670 {
3671 .clock = 10000,
3672 .hdisplay = 320,
3673 .hsync_start = 320 + 50,
3674 .hsync_end = 320 + 50 + 6,
3675 .htotal = 320 + 50 + 6 + 38,
3676 .vdisplay = 240,
3677 .vsync_start = 240 + 3,
3678 .vsync_end = 240 + 3 + 1,
3679 .vtotal = 240 + 3 + 1 + 17,
David Brazdil0f672f62019-12-10 10:32:29 +00003680 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
3681 },
3682};
3683
3684static const struct panel_desc ti_nspire_cx_lcd_panel = {
3685 .modes = ti_nspire_cx_lcd_mode,
3686 .num_modes = 1,
3687 .bpc = 8,
3688 .size = {
3689 .width = 65,
3690 .height = 49,
3691 },
3692 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
Olivier Deprez157378f2022-04-04 15:47:50 +02003693 .bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_POSEDGE,
David Brazdil0f672f62019-12-10 10:32:29 +00003694};
3695
3696static const struct drm_display_mode ti_nspire_classic_lcd_mode[] = {
3697 {
3698 .clock = 10000,
3699 .hdisplay = 320,
3700 .hsync_start = 320 + 6,
3701 .hsync_end = 320 + 6 + 6,
3702 .htotal = 320 + 6 + 6 + 6,
3703 .vdisplay = 240,
3704 .vsync_start = 240 + 0,
3705 .vsync_end = 240 + 0 + 1,
3706 .vtotal = 240 + 0 + 1 + 0,
David Brazdil0f672f62019-12-10 10:32:29 +00003707 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
3708 },
3709};
3710
3711static const struct panel_desc ti_nspire_classic_lcd_panel = {
3712 .modes = ti_nspire_classic_lcd_mode,
3713 .num_modes = 1,
3714 /* The grayscale panel has 8 bit for the color .. Y (black) */
3715 .bpc = 8,
3716 .size = {
3717 .width = 71,
3718 .height = 53,
3719 },
3720 /* This is the grayscale bus format */
3721 .bus_format = MEDIA_BUS_FMT_Y8_1X8,
Olivier Deprez157378f2022-04-04 15:47:50 +02003722 .bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE,
David Brazdil0f672f62019-12-10 10:32:29 +00003723};
3724
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003725static const struct drm_display_mode toshiba_lt089ac29000_mode = {
3726 .clock = 79500,
3727 .hdisplay = 1280,
3728 .hsync_start = 1280 + 192,
3729 .hsync_end = 1280 + 192 + 128,
3730 .htotal = 1280 + 192 + 128 + 64,
3731 .vdisplay = 768,
3732 .vsync_start = 768 + 20,
3733 .vsync_end = 768 + 20 + 7,
3734 .vtotal = 768 + 20 + 7 + 3,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003735};
3736
3737static const struct panel_desc toshiba_lt089ac29000 = {
3738 .modes = &toshiba_lt089ac29000_mode,
3739 .num_modes = 1,
3740 .size = {
3741 .width = 194,
3742 .height = 116,
3743 },
Olivier Deprez157378f2022-04-04 15:47:50 +02003744 .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA,
3745 .bus_flags = DRM_BUS_FLAG_DE_HIGH,
3746 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003747};
3748
3749static const struct drm_display_mode tpk_f07a_0102_mode = {
3750 .clock = 33260,
3751 .hdisplay = 800,
3752 .hsync_start = 800 + 40,
3753 .hsync_end = 800 + 40 + 128,
3754 .htotal = 800 + 40 + 128 + 88,
3755 .vdisplay = 480,
3756 .vsync_start = 480 + 10,
3757 .vsync_end = 480 + 10 + 2,
3758 .vtotal = 480 + 10 + 2 + 33,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003759};
3760
3761static const struct panel_desc tpk_f07a_0102 = {
3762 .modes = &tpk_f07a_0102_mode,
3763 .num_modes = 1,
3764 .size = {
3765 .width = 152,
3766 .height = 91,
3767 },
David Brazdil0f672f62019-12-10 10:32:29 +00003768 .bus_flags = DRM_BUS_FLAG_PIXDATA_DRIVE_POSEDGE,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003769};
3770
3771static const struct drm_display_mode tpk_f10a_0102_mode = {
3772 .clock = 45000,
3773 .hdisplay = 1024,
3774 .hsync_start = 1024 + 176,
3775 .hsync_end = 1024 + 176 + 5,
3776 .htotal = 1024 + 176 + 5 + 88,
3777 .vdisplay = 600,
3778 .vsync_start = 600 + 20,
3779 .vsync_end = 600 + 20 + 5,
3780 .vtotal = 600 + 20 + 5 + 25,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003781};
3782
3783static const struct panel_desc tpk_f10a_0102 = {
3784 .modes = &tpk_f10a_0102_mode,
3785 .num_modes = 1,
3786 .size = {
3787 .width = 223,
3788 .height = 125,
3789 },
3790};
3791
3792static const struct display_timing urt_umsh_8596md_timing = {
3793 .pixelclock = { 33260000, 33260000, 33260000 },
3794 .hactive = { 800, 800, 800 },
3795 .hfront_porch = { 41, 41, 41 },
3796 .hback_porch = { 216 - 128, 216 - 128, 216 - 128 },
3797 .hsync_len = { 71, 128, 128 },
3798 .vactive = { 480, 480, 480 },
3799 .vfront_porch = { 10, 10, 10 },
3800 .vback_porch = { 35 - 2, 35 - 2, 35 - 2 },
3801 .vsync_len = { 2, 2, 2 },
3802 .flags = DISPLAY_FLAGS_DE_HIGH | DISPLAY_FLAGS_PIXDATA_NEGEDGE |
3803 DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW,
3804};
3805
3806static const struct panel_desc urt_umsh_8596md_lvds = {
3807 .timings = &urt_umsh_8596md_timing,
3808 .num_timings = 1,
3809 .bpc = 6,
3810 .size = {
3811 .width = 152,
3812 .height = 91,
3813 },
3814 .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG,
Olivier Deprez157378f2022-04-04 15:47:50 +02003815 .connector_type = DRM_MODE_CONNECTOR_LVDS,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003816};
3817
3818static const struct panel_desc urt_umsh_8596md_parallel = {
3819 .timings = &urt_umsh_8596md_timing,
3820 .num_timings = 1,
3821 .bpc = 6,
3822 .size = {
3823 .width = 152,
3824 .height = 91,
3825 },
3826 .bus_format = MEDIA_BUS_FMT_RGB666_1X18,
3827};
3828
David Brazdil0f672f62019-12-10 10:32:29 +00003829static const struct drm_display_mode vl050_8048nt_c01_mode = {
3830 .clock = 33333,
3831 .hdisplay = 800,
3832 .hsync_start = 800 + 210,
3833 .hsync_end = 800 + 210 + 20,
3834 .htotal = 800 + 210 + 20 + 46,
3835 .vdisplay = 480,
3836 .vsync_start = 480 + 22,
3837 .vsync_end = 480 + 22 + 10,
3838 .vtotal = 480 + 22 + 10 + 23,
David Brazdil0f672f62019-12-10 10:32:29 +00003839 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
3840};
3841
3842static const struct panel_desc vl050_8048nt_c01 = {
3843 .modes = &vl050_8048nt_c01_mode,
3844 .num_modes = 1,
3845 .bpc = 8,
3846 .size = {
3847 .width = 120,
3848 .height = 76,
3849 },
3850 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
Olivier Deprez157378f2022-04-04 15:47:50 +02003851 .bus_flags = DRM_BUS_FLAG_DE_HIGH | DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE,
David Brazdil0f672f62019-12-10 10:32:29 +00003852};
3853
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003854static const struct drm_display_mode winstar_wf35ltiacd_mode = {
3855 .clock = 6410,
3856 .hdisplay = 320,
3857 .hsync_start = 320 + 20,
3858 .hsync_end = 320 + 20 + 30,
3859 .htotal = 320 + 20 + 30 + 38,
3860 .vdisplay = 240,
3861 .vsync_start = 240 + 4,
3862 .vsync_end = 240 + 4 + 3,
3863 .vtotal = 240 + 4 + 3 + 15,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003864 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
3865};
3866
3867static const struct panel_desc winstar_wf35ltiacd = {
3868 .modes = &winstar_wf35ltiacd_mode,
3869 .num_modes = 1,
3870 .bpc = 8,
3871 .size = {
3872 .width = 70,
3873 .height = 53,
3874 },
3875 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
3876};
3877
David Brazdil0f672f62019-12-10 10:32:29 +00003878static const struct drm_display_mode arm_rtsm_mode[] = {
3879 {
3880 .clock = 65000,
3881 .hdisplay = 1024,
3882 .hsync_start = 1024 + 24,
3883 .hsync_end = 1024 + 24 + 136,
3884 .htotal = 1024 + 24 + 136 + 160,
3885 .vdisplay = 768,
3886 .vsync_start = 768 + 3,
3887 .vsync_end = 768 + 3 + 6,
3888 .vtotal = 768 + 3 + 6 + 29,
David Brazdil0f672f62019-12-10 10:32:29 +00003889 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
3890 },
3891};
3892
3893static const struct panel_desc arm_rtsm = {
3894 .modes = arm_rtsm_mode,
3895 .num_modes = 1,
3896 .bpc = 8,
3897 .size = {
3898 .width = 400,
3899 .height = 300,
3900 },
3901 .bus_format = MEDIA_BUS_FMT_RGB888_1X24,
3902};
3903
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003904static const struct of_device_id platform_of_match[] = {
3905 {
Olivier Deprez157378f2022-04-04 15:47:50 +02003906 .compatible = "ampire,am-1280800n3tzqw-t00h",
3907 .data = &ampire_am_1280800n3tzqw_t00h,
3908 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003909 .compatible = "ampire,am-480272h3tmqw-t01h",
3910 .data = &ampire_am_480272h3tmqw_t01h,
3911 }, {
3912 .compatible = "ampire,am800480r3tmqwa1h",
3913 .data = &ampire_am800480r3tmqwa1h,
3914 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00003915 .compatible = "arm,rtsm-display",
3916 .data = &arm_rtsm,
3917 }, {
3918 .compatible = "armadeus,st0700-adapt",
3919 .data = &armadeus_st0700_adapt,
3920 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003921 .compatible = "auo,b101aw03",
3922 .data = &auo_b101aw03,
3923 }, {
3924 .compatible = "auo,b101ean01",
3925 .data = &auo_b101ean01,
3926 }, {
3927 .compatible = "auo,b101xtn01",
3928 .data = &auo_b101xtn01,
3929 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02003930 .compatible = "auo,b116xa01",
3931 .data = &auo_b116xak01,
3932 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003933 .compatible = "auo,b116xw03",
3934 .data = &auo_b116xw03,
3935 }, {
3936 .compatible = "auo,b133htn01",
3937 .data = &auo_b133htn01,
3938 }, {
3939 .compatible = "auo,b133xtn01",
3940 .data = &auo_b133xtn01,
3941 }, {
3942 .compatible = "auo,g070vvn01",
3943 .data = &auo_g070vvn01,
3944 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00003945 .compatible = "auo,g101evn010",
3946 .data = &auo_g101evn010,
3947 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003948 .compatible = "auo,g104sn02",
3949 .data = &auo_g104sn02,
3950 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02003951 .compatible = "auo,g121ean01",
3952 .data = &auo_g121ean01,
3953 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003954 .compatible = "auo,g133han01",
3955 .data = &auo_g133han01,
3956 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02003957 .compatible = "auo,g156xtn01",
3958 .data = &auo_g156xtn01,
3959 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003960 .compatible = "auo,g185han01",
3961 .data = &auo_g185han01,
3962 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02003963 .compatible = "auo,g190ean01",
3964 .data = &auo_g190ean01,
3965 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003966 .compatible = "auo,p320hvn03",
3967 .data = &auo_p320hvn03,
3968 }, {
3969 .compatible = "auo,t215hvn01",
3970 .data = &auo_t215hvn01,
3971 }, {
3972 .compatible = "avic,tm070ddh03",
3973 .data = &avic_tm070ddh03,
3974 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00003975 .compatible = "bananapi,s070wv20-ct16",
3976 .data = &bananapi_s070wv20_ct16,
3977 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00003978 .compatible = "boe,hv070wsa-100",
3979 .data = &boe_hv070wsa
3980 }, {
3981 .compatible = "boe,nv101wxmn51",
3982 .data = &boe_nv101wxmn51,
3983 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02003984 .compatible = "boe,nv133fhm-n61",
3985 .data = &boe_nv133fhm_n61,
3986 }, {
3987 .compatible = "boe,nv133fhm-n62",
3988 .data = &boe_nv133fhm_n61,
3989 }, {
3990 .compatible = "boe,nv140fhmn49",
3991 .data = &boe_nv140fhmn49,
3992 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00003993 .compatible = "cdtech,s043wq26h-ct7",
3994 .data = &cdtech_s043wq26h_ct7,
3995 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02003996 .compatible = "cdtech,s070pws19hp-fc21",
3997 .data = &cdtech_s070pws19hp_fc21,
3998 }, {
3999 .compatible = "cdtech,s070swv29hg-dc44",
4000 .data = &cdtech_s070swv29hg_dc44,
4001 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00004002 .compatible = "cdtech,s070wv95-ct16",
4003 .data = &cdtech_s070wv95_ct16,
4004 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02004005 .compatible = "chefree,ch101olhlwh-002",
4006 .data = &chefree_ch101olhlwh_002,
4007 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004008 .compatible = "chunghwa,claa070wp03xg",
4009 .data = &chunghwa_claa070wp03xg,
4010 }, {
4011 .compatible = "chunghwa,claa101wa01a",
4012 .data = &chunghwa_claa101wa01a
4013 }, {
4014 .compatible = "chunghwa,claa101wb01",
4015 .data = &chunghwa_claa101wb01
4016 }, {
4017 .compatible = "dataimage,scf0700c48ggu18",
4018 .data = &dataimage_scf0700c48ggu18,
4019 }, {
4020 .compatible = "dlc,dlc0700yzg-1",
4021 .data = &dlc_dlc0700yzg_1,
4022 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00004023 .compatible = "dlc,dlc1010gig",
4024 .data = &dlc_dlc1010gig,
4025 }, {
4026 .compatible = "edt,et035012dm6",
4027 .data = &edt_et035012dm6,
4028 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02004029 .compatible = "edt,etm043080dh6gp",
4030 .data = &edt_etm043080dh6gp,
4031 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00004032 .compatible = "edt,etm0430g0dh6",
4033 .data = &edt_etm0430g0dh6,
4034 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004035 .compatible = "edt,et057090dhu",
4036 .data = &edt_et057090dhu,
4037 }, {
4038 .compatible = "edt,et070080dh6",
4039 .data = &edt_etm0700g0dh6,
4040 }, {
4041 .compatible = "edt,etm0700g0dh6",
4042 .data = &edt_etm0700g0dh6,
4043 }, {
4044 .compatible = "edt,etm0700g0bdh6",
4045 .data = &edt_etm0700g0bdh6,
4046 }, {
4047 .compatible = "edt,etm0700g0edh6",
4048 .data = &edt_etm0700g0bdh6,
4049 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00004050 .compatible = "evervision,vgg804821",
4051 .data = &evervision_vgg804821,
4052 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004053 .compatible = "foxlink,fl500wvr00-a0t",
4054 .data = &foxlink_fl500wvr00_a0t,
4055 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02004056 .compatible = "frida,frd350h54004",
4057 .data = &frida_frd350h54004,
4058 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00004059 .compatible = "friendlyarm,hd702e",
4060 .data = &friendlyarm_hd702e,
4061 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004062 .compatible = "giantplus,gpg482739qs5",
4063 .data = &giantplus_gpg482739qs5
4064 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00004065 .compatible = "giantplus,gpm940b0",
4066 .data = &giantplus_gpm940b0,
4067 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004068 .compatible = "hannstar,hsd070pww1",
4069 .data = &hannstar_hsd070pww1,
4070 }, {
4071 .compatible = "hannstar,hsd100pxn1",
4072 .data = &hannstar_hsd100pxn1,
4073 }, {
4074 .compatible = "hit,tx23d38vm0caa",
4075 .data = &hitachi_tx23d38vm0caa
4076 }, {
4077 .compatible = "innolux,at043tn24",
4078 .data = &innolux_at043tn24,
4079 }, {
4080 .compatible = "innolux,at070tn92",
4081 .data = &innolux_at070tn92,
4082 }, {
4083 .compatible = "innolux,g070y2-l01",
4084 .data = &innolux_g070y2_l01,
4085 }, {
4086 .compatible = "innolux,g101ice-l01",
4087 .data = &innolux_g101ice_l01
4088 }, {
4089 .compatible = "innolux,g121i1-l01",
4090 .data = &innolux_g121i1_l01
4091 }, {
4092 .compatible = "innolux,g121x1-l03",
4093 .data = &innolux_g121x1_l03,
4094 }, {
4095 .compatible = "innolux,n116bge",
4096 .data = &innolux_n116bge,
4097 }, {
4098 .compatible = "innolux,n156bge-l21",
4099 .data = &innolux_n156bge_l21,
4100 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00004101 .compatible = "innolux,p120zdg-bf1",
4102 .data = &innolux_p120zdg_bf1,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004103 }, {
4104 .compatible = "innolux,zj070na-01p",
4105 .data = &innolux_zj070na_01p,
4106 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02004107 .compatible = "ivo,m133nwf4-r0",
4108 .data = &ivo_m133nwf4_r0,
4109 }, {
4110 .compatible = "kingdisplay,kd116n21-30nv-a010",
4111 .data = &kingdisplay_kd116n21_30nv_a010,
4112 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00004113 .compatible = "koe,tx14d24vm1bpa",
4114 .data = &koe_tx14d24vm1bpa,
4115 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02004116 .compatible = "koe,tx26d202vm0bwa",
4117 .data = &koe_tx26d202vm0bwa,
4118 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004119 .compatible = "koe,tx31d200vm0baa",
4120 .data = &koe_tx31d200vm0baa,
4121 }, {
4122 .compatible = "kyo,tcg121xglp",
4123 .data = &kyo_tcg121xglp,
4124 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00004125 .compatible = "lemaker,bl035-rgb-002",
4126 .data = &lemaker_bl035_rgb_002,
4127 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004128 .compatible = "lg,lb070wv8",
4129 .data = &lg_lb070wv8,
4130 }, {
4131 .compatible = "lg,lp079qx1-sp0v",
4132 .data = &lg_lp079qx1_sp0v,
4133 }, {
4134 .compatible = "lg,lp097qx1-spa1",
4135 .data = &lg_lp097qx1_spa1,
4136 }, {
4137 .compatible = "lg,lp120up1",
4138 .data = &lg_lp120up1,
4139 }, {
4140 .compatible = "lg,lp129qe",
4141 .data = &lg_lp129qe,
4142 }, {
Olivier Deprez0e641232021-09-23 10:07:05 +02004143 .compatible = "logicpd,type28",
4144 .data = &logicpd_type_28,
4145 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02004146 .compatible = "logictechno,lt161010-2nhc",
4147 .data = &logictechno_lt161010_2nh,
4148 }, {
4149 .compatible = "logictechno,lt161010-2nhr",
4150 .data = &logictechno_lt161010_2nh,
4151 }, {
4152 .compatible = "logictechno,lt170410-2whc",
4153 .data = &logictechno_lt170410_2whc,
4154 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004155 .compatible = "mitsubishi,aa070mc01-ca1",
4156 .data = &mitsubishi_aa070mc01,
4157 }, {
4158 .compatible = "nec,nl12880bc20-05",
4159 .data = &nec_nl12880bc20_05,
4160 }, {
4161 .compatible = "nec,nl4827hc19-05b",
4162 .data = &nec_nl4827hc19_05b,
4163 }, {
4164 .compatible = "netron-dy,e231732",
4165 .data = &netron_dy_e231732,
4166 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02004167 .compatible = "neweast,wjfh116008a",
4168 .data = &neweast_wjfh116008a,
4169 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004170 .compatible = "newhaven,nhd-4.3-480272ef-atxl",
4171 .data = &newhaven_nhd_43_480272ef_atxl,
4172 }, {
4173 .compatible = "nlt,nl192108ac18-02d",
4174 .data = &nlt_nl192108ac18_02d,
4175 }, {
4176 .compatible = "nvd,9128",
4177 .data = &nvd_9128,
4178 }, {
4179 .compatible = "okaya,rs800480t-7x0gp",
4180 .data = &okaya_rs800480t_7x0gp,
4181 }, {
4182 .compatible = "olimex,lcd-olinuxino-43-ts",
4183 .data = &olimex_lcd_olinuxino_43ts,
4184 }, {
4185 .compatible = "ontat,yx700wv03",
4186 .data = &ontat_yx700wv03,
4187 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00004188 .compatible = "ortustech,com37h3m05dtc",
4189 .data = &ortustech_com37h3m,
4190 }, {
4191 .compatible = "ortustech,com37h3m99dtc",
4192 .data = &ortustech_com37h3m,
4193 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004194 .compatible = "ortustech,com43h4m85ulc",
4195 .data = &ortustech_com43h4m85ulc,
4196 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00004197 .compatible = "osddisplays,osd070t1718-19ts",
4198 .data = &osddisplays_osd070t1718_19ts,
4199 }, {
4200 .compatible = "pda,91-00156-a0",
4201 .data = &pda_91_00156_a0,
4202 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02004203 .compatible = "powertip,ph800480t013-idf02",
4204 .data = &powertip_ph800480t013_idf02,
4205 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004206 .compatible = "qiaodian,qd43003c0-40",
4207 .data = &qd43003c0_40,
4208 }, {
4209 .compatible = "rocktech,rk070er9427",
4210 .data = &rocktech_rk070er9427,
4211 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02004212 .compatible = "rocktech,rk101ii01d-ct",
4213 .data = &rocktech_rk101ii01d_ct,
4214 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004215 .compatible = "samsung,lsn122dl01-c01",
4216 .data = &samsung_lsn122dl01_c01,
4217 }, {
4218 .compatible = "samsung,ltn101nt05",
4219 .data = &samsung_ltn101nt05,
4220 }, {
4221 .compatible = "samsung,ltn140at29-301",
4222 .data = &samsung_ltn140at29_301,
4223 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02004224 .compatible = "satoz,sat050at40h12r2",
4225 .data = &satoz_sat050at40h12r2,
4226 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00004227 .compatible = "sharp,ld-d5116z01b",
4228 .data = &sharp_ld_d5116z01b,
4229 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004230 .compatible = "sharp,lq035q7db03",
4231 .data = &sharp_lq035q7db03,
4232 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00004233 .compatible = "sharp,lq070y3dg3b",
4234 .data = &sharp_lq070y3dg3b,
4235 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004236 .compatible = "sharp,lq101k1ly04",
4237 .data = &sharp_lq101k1ly04,
4238 }, {
4239 .compatible = "sharp,lq123p1jx31",
4240 .data = &sharp_lq123p1jx31,
4241 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00004242 .compatible = "sharp,ls020b1dd01d",
4243 .data = &sharp_ls020b1dd01d,
4244 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004245 .compatible = "shelly,sca07010-bfn-lnn",
4246 .data = &shelly_sca07010_bfn_lnn,
4247 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02004248 .compatible = "starry,kr070pe2t",
4249 .data = &starry_kr070pe2t,
4250 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004251 .compatible = "starry,kr122ea0sra",
4252 .data = &starry_kr122ea0sra,
4253 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00004254 .compatible = "tfc,s9700rtwv43tr-01b",
4255 .data = &tfc_s9700rtwv43tr_01b,
4256 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004257 .compatible = "tianma,tm070jdhg30",
4258 .data = &tianma_tm070jdhg30,
4259 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02004260 .compatible = "tianma,tm070jvhg33",
4261 .data = &tianma_tm070jvhg33,
4262 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004263 .compatible = "tianma,tm070rvhg71",
4264 .data = &tianma_tm070rvhg71,
4265 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00004266 .compatible = "ti,nspire-cx-lcd-panel",
4267 .data = &ti_nspire_cx_lcd_panel,
4268 }, {
4269 .compatible = "ti,nspire-classic-lcd-panel",
4270 .data = &ti_nspire_classic_lcd_panel,
4271 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004272 .compatible = "toshiba,lt089ac29000",
4273 .data = &toshiba_lt089ac29000,
4274 }, {
4275 .compatible = "tpk,f07a-0102",
4276 .data = &tpk_f07a_0102,
4277 }, {
4278 .compatible = "tpk,f10a-0102",
4279 .data = &tpk_f10a_0102,
4280 }, {
4281 .compatible = "urt,umsh-8596md-t",
4282 .data = &urt_umsh_8596md_parallel,
4283 }, {
4284 .compatible = "urt,umsh-8596md-1t",
4285 .data = &urt_umsh_8596md_parallel,
4286 }, {
4287 .compatible = "urt,umsh-8596md-7t",
4288 .data = &urt_umsh_8596md_parallel,
4289 }, {
4290 .compatible = "urt,umsh-8596md-11t",
4291 .data = &urt_umsh_8596md_lvds,
4292 }, {
4293 .compatible = "urt,umsh-8596md-19t",
4294 .data = &urt_umsh_8596md_lvds,
4295 }, {
4296 .compatible = "urt,umsh-8596md-20t",
4297 .data = &urt_umsh_8596md_parallel,
4298 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00004299 .compatible = "vxt,vl050-8048nt-c01",
4300 .data = &vl050_8048nt_c01,
4301 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004302 .compatible = "winstar,wf35ltiacd",
4303 .data = &winstar_wf35ltiacd,
4304 }, {
Olivier Deprez157378f2022-04-04 15:47:50 +02004305 /* Must be the last entry */
4306 .compatible = "panel-dpi",
4307 .data = &panel_dpi,
4308 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004309 /* sentinel */
4310 }
4311};
4312MODULE_DEVICE_TABLE(of, platform_of_match);
4313
4314static int panel_simple_platform_probe(struct platform_device *pdev)
4315{
4316 const struct of_device_id *id;
4317
4318 id = of_match_node(platform_of_match, pdev->dev.of_node);
4319 if (!id)
4320 return -ENODEV;
4321
4322 return panel_simple_probe(&pdev->dev, id->data);
4323}
4324
4325static int panel_simple_platform_remove(struct platform_device *pdev)
4326{
4327 return panel_simple_remove(&pdev->dev);
4328}
4329
4330static void panel_simple_platform_shutdown(struct platform_device *pdev)
4331{
4332 panel_simple_shutdown(&pdev->dev);
4333}
4334
4335static struct platform_driver panel_simple_platform_driver = {
4336 .driver = {
4337 .name = "panel-simple",
4338 .of_match_table = platform_of_match,
4339 },
4340 .probe = panel_simple_platform_probe,
4341 .remove = panel_simple_platform_remove,
4342 .shutdown = panel_simple_platform_shutdown,
4343};
4344
4345struct panel_desc_dsi {
4346 struct panel_desc desc;
4347
4348 unsigned long flags;
4349 enum mipi_dsi_pixel_format format;
4350 unsigned int lanes;
4351};
4352
4353static const struct drm_display_mode auo_b080uan01_mode = {
4354 .clock = 154500,
4355 .hdisplay = 1200,
4356 .hsync_start = 1200 + 62,
4357 .hsync_end = 1200 + 62 + 4,
4358 .htotal = 1200 + 62 + 4 + 62,
4359 .vdisplay = 1920,
4360 .vsync_start = 1920 + 9,
4361 .vsync_end = 1920 + 9 + 2,
4362 .vtotal = 1920 + 9 + 2 + 8,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004363};
4364
4365static const struct panel_desc_dsi auo_b080uan01 = {
4366 .desc = {
4367 .modes = &auo_b080uan01_mode,
4368 .num_modes = 1,
4369 .bpc = 8,
4370 .size = {
4371 .width = 108,
4372 .height = 272,
4373 },
Olivier Deprez157378f2022-04-04 15:47:50 +02004374 .connector_type = DRM_MODE_CONNECTOR_DSI,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004375 },
4376 .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS,
4377 .format = MIPI_DSI_FMT_RGB888,
4378 .lanes = 4,
4379};
4380
4381static const struct drm_display_mode boe_tv080wum_nl0_mode = {
4382 .clock = 160000,
4383 .hdisplay = 1200,
4384 .hsync_start = 1200 + 120,
4385 .hsync_end = 1200 + 120 + 20,
4386 .htotal = 1200 + 120 + 20 + 21,
4387 .vdisplay = 1920,
4388 .vsync_start = 1920 + 21,
4389 .vsync_end = 1920 + 21 + 3,
4390 .vtotal = 1920 + 21 + 3 + 18,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004391 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
4392};
4393
4394static const struct panel_desc_dsi boe_tv080wum_nl0 = {
4395 .desc = {
4396 .modes = &boe_tv080wum_nl0_mode,
4397 .num_modes = 1,
4398 .size = {
4399 .width = 107,
4400 .height = 172,
4401 },
Olivier Deprez157378f2022-04-04 15:47:50 +02004402 .connector_type = DRM_MODE_CONNECTOR_DSI,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004403 },
4404 .flags = MIPI_DSI_MODE_VIDEO |
4405 MIPI_DSI_MODE_VIDEO_BURST |
4406 MIPI_DSI_MODE_VIDEO_SYNC_PULSE,
4407 .format = MIPI_DSI_FMT_RGB888,
4408 .lanes = 4,
4409};
4410
4411static const struct drm_display_mode lg_ld070wx3_sl01_mode = {
4412 .clock = 71000,
4413 .hdisplay = 800,
4414 .hsync_start = 800 + 32,
4415 .hsync_end = 800 + 32 + 1,
4416 .htotal = 800 + 32 + 1 + 57,
4417 .vdisplay = 1280,
4418 .vsync_start = 1280 + 28,
4419 .vsync_end = 1280 + 28 + 1,
4420 .vtotal = 1280 + 28 + 1 + 14,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004421};
4422
4423static const struct panel_desc_dsi lg_ld070wx3_sl01 = {
4424 .desc = {
4425 .modes = &lg_ld070wx3_sl01_mode,
4426 .num_modes = 1,
4427 .bpc = 8,
4428 .size = {
4429 .width = 94,
4430 .height = 151,
4431 },
Olivier Deprez157378f2022-04-04 15:47:50 +02004432 .connector_type = DRM_MODE_CONNECTOR_DSI,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004433 },
4434 .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS,
4435 .format = MIPI_DSI_FMT_RGB888,
4436 .lanes = 4,
4437};
4438
4439static const struct drm_display_mode lg_lh500wx1_sd03_mode = {
4440 .clock = 67000,
4441 .hdisplay = 720,
4442 .hsync_start = 720 + 12,
4443 .hsync_end = 720 + 12 + 4,
4444 .htotal = 720 + 12 + 4 + 112,
4445 .vdisplay = 1280,
4446 .vsync_start = 1280 + 8,
4447 .vsync_end = 1280 + 8 + 4,
4448 .vtotal = 1280 + 8 + 4 + 12,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004449};
4450
4451static const struct panel_desc_dsi lg_lh500wx1_sd03 = {
4452 .desc = {
4453 .modes = &lg_lh500wx1_sd03_mode,
4454 .num_modes = 1,
4455 .bpc = 8,
4456 .size = {
4457 .width = 62,
4458 .height = 110,
4459 },
Olivier Deprez157378f2022-04-04 15:47:50 +02004460 .connector_type = DRM_MODE_CONNECTOR_DSI,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004461 },
4462 .flags = MIPI_DSI_MODE_VIDEO,
4463 .format = MIPI_DSI_FMT_RGB888,
4464 .lanes = 4,
4465};
4466
4467static const struct drm_display_mode panasonic_vvx10f004b00_mode = {
4468 .clock = 157200,
4469 .hdisplay = 1920,
4470 .hsync_start = 1920 + 154,
4471 .hsync_end = 1920 + 154 + 16,
4472 .htotal = 1920 + 154 + 16 + 32,
4473 .vdisplay = 1200,
4474 .vsync_start = 1200 + 17,
4475 .vsync_end = 1200 + 17 + 2,
4476 .vtotal = 1200 + 17 + 2 + 16,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004477};
4478
4479static const struct panel_desc_dsi panasonic_vvx10f004b00 = {
4480 .desc = {
4481 .modes = &panasonic_vvx10f004b00_mode,
4482 .num_modes = 1,
4483 .bpc = 8,
4484 .size = {
4485 .width = 217,
4486 .height = 136,
4487 },
Olivier Deprez157378f2022-04-04 15:47:50 +02004488 .connector_type = DRM_MODE_CONNECTOR_DSI,
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004489 },
4490 .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
4491 MIPI_DSI_CLOCK_NON_CONTINUOUS,
4492 .format = MIPI_DSI_FMT_RGB888,
4493 .lanes = 4,
4494};
4495
David Brazdil0f672f62019-12-10 10:32:29 +00004496static const struct drm_display_mode lg_acx467akm_7_mode = {
4497 .clock = 150000,
4498 .hdisplay = 1080,
4499 .hsync_start = 1080 + 2,
4500 .hsync_end = 1080 + 2 + 2,
4501 .htotal = 1080 + 2 + 2 + 2,
4502 .vdisplay = 1920,
4503 .vsync_start = 1920 + 2,
4504 .vsync_end = 1920 + 2 + 2,
4505 .vtotal = 1920 + 2 + 2 + 2,
David Brazdil0f672f62019-12-10 10:32:29 +00004506};
4507
4508static const struct panel_desc_dsi lg_acx467akm_7 = {
4509 .desc = {
4510 .modes = &lg_acx467akm_7_mode,
4511 .num_modes = 1,
4512 .bpc = 8,
4513 .size = {
4514 .width = 62,
4515 .height = 110,
4516 },
Olivier Deprez157378f2022-04-04 15:47:50 +02004517 .connector_type = DRM_MODE_CONNECTOR_DSI,
David Brazdil0f672f62019-12-10 10:32:29 +00004518 },
4519 .flags = 0,
4520 .format = MIPI_DSI_FMT_RGB888,
4521 .lanes = 4,
4522};
4523
4524static const struct drm_display_mode osd101t2045_53ts_mode = {
4525 .clock = 154500,
4526 .hdisplay = 1920,
4527 .hsync_start = 1920 + 112,
4528 .hsync_end = 1920 + 112 + 16,
4529 .htotal = 1920 + 112 + 16 + 32,
4530 .vdisplay = 1200,
4531 .vsync_start = 1200 + 16,
4532 .vsync_end = 1200 + 16 + 2,
4533 .vtotal = 1200 + 16 + 2 + 16,
David Brazdil0f672f62019-12-10 10:32:29 +00004534 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
4535};
4536
4537static const struct panel_desc_dsi osd101t2045_53ts = {
4538 .desc = {
4539 .modes = &osd101t2045_53ts_mode,
4540 .num_modes = 1,
4541 .bpc = 8,
4542 .size = {
4543 .width = 217,
4544 .height = 136,
4545 },
Olivier Deprez157378f2022-04-04 15:47:50 +02004546 .connector_type = DRM_MODE_CONNECTOR_DSI,
David Brazdil0f672f62019-12-10 10:32:29 +00004547 },
4548 .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
4549 MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
4550 MIPI_DSI_MODE_EOT_PACKET,
4551 .format = MIPI_DSI_FMT_RGB888,
4552 .lanes = 4,
4553};
4554
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004555static const struct of_device_id dsi_of_match[] = {
4556 {
4557 .compatible = "auo,b080uan01",
4558 .data = &auo_b080uan01
4559 }, {
4560 .compatible = "boe,tv080wum-nl0",
4561 .data = &boe_tv080wum_nl0
4562 }, {
4563 .compatible = "lg,ld070wx3-sl01",
4564 .data = &lg_ld070wx3_sl01
4565 }, {
4566 .compatible = "lg,lh500wx1-sd03",
4567 .data = &lg_lh500wx1_sd03
4568 }, {
4569 .compatible = "panasonic,vvx10f004b00",
4570 .data = &panasonic_vvx10f004b00
4571 }, {
David Brazdil0f672f62019-12-10 10:32:29 +00004572 .compatible = "lg,acx467akm-7",
4573 .data = &lg_acx467akm_7
4574 }, {
4575 .compatible = "osddisplays,osd101t2045-53ts",
4576 .data = &osd101t2045_53ts
4577 }, {
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004578 /* sentinel */
4579 }
4580};
4581MODULE_DEVICE_TABLE(of, dsi_of_match);
4582
4583static int panel_simple_dsi_probe(struct mipi_dsi_device *dsi)
4584{
4585 const struct panel_desc_dsi *desc;
4586 const struct of_device_id *id;
4587 int err;
4588
4589 id = of_match_node(dsi_of_match, dsi->dev.of_node);
4590 if (!id)
4591 return -ENODEV;
4592
4593 desc = id->data;
4594
4595 err = panel_simple_probe(&dsi->dev, &desc->desc);
4596 if (err < 0)
4597 return err;
4598
4599 dsi->mode_flags = desc->flags;
4600 dsi->format = desc->format;
4601 dsi->lanes = desc->lanes;
4602
David Brazdil0f672f62019-12-10 10:32:29 +00004603 err = mipi_dsi_attach(dsi);
4604 if (err) {
4605 struct panel_simple *panel = dev_get_drvdata(&dsi->dev);
4606
4607 drm_panel_remove(&panel->base);
4608 }
4609
4610 return err;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004611}
4612
4613static int panel_simple_dsi_remove(struct mipi_dsi_device *dsi)
4614{
4615 int err;
4616
4617 err = mipi_dsi_detach(dsi);
4618 if (err < 0)
4619 dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", err);
4620
4621 return panel_simple_remove(&dsi->dev);
4622}
4623
4624static void panel_simple_dsi_shutdown(struct mipi_dsi_device *dsi)
4625{
4626 panel_simple_shutdown(&dsi->dev);
4627}
4628
4629static struct mipi_dsi_driver panel_simple_dsi_driver = {
4630 .driver = {
4631 .name = "panel-simple-dsi",
4632 .of_match_table = dsi_of_match,
4633 },
4634 .probe = panel_simple_dsi_probe,
4635 .remove = panel_simple_dsi_remove,
4636 .shutdown = panel_simple_dsi_shutdown,
4637};
4638
4639static int __init panel_simple_init(void)
4640{
4641 int err;
4642
4643 err = platform_driver_register(&panel_simple_platform_driver);
4644 if (err < 0)
4645 return err;
4646
4647 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI)) {
4648 err = mipi_dsi_driver_register(&panel_simple_dsi_driver);
4649 if (err < 0)
4650 return err;
4651 }
4652
4653 return 0;
4654}
4655module_init(panel_simple_init);
4656
4657static void __exit panel_simple_exit(void)
4658{
4659 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI))
4660 mipi_dsi_driver_unregister(&panel_simple_dsi_driver);
4661
4662 platform_driver_unregister(&panel_simple_platform_driver);
4663}
4664module_exit(panel_simple_exit);
4665
4666MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
4667MODULE_DESCRIPTION("DRM Driver for Simple Panels");
4668MODULE_LICENSE("GPL and additional rights");