| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | #ifndef _ASM_X86_SPARSEMEM_H |
| 3 | #define _ASM_X86_SPARSEMEM_H |
| 4 | |
| 5 | #ifdef CONFIG_SPARSEMEM |
| 6 | /* |
| 7 | * generic non-linear memory support: |
| 8 | * |
| 9 | * 1) we will not split memory into more chunks than will fit into the flags |
| 10 | * field of the struct page |
| 11 | * |
| 12 | * SECTION_SIZE_BITS 2^n: size of each section |
| Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 13 | * MAX_PHYSMEM_BITS 2^n: max size of physical address space |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 14 | * |
| 15 | */ |
| 16 | |
| 17 | #ifdef CONFIG_X86_32 |
| 18 | # ifdef CONFIG_X86_PAE |
| 19 | # define SECTION_SIZE_BITS 29 |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 20 | # define MAX_PHYSMEM_BITS 36 |
| 21 | # else |
| 22 | # define SECTION_SIZE_BITS 26 |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 23 | # define MAX_PHYSMEM_BITS 32 |
| 24 | # endif |
| 25 | #else /* CONFIG_X86_32 */ |
| 26 | # define SECTION_SIZE_BITS 27 /* matt - 128 is convenient right now */ |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 27 | # define MAX_PHYSMEM_BITS (pgtable_l5_enabled() ? 52 : 46) |
| 28 | #endif |
| 29 | |
| 30 | #endif /* CONFIG_SPARSEMEM */ |
| Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 31 | |
| 32 | #ifndef __ASSEMBLY__ |
| 33 | #ifdef CONFIG_NUMA_KEEP_MEMINFO |
| 34 | extern int phys_to_target_node(phys_addr_t start); |
| 35 | #define phys_to_target_node phys_to_target_node |
| 36 | extern int memory_add_physaddr_to_nid(u64 start); |
| 37 | #define memory_add_physaddr_to_nid memory_add_physaddr_to_nid |
| 38 | #endif |
| 39 | #endif /* __ASSEMBLY__ */ |
| 40 | |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 41 | #endif /* _ASM_X86_SPARSEMEM_H */ |