| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | #ifndef _ASM_X86_CACHEFLUSH_H |
| 3 | #define _ASM_X86_CACHEFLUSH_H |
| 4 | |
| Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 5 | #include <linux/mm.h> |
| 6 | |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 7 | /* Caches aren't brain-dead on the intel. */ |
| 8 | #include <asm-generic/cacheflush.h> |
| 9 | #include <asm/special_insns.h> |
| 10 | |
| 11 | void clflush_cache_range(void *addr, unsigned int size); |
| 12 | |
| 13 | #endif /* _ASM_X86_CACHEFLUSH_H */ |