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Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * S390 version
4 * Copyright IBM Corp. 1999, 2017
5 */
6#ifndef _ASM_S390_SETUP_H
7#define _ASM_S390_SETUP_H
8
David Brazdil0f672f62019-12-10 10:32:29 +00009#include <linux/bits.h>
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000010#include <uapi/asm/setup.h>
Olivier Deprez0e641232021-09-23 10:07:05 +020011#include <linux/build_bug.h>
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000012
13#define EP_OFFSET 0x10008
14#define EP_STRING "S390EP"
15#define PARMAREA 0x10400
David Brazdil0f672f62019-12-10 10:32:29 +000016#define EARLY_SCCB_OFFSET 0x11000
17#define HEAD_END 0x12000
18
19#define EARLY_SCCB_SIZE PAGE_SIZE
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000020
21/*
22 * Machine features detected in early.c
23 */
24
David Brazdil0f672f62019-12-10 10:32:29 +000025#define MACHINE_FLAG_VM BIT(0)
26#define MACHINE_FLAG_KVM BIT(1)
27#define MACHINE_FLAG_LPAR BIT(2)
28#define MACHINE_FLAG_DIAG9C BIT(3)
29#define MACHINE_FLAG_ESOP BIT(4)
30#define MACHINE_FLAG_IDTE BIT(5)
David Brazdil0f672f62019-12-10 10:32:29 +000031#define MACHINE_FLAG_EDAT1 BIT(7)
32#define MACHINE_FLAG_EDAT2 BIT(8)
33#define MACHINE_FLAG_TOPOLOGY BIT(10)
34#define MACHINE_FLAG_TE BIT(11)
35#define MACHINE_FLAG_TLB_LC BIT(12)
36#define MACHINE_FLAG_VX BIT(13)
37#define MACHINE_FLAG_TLB_GUEST BIT(14)
38#define MACHINE_FLAG_NX BIT(15)
39#define MACHINE_FLAG_GS BIT(16)
40#define MACHINE_FLAG_SCC BIT(17)
Olivier Deprez0e641232021-09-23 10:07:05 +020041#define MACHINE_FLAG_PCI_MIO BIT(18)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000042
David Brazdil0f672f62019-12-10 10:32:29 +000043#define LPP_MAGIC BIT(31)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000044#define LPP_PID_MASK _AC(0xffffffff, UL)
45
46/* Offsets to entry points in kernel/head.S */
47
48#define STARTUP_NORMAL_OFFSET 0x10000
49#define STARTUP_KDUMP_OFFSET 0x10010
50
51/* Offsets to parameters in kernel/head.S */
52
53#define IPL_DEVICE_OFFSET 0x10400
54#define INITRD_START_OFFSET 0x10408
55#define INITRD_SIZE_OFFSET 0x10410
56#define OLDMEM_BASE_OFFSET 0x10418
57#define OLDMEM_SIZE_OFFSET 0x10420
David Brazdil0f672f62019-12-10 10:32:29 +000058#define KERNEL_VERSION_OFFSET 0x10428
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000059#define COMMAND_LINE_OFFSET 0x10480
60
61#ifndef __ASSEMBLY__
62
63#include <asm/lowcore.h>
64#include <asm/types.h>
65
66#define IPL_DEVICE (*(unsigned long *) (IPL_DEVICE_OFFSET))
67#define INITRD_START (*(unsigned long *) (INITRD_START_OFFSET))
68#define INITRD_SIZE (*(unsigned long *) (INITRD_SIZE_OFFSET))
69#define OLDMEM_BASE (*(unsigned long *) (OLDMEM_BASE_OFFSET))
70#define OLDMEM_SIZE (*(unsigned long *) (OLDMEM_SIZE_OFFSET))
71#define COMMAND_LINE ((char *) (COMMAND_LINE_OFFSET))
72
David Brazdil0f672f62019-12-10 10:32:29 +000073struct parmarea {
74 unsigned long ipl_device; /* 0x10400 */
75 unsigned long initrd_start; /* 0x10408 */
76 unsigned long initrd_size; /* 0x10410 */
77 unsigned long oldmem_base; /* 0x10418 */
78 unsigned long oldmem_size; /* 0x10420 */
79 unsigned long kernel_version; /* 0x10428 */
80 char pad1[0x10480 - 0x10430]; /* 0x10430 - 0x10480 */
81 char command_line[ARCH_COMMAND_LINE_SIZE]; /* 0x10480 */
82};
83
Olivier Deprez157378f2022-04-04 15:47:50 +020084extern unsigned int zlib_dfltcc_support;
85#define ZLIB_DFLTCC_DISABLED 0
86#define ZLIB_DFLTCC_FULL 1
87#define ZLIB_DFLTCC_DEFLATE_ONLY 2
88#define ZLIB_DFLTCC_INFLATE_ONLY 3
89#define ZLIB_DFLTCC_FULL_DEBUG 4
90
David Brazdil0f672f62019-12-10 10:32:29 +000091extern int noexec_disabled;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000092extern int memory_end_set;
93extern unsigned long memory_end;
David Brazdil0f672f62019-12-10 10:32:29 +000094extern unsigned long vmalloc_size;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000095extern unsigned long max_physmem_end;
Olivier Deprez157378f2022-04-04 15:47:50 +020096
97/* The Write Back bit position in the physaddr is given by the SLPC PCI */
98extern unsigned long mio_wb_bit_mask;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000099
100#define MACHINE_IS_VM (S390_lowcore.machine_flags & MACHINE_FLAG_VM)
101#define MACHINE_IS_KVM (S390_lowcore.machine_flags & MACHINE_FLAG_KVM)
102#define MACHINE_IS_LPAR (S390_lowcore.machine_flags & MACHINE_FLAG_LPAR)
103
104#define MACHINE_HAS_DIAG9C (S390_lowcore.machine_flags & MACHINE_FLAG_DIAG9C)
105#define MACHINE_HAS_ESOP (S390_lowcore.machine_flags & MACHINE_FLAG_ESOP)
106#define MACHINE_HAS_IDTE (S390_lowcore.machine_flags & MACHINE_FLAG_IDTE)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000107#define MACHINE_HAS_EDAT1 (S390_lowcore.machine_flags & MACHINE_FLAG_EDAT1)
108#define MACHINE_HAS_EDAT2 (S390_lowcore.machine_flags & MACHINE_FLAG_EDAT2)
109#define MACHINE_HAS_TOPOLOGY (S390_lowcore.machine_flags & MACHINE_FLAG_TOPOLOGY)
110#define MACHINE_HAS_TE (S390_lowcore.machine_flags & MACHINE_FLAG_TE)
111#define MACHINE_HAS_TLB_LC (S390_lowcore.machine_flags & MACHINE_FLAG_TLB_LC)
112#define MACHINE_HAS_VX (S390_lowcore.machine_flags & MACHINE_FLAG_VX)
113#define MACHINE_HAS_TLB_GUEST (S390_lowcore.machine_flags & MACHINE_FLAG_TLB_GUEST)
114#define MACHINE_HAS_NX (S390_lowcore.machine_flags & MACHINE_FLAG_NX)
115#define MACHINE_HAS_GS (S390_lowcore.machine_flags & MACHINE_FLAG_GS)
116#define MACHINE_HAS_SCC (S390_lowcore.machine_flags & MACHINE_FLAG_SCC)
Olivier Deprez0e641232021-09-23 10:07:05 +0200117#define MACHINE_HAS_PCI_MIO (S390_lowcore.machine_flags & MACHINE_FLAG_PCI_MIO)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000118
119/*
120 * Console mode. Override with conmode=
121 */
122extern unsigned int console_mode;
123extern unsigned int console_devno;
124extern unsigned int console_irq;
125
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000126#define CONSOLE_IS_UNDEFINED (console_mode == 0)
127#define CONSOLE_IS_SCLP (console_mode == 1)
128#define CONSOLE_IS_3215 (console_mode == 2)
129#define CONSOLE_IS_3270 (console_mode == 3)
130#define CONSOLE_IS_VT220 (console_mode == 4)
131#define CONSOLE_IS_HVC (console_mode == 5)
132#define SET_CONSOLE_SCLP do { console_mode = 1; } while (0)
133#define SET_CONSOLE_3215 do { console_mode = 2; } while (0)
134#define SET_CONSOLE_3270 do { console_mode = 3; } while (0)
135#define SET_CONSOLE_VT220 do { console_mode = 4; } while (0)
136#define SET_CONSOLE_HVC do { console_mode = 5; } while (0)
137
138#ifdef CONFIG_PFAULT
139extern int pfault_init(void);
140extern void pfault_fini(void);
141#else /* CONFIG_PFAULT */
142#define pfault_init() ({-1;})
143#define pfault_fini() do { } while (0)
144#endif /* CONFIG_PFAULT */
145
146#ifdef CONFIG_VMCP
147void vmcp_cma_reserve(void);
148#else
149static inline void vmcp_cma_reserve(void) { }
150#endif
151
152void report_user_fault(struct pt_regs *regs, long signr, int is_mm_fault);
153
154void cmma_init(void);
155void cmma_init_nodat(void);
156
157extern void (*_machine_restart)(char *command);
158extern void (*_machine_halt)(void);
159extern void (*_machine_power_off)(void);
160
David Brazdil0f672f62019-12-10 10:32:29 +0000161extern unsigned long __kaslr_offset;
162static inline unsigned long kaslr_offset(void)
163{
164 return __kaslr_offset;
165}
166
Olivier Deprez0e641232021-09-23 10:07:05 +0200167static inline u32 gen_lpswe(unsigned long addr)
168{
169 BUILD_BUG_ON(addr > 0xfff);
170 return 0xb2b20000 | addr;
171}
172
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000173#else /* __ASSEMBLY__ */
174
175#define IPL_DEVICE (IPL_DEVICE_OFFSET)
176#define INITRD_START (INITRD_START_OFFSET)
177#define INITRD_SIZE (INITRD_SIZE_OFFSET)
178#define OLDMEM_BASE (OLDMEM_BASE_OFFSET)
179#define OLDMEM_SIZE (OLDMEM_SIZE_OFFSET)
180#define COMMAND_LINE (COMMAND_LINE_OFFSET)
181
182#endif /* __ASSEMBLY__ */
183#endif /* _ASM_S390_SETUP_H */