David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Port on Texas Instruments TMS320C6x architecture |
| 4 | * |
| 5 | * Copyright (C) 2004, 2009, 2010 Texas Instruments Incorporated |
| 6 | * Author: Aurelien Jacquiot (aurelien.jacquiot@jaluna.com) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 7 | */ |
| 8 | #ifndef _ASM_C6X_PGTABLE_H |
| 9 | #define _ASM_C6X_PGTABLE_H |
| 10 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 11 | #include <asm-generic/pgtable-nopud.h> |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 12 | |
| 13 | #include <asm/setup.h> |
| 14 | #include <asm/page.h> |
| 15 | |
| 16 | /* |
| 17 | * All 32bit addresses are effectively valid for vmalloc... |
| 18 | * Sort of meaningless for non-VM targets. |
| 19 | */ |
| 20 | #define VMALLOC_START 0 |
| 21 | #define VMALLOC_END 0xffffffff |
| 22 | |
| 23 | #define pgd_present(pgd) (1) |
| 24 | #define pgd_none(pgd) (0) |
| 25 | #define pgd_bad(pgd) (0) |
| 26 | #define pgd_clear(pgdp) |
| 27 | #define kern_addr_valid(addr) (1) |
| 28 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 29 | #define pmd_none(x) (!pmd_val(x)) |
| 30 | #define pmd_present(x) (pmd_val(x)) |
| 31 | #define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0) |
| 32 | #define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK) |
| 33 | |
| 34 | #define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */ |
| 35 | #define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */ |
| 36 | #define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */ |
| 37 | #define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */ |
| 38 | #define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */ |
| 39 | #define pgprot_noncached(prot) (prot) |
| 40 | |
| 41 | extern void paging_init(void); |
| 42 | |
| 43 | #define __swp_type(x) (0) |
| 44 | #define __swp_offset(x) (0) |
| 45 | #define __swp_entry(typ, off) ((swp_entry_t) { ((typ) | ((off) << 7)) }) |
| 46 | #define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) }) |
| 47 | #define __swp_entry_to_pte(x) ((pte_t) { (x).val }) |
| 48 | |
| 49 | #define set_pte(pteptr, pteval) (*(pteptr) = pteval) |
| 50 | #define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval) |
| 51 | |
| 52 | /* |
| 53 | * ZERO_PAGE is a global shared page that is always zero: used |
| 54 | * for zero-mapped memory areas etc.. |
| 55 | */ |
| 56 | #define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page) |
| 57 | extern unsigned long empty_zero_page; |
| 58 | |
| 59 | #define swapper_pg_dir ((pgd_t *) 0) |
| 60 | |
| 61 | /* |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 62 | * c6x is !MMU, so define the simpliest implementation |
| 63 | */ |
| 64 | #define pgprot_writecombine pgprot_noncached |
| 65 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 66 | #endif /* _ASM_C6X_PGTABLE_H */ |