David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | #include <linux/ptrace.h> |
| 7 | #include <linux/module.h> |
| 8 | #include <linux/mm.h> |
| 9 | #include <linux/fs.h> |
| 10 | #include <linux/kdev_t.h> |
| 11 | #include <linux/proc_fs.h> |
| 12 | #include <linux/file.h> |
| 13 | #include <linux/sched/mm.h> |
| 14 | #include <linux/sched/debug.h> |
| 15 | |
| 16 | #include <asm/arcregs.h> |
| 17 | #include <asm/irqflags.h> |
| 18 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 19 | #define ARC_PATH_MAX 256 |
| 20 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 21 | static noinline void print_regs_scratch(struct pt_regs *regs) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 22 | { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 23 | pr_cont("BTA: 0x%08lx\n SP: 0x%08lx FP: 0x%08lx BLK: %pS\n", |
| 24 | regs->bta, regs->sp, regs->fp, (void *)regs->blink); |
| 25 | pr_cont("LPS: 0x%08lx\tLPE: 0x%08lx\tLPC: 0x%08lx\n", |
| 26 | regs->lp_start, regs->lp_end, regs->lp_count); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 27 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 28 | pr_info("r00: 0x%08lx\tr01: 0x%08lx\tr02: 0x%08lx\n" \ |
| 29 | "r03: 0x%08lx\tr04: 0x%08lx\tr05: 0x%08lx\n" \ |
| 30 | "r06: 0x%08lx\tr07: 0x%08lx\tr08: 0x%08lx\n" \ |
| 31 | "r09: 0x%08lx\tr10: 0x%08lx\tr11: 0x%08lx\n" \ |
| 32 | "r12: 0x%08lx\t", |
| 33 | regs->r0, regs->r1, regs->r2, |
| 34 | regs->r3, regs->r4, regs->r5, |
| 35 | regs->r6, regs->r7, regs->r8, |
| 36 | regs->r9, regs->r10, regs->r11, |
| 37 | regs->r12); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 38 | } |
| 39 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 40 | static void print_regs_callee(struct callee_regs *regs) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 41 | { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 42 | pr_cont("r13: 0x%08lx\tr14: 0x%08lx\n" \ |
| 43 | "r15: 0x%08lx\tr16: 0x%08lx\tr17: 0x%08lx\n" \ |
| 44 | "r18: 0x%08lx\tr19: 0x%08lx\tr20: 0x%08lx\n" \ |
| 45 | "r21: 0x%08lx\tr22: 0x%08lx\tr23: 0x%08lx\n" \ |
| 46 | "r24: 0x%08lx\tr25: 0x%08lx\n", |
| 47 | regs->r13, regs->r14, |
| 48 | regs->r15, regs->r16, regs->r17, |
| 49 | regs->r18, regs->r19, regs->r20, |
| 50 | regs->r21, regs->r22, regs->r23, |
| 51 | regs->r24, regs->r25); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 52 | } |
| 53 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 54 | static void print_task_path_n_nm(struct task_struct *tsk) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 55 | { |
| 56 | char *path_nm = NULL; |
| 57 | struct mm_struct *mm; |
| 58 | struct file *exe_file; |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 59 | char buf[ARC_PATH_MAX]; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 60 | |
| 61 | mm = get_task_mm(tsk); |
| 62 | if (!mm) |
| 63 | goto done; |
| 64 | |
| 65 | exe_file = get_mm_exe_file(mm); |
| 66 | mmput(mm); |
| 67 | |
| 68 | if (exe_file) { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 69 | path_nm = file_path(exe_file, buf, ARC_PATH_MAX-1); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 70 | fput(exe_file); |
| 71 | } |
| 72 | |
| 73 | done: |
| 74 | pr_info("Path: %s\n", !IS_ERR(path_nm) ? path_nm : "?"); |
| 75 | } |
| 76 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 77 | static void show_faulting_vma(unsigned long address) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 78 | { |
| 79 | struct vm_area_struct *vma; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 80 | struct mm_struct *active_mm = current->active_mm; |
| 81 | |
| 82 | /* can't use print_vma_addr() yet as it doesn't check for |
| 83 | * non-inclusive vma |
| 84 | */ |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 85 | mmap_read_lock(active_mm); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 86 | vma = find_vma(active_mm, address); |
| 87 | |
| 88 | /* check against the find_vma( ) behaviour which returns the next VMA |
| 89 | * if the container VMA is not found |
| 90 | */ |
| 91 | if (vma && (vma->vm_start <= address)) { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 92 | char buf[ARC_PATH_MAX]; |
| 93 | char *nm = "?"; |
| 94 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 95 | if (vma->vm_file) { |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 96 | nm = file_path(vma->vm_file, buf, ARC_PATH_MAX-1); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 97 | if (IS_ERR(nm)) |
| 98 | nm = "?"; |
| 99 | } |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 100 | pr_info(" @off 0x%lx in [%s] VMA: 0x%08lx to 0x%08lx\n", |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 101 | vma->vm_start < TASK_UNMAPPED_BASE ? |
| 102 | address : address - vma->vm_start, |
| 103 | nm, vma->vm_start, vma->vm_end); |
| 104 | } else |
| 105 | pr_info(" @No matching VMA found\n"); |
| 106 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 107 | mmap_read_unlock(active_mm); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 108 | } |
| 109 | |
| 110 | static void show_ecr_verbose(struct pt_regs *regs) |
| 111 | { |
| 112 | unsigned int vec, cause_code; |
| 113 | unsigned long address; |
| 114 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 115 | /* For Data fault, this is data address not instruction addr */ |
| 116 | address = current->thread.fault_address; |
| 117 | |
| 118 | vec = regs->ecr_vec; |
| 119 | cause_code = regs->ecr_cause; |
| 120 | |
| 121 | /* For DTLB Miss or ProtV, display the memory involved too */ |
| 122 | if (vec == ECR_V_DTLB_MISS) { |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 123 | pr_cont("Invalid %s @ 0x%08lx by insn @ %pS\n", |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 124 | (cause_code == 0x01) ? "Read" : |
| 125 | ((cause_code == 0x02) ? "Write" : "EX"), |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 126 | address, (void *)regs->ret); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 127 | } else if (vec == ECR_V_ITLB_MISS) { |
| 128 | pr_cont("Insn could not be fetched\n"); |
| 129 | } else if (vec == ECR_V_MACH_CHK) { |
| 130 | pr_cont("Machine Check (%s)\n", (cause_code == 0x0) ? |
| 131 | "Double Fault" : "Other Fatal Err"); |
| 132 | |
| 133 | } else if (vec == ECR_V_PROTV) { |
| 134 | if (cause_code == ECR_C_PROTV_INST_FETCH) |
| 135 | pr_cont("Execute from Non-exec Page\n"); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 136 | else if (cause_code == ECR_C_PROTV_MISALIG_DATA && |
| 137 | IS_ENABLED(CONFIG_ISA_ARCOMPACT)) |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 138 | pr_cont("Misaligned r/w from 0x%08lx\n", address); |
| 139 | else |
| 140 | pr_cont("%s access not allowed on page\n", |
| 141 | (cause_code == 0x01) ? "Read" : |
| 142 | ((cause_code == 0x02) ? "Write" : "EX")); |
| 143 | } else if (vec == ECR_V_INSN_ERR) { |
| 144 | pr_cont("Illegal Insn\n"); |
| 145 | #ifdef CONFIG_ISA_ARCV2 |
| 146 | } else if (vec == ECR_V_MEM_ERR) { |
| 147 | if (cause_code == 0x00) |
| 148 | pr_cont("Bus Error from Insn Mem\n"); |
| 149 | else if (cause_code == 0x10) |
| 150 | pr_cont("Bus Error from Data Mem\n"); |
| 151 | else |
| 152 | pr_cont("Bus Error, check PRM\n"); |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 153 | } else if (vec == ECR_V_MISALIGN) { |
| 154 | pr_cont("Misaligned r/w from 0x%08lx\n", address); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 155 | #endif |
| 156 | } else if (vec == ECR_V_TRAP) { |
| 157 | if (regs->ecr_param == 5) |
| 158 | pr_cont("gcc generated __builtin_trap\n"); |
| 159 | } else { |
| 160 | pr_cont("Check Programmer's Manual\n"); |
| 161 | } |
| 162 | } |
| 163 | |
| 164 | /************************************************************************ |
| 165 | * API called by rest of kernel |
| 166 | ***********************************************************************/ |
| 167 | |
| 168 | void show_regs(struct pt_regs *regs) |
| 169 | { |
| 170 | struct task_struct *tsk = current; |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 171 | struct callee_regs *cregs = (struct callee_regs *)tsk->thread.callee_reg; |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 172 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 173 | /* |
| 174 | * generic code calls us with preemption disabled, but some calls |
| 175 | * here could sleep, so re-enable to avoid lockdep splat |
| 176 | */ |
| 177 | preempt_enable(); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 178 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 179 | print_task_path_n_nm(tsk); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 180 | show_regs_print_info(KERN_INFO); |
| 181 | |
| 182 | show_ecr_verbose(regs); |
| 183 | |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 184 | if (user_mode(regs)) |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 185 | show_faulting_vma(regs->ret); /* faulting code, not data */ |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 186 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 187 | pr_info("ECR: 0x%08lx EFA: 0x%08lx ERET: 0x%08lx\nSTAT: 0x%08lx", |
| 188 | regs->event, current->thread.fault_address, regs->ret, |
| 189 | regs->status32); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 190 | |
| 191 | #define STS_BIT(r, bit) r->status32 & STATUS_##bit##_MASK ? #bit" " : "" |
| 192 | |
| 193 | #ifdef CONFIG_ISA_ARCOMPACT |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 194 | pr_cont(" [%2s%2s%2s%2s%2s%2s%2s]", |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 195 | (regs->status32 & STATUS_U_MASK) ? "U " : "K ", |
| 196 | STS_BIT(regs, DE), STS_BIT(regs, AE), |
| 197 | STS_BIT(regs, A2), STS_BIT(regs, A1), |
| 198 | STS_BIT(regs, E2), STS_BIT(regs, E1)); |
| 199 | #else |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 200 | pr_cont(" [%2s%2s%2s%2s] ", |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 201 | STS_BIT(regs, IE), |
| 202 | (regs->status32 & STATUS_U_MASK) ? "U " : "K ", |
| 203 | STS_BIT(regs, DE), STS_BIT(regs, AE)); |
| 204 | #endif |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 205 | |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 206 | print_regs_scratch(regs); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 207 | if (cregs) |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 208 | print_regs_callee(cregs); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 209 | |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame] | 210 | preempt_disable(); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 211 | } |
| 212 | |
| 213 | void show_kernel_fault_diag(const char *str, struct pt_regs *regs, |
| 214 | unsigned long address) |
| 215 | { |
| 216 | current->thread.fault_address = address; |
| 217 | |
| 218 | /* Show fault description */ |
| 219 | pr_info("\n%s\n", str); |
| 220 | |
| 221 | /* Caller and Callee regs */ |
| 222 | show_regs(regs); |
| 223 | |
| 224 | /* Show stack trace if this Fatality happened in kernel mode */ |
| 225 | if (!user_mode(regs)) |
Olivier Deprez | 157378f | 2022-04-04 15:47:50 +0200 | [diff] [blame^] | 226 | show_stacktrace(current, regs, KERN_DEFAULT); |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 227 | } |