blob: a3b11bc71dcb8636e8580d8701233860d0a1fb86 [file] [log] [blame]
David Brazdil0f672f62019-12-10 10:32:29 +00001// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018 NXP
4 * Author: Dong Aisheng <aisheng.dong@nxp.com>
5 *
6 * Implementation of the SCU IPC functions using MUs (client side).
7 *
8 */
9
10#include <linux/err.h>
11#include <linux/firmware/imx/types.h>
12#include <linux/firmware/imx/ipc.h>
13#include <linux/firmware/imx/sci.h>
14#include <linux/interrupt.h>
15#include <linux/irq.h>
16#include <linux/kernel.h>
17#include <linux/mailbox_client.h>
18#include <linux/module.h>
19#include <linux/mutex.h>
20#include <linux/of_platform.h>
21#include <linux/platform_device.h>
22
23#define SCU_MU_CHAN_NUM 8
24#define MAX_RX_TIMEOUT (msecs_to_jiffies(30))
25
26struct imx_sc_chan {
27 struct imx_sc_ipc *sc_ipc;
28
29 struct mbox_client cl;
30 struct mbox_chan *ch;
31 int idx;
Olivier Deprez0e641232021-09-23 10:07:05 +020032 struct completion tx_done;
David Brazdil0f672f62019-12-10 10:32:29 +000033};
34
35struct imx_sc_ipc {
36 /* SCU uses 4 Tx and 4 Rx channels */
37 struct imx_sc_chan chans[SCU_MU_CHAN_NUM];
38 struct device *dev;
39 struct mutex lock;
40 struct completion done;
Olivier Deprez0e641232021-09-23 10:07:05 +020041 bool fast_ipc;
David Brazdil0f672f62019-12-10 10:32:29 +000042
43 /* temporarily store the SCU msg */
44 u32 *msg;
45 u8 rx_size;
46 u8 count;
47};
48
49/*
50 * This type is used to indicate error response for most functions.
51 */
52enum imx_sc_error_codes {
53 IMX_SC_ERR_NONE = 0, /* Success */
54 IMX_SC_ERR_VERSION = 1, /* Incompatible API version */
55 IMX_SC_ERR_CONFIG = 2, /* Configuration error */
56 IMX_SC_ERR_PARM = 3, /* Bad parameter */
57 IMX_SC_ERR_NOACCESS = 4, /* Permission error (no access) */
58 IMX_SC_ERR_LOCKED = 5, /* Permission error (locked) */
59 IMX_SC_ERR_UNAVAILABLE = 6, /* Unavailable (out of resources) */
60 IMX_SC_ERR_NOTFOUND = 7, /* Not found */
61 IMX_SC_ERR_NOPOWER = 8, /* No power */
62 IMX_SC_ERR_IPC = 9, /* Generic IPC error */
63 IMX_SC_ERR_BUSY = 10, /* Resource is currently busy/active */
64 IMX_SC_ERR_FAIL = 11, /* General I/O failure */
65 IMX_SC_ERR_LAST
66};
67
68static int imx_sc_linux_errmap[IMX_SC_ERR_LAST] = {
69 0, /* IMX_SC_ERR_NONE */
70 -EINVAL, /* IMX_SC_ERR_VERSION */
71 -EINVAL, /* IMX_SC_ERR_CONFIG */
72 -EINVAL, /* IMX_SC_ERR_PARM */
73 -EACCES, /* IMX_SC_ERR_NOACCESS */
74 -EACCES, /* IMX_SC_ERR_LOCKED */
75 -ERANGE, /* IMX_SC_ERR_UNAVAILABLE */
76 -EEXIST, /* IMX_SC_ERR_NOTFOUND */
77 -EPERM, /* IMX_SC_ERR_NOPOWER */
78 -EPIPE, /* IMX_SC_ERR_IPC */
79 -EBUSY, /* IMX_SC_ERR_BUSY */
80 -EIO, /* IMX_SC_ERR_FAIL */
81};
82
83static struct imx_sc_ipc *imx_sc_ipc_handle;
84
85static inline int imx_sc_to_linux_errno(int errno)
86{
87 if (errno >= IMX_SC_ERR_NONE && errno < IMX_SC_ERR_LAST)
88 return imx_sc_linux_errmap[errno];
89 return -EIO;
90}
91
92/*
93 * Get the default handle used by SCU
94 */
95int imx_scu_get_handle(struct imx_sc_ipc **ipc)
96{
97 if (!imx_sc_ipc_handle)
98 return -EPROBE_DEFER;
99
100 *ipc = imx_sc_ipc_handle;
101 return 0;
102}
103EXPORT_SYMBOL(imx_scu_get_handle);
104
Olivier Deprez0e641232021-09-23 10:07:05 +0200105/* Callback called when the word of a message is ack-ed, eg read by SCU */
106static void imx_scu_tx_done(struct mbox_client *cl, void *mssg, int r)
107{
108 struct imx_sc_chan *sc_chan = container_of(cl, struct imx_sc_chan, cl);
109
110 complete(&sc_chan->tx_done);
111}
112
David Brazdil0f672f62019-12-10 10:32:29 +0000113static void imx_scu_rx_callback(struct mbox_client *c, void *msg)
114{
115 struct imx_sc_chan *sc_chan = container_of(c, struct imx_sc_chan, cl);
116 struct imx_sc_ipc *sc_ipc = sc_chan->sc_ipc;
117 struct imx_sc_rpc_msg *hdr;
118 u32 *data = msg;
Olivier Deprez0e641232021-09-23 10:07:05 +0200119 int i;
120
121 if (!sc_ipc->msg) {
122 dev_warn(sc_ipc->dev, "unexpected rx idx %d 0x%08x, ignore!\n",
123 sc_chan->idx, *data);
124 return;
125 }
126
127 if (sc_ipc->fast_ipc) {
128 hdr = msg;
129 sc_ipc->rx_size = hdr->size;
130 sc_ipc->msg[0] = *data++;
131
132 for (i = 1; i < sc_ipc->rx_size; i++)
133 sc_ipc->msg[i] = *data++;
134
135 complete(&sc_ipc->done);
136
137 return;
138 }
David Brazdil0f672f62019-12-10 10:32:29 +0000139
140 if (sc_chan->idx == 0) {
141 hdr = msg;
142 sc_ipc->rx_size = hdr->size;
143 dev_dbg(sc_ipc->dev, "msg rx size %u\n", sc_ipc->rx_size);
144 if (sc_ipc->rx_size > 4)
145 dev_warn(sc_ipc->dev, "RPC does not support receiving over 4 words: %u\n",
146 sc_ipc->rx_size);
147 }
148
149 sc_ipc->msg[sc_chan->idx] = *data;
150 sc_ipc->count++;
151
152 dev_dbg(sc_ipc->dev, "mu %u msg %u 0x%x\n", sc_chan->idx,
153 sc_ipc->count, *data);
154
155 if ((sc_ipc->rx_size != 0) && (sc_ipc->count == sc_ipc->rx_size))
156 complete(&sc_ipc->done);
157}
158
159static int imx_scu_ipc_write(struct imx_sc_ipc *sc_ipc, void *msg)
160{
Olivier Deprez0e641232021-09-23 10:07:05 +0200161 struct imx_sc_rpc_msg hdr = *(struct imx_sc_rpc_msg *)msg;
David Brazdil0f672f62019-12-10 10:32:29 +0000162 struct imx_sc_chan *sc_chan;
163 u32 *data = msg;
164 int ret;
Olivier Deprez0e641232021-09-23 10:07:05 +0200165 int size;
David Brazdil0f672f62019-12-10 10:32:29 +0000166 int i;
167
168 /* Check size */
Olivier Deprez0e641232021-09-23 10:07:05 +0200169 if (hdr.size > IMX_SC_RPC_MAX_MSG)
David Brazdil0f672f62019-12-10 10:32:29 +0000170 return -EINVAL;
171
Olivier Deprez0e641232021-09-23 10:07:05 +0200172 dev_dbg(sc_ipc->dev, "RPC SVC %u FUNC %u SIZE %u\n", hdr.svc,
173 hdr.func, hdr.size);
David Brazdil0f672f62019-12-10 10:32:29 +0000174
Olivier Deprez0e641232021-09-23 10:07:05 +0200175 size = sc_ipc->fast_ipc ? 1 : hdr.size;
176 for (i = 0; i < size; i++) {
David Brazdil0f672f62019-12-10 10:32:29 +0000177 sc_chan = &sc_ipc->chans[i % 4];
Olivier Deprez0e641232021-09-23 10:07:05 +0200178
179 /*
180 * SCU requires that all messages words are written
181 * sequentially but linux MU driver implements multiple
182 * independent channels for each register so ordering between
183 * different channels must be ensured by SCU API interface.
184 *
185 * Wait for tx_done before every send to ensure that no
186 * queueing happens at the mailbox channel level.
187 */
188 if (!sc_ipc->fast_ipc) {
189 wait_for_completion(&sc_chan->tx_done);
190 reinit_completion(&sc_chan->tx_done);
191 }
192
David Brazdil0f672f62019-12-10 10:32:29 +0000193 ret = mbox_send_message(sc_chan->ch, &data[i]);
194 if (ret < 0)
195 return ret;
196 }
197
198 return 0;
199}
200
201/*
202 * RPC command/response
203 */
204int imx_scu_call_rpc(struct imx_sc_ipc *sc_ipc, void *msg, bool have_resp)
205{
206 struct imx_sc_rpc_msg *hdr;
207 int ret;
208
209 if (WARN_ON(!sc_ipc || !msg))
210 return -EINVAL;
211
212 mutex_lock(&sc_ipc->lock);
213 reinit_completion(&sc_ipc->done);
214
Olivier Deprez0e641232021-09-23 10:07:05 +0200215 if (have_resp)
216 sc_ipc->msg = msg;
David Brazdil0f672f62019-12-10 10:32:29 +0000217 sc_ipc->count = 0;
218 ret = imx_scu_ipc_write(sc_ipc, msg);
219 if (ret < 0) {
220 dev_err(sc_ipc->dev, "RPC send msg failed: %d\n", ret);
221 goto out;
222 }
223
224 if (have_resp) {
225 if (!wait_for_completion_timeout(&sc_ipc->done,
226 MAX_RX_TIMEOUT)) {
227 dev_err(sc_ipc->dev, "RPC send msg timeout\n");
228 mutex_unlock(&sc_ipc->lock);
229 return -ETIMEDOUT;
230 }
231
232 /* response status is stored in hdr->func field */
233 hdr = msg;
234 ret = hdr->func;
235 }
236
237out:
Olivier Deprez0e641232021-09-23 10:07:05 +0200238 sc_ipc->msg = NULL;
David Brazdil0f672f62019-12-10 10:32:29 +0000239 mutex_unlock(&sc_ipc->lock);
240
241 dev_dbg(sc_ipc->dev, "RPC SVC done\n");
242
243 return imx_sc_to_linux_errno(ret);
244}
245EXPORT_SYMBOL(imx_scu_call_rpc);
246
247static int imx_scu_probe(struct platform_device *pdev)
248{
249 struct device *dev = &pdev->dev;
250 struct imx_sc_ipc *sc_ipc;
251 struct imx_sc_chan *sc_chan;
252 struct mbox_client *cl;
253 char *chan_name;
Olivier Deprez0e641232021-09-23 10:07:05 +0200254 struct of_phandle_args args;
255 int num_channel;
David Brazdil0f672f62019-12-10 10:32:29 +0000256 int ret;
257 int i;
258
259 sc_ipc = devm_kzalloc(dev, sizeof(*sc_ipc), GFP_KERNEL);
260 if (!sc_ipc)
261 return -ENOMEM;
262
Olivier Deprez0e641232021-09-23 10:07:05 +0200263 ret = of_parse_phandle_with_args(pdev->dev.of_node, "mboxes",
264 "#mbox-cells", 0, &args);
265 if (ret)
266 return ret;
267
268 sc_ipc->fast_ipc = of_device_is_compatible(args.np, "fsl,imx8-mu-scu");
269
270 num_channel = sc_ipc->fast_ipc ? 2 : SCU_MU_CHAN_NUM;
271 for (i = 0; i < num_channel; i++) {
272 if (i < num_channel / 2)
David Brazdil0f672f62019-12-10 10:32:29 +0000273 chan_name = kasprintf(GFP_KERNEL, "tx%d", i);
274 else
Olivier Deprez0e641232021-09-23 10:07:05 +0200275 chan_name = kasprintf(GFP_KERNEL, "rx%d",
276 i - num_channel / 2);
David Brazdil0f672f62019-12-10 10:32:29 +0000277
278 if (!chan_name)
279 return -ENOMEM;
280
281 sc_chan = &sc_ipc->chans[i];
282 cl = &sc_chan->cl;
283 cl->dev = dev;
284 cl->tx_block = false;
285 cl->knows_txdone = true;
286 cl->rx_callback = imx_scu_rx_callback;
287
Olivier Deprez0e641232021-09-23 10:07:05 +0200288 if (!sc_ipc->fast_ipc) {
289 /* Initial tx_done completion as "done" */
290 cl->tx_done = imx_scu_tx_done;
291 init_completion(&sc_chan->tx_done);
292 complete(&sc_chan->tx_done);
293 }
294
David Brazdil0f672f62019-12-10 10:32:29 +0000295 sc_chan->sc_ipc = sc_ipc;
Olivier Deprez0e641232021-09-23 10:07:05 +0200296 sc_chan->idx = i % (num_channel / 2);
David Brazdil0f672f62019-12-10 10:32:29 +0000297 sc_chan->ch = mbox_request_channel_byname(cl, chan_name);
298 if (IS_ERR(sc_chan->ch)) {
299 ret = PTR_ERR(sc_chan->ch);
300 if (ret != -EPROBE_DEFER)
301 dev_err(dev, "Failed to request mbox chan %s ret %d\n",
302 chan_name, ret);
Olivier Deprez0e641232021-09-23 10:07:05 +0200303 kfree(chan_name);
David Brazdil0f672f62019-12-10 10:32:29 +0000304 return ret;
305 }
306
307 dev_dbg(dev, "request mbox chan %s\n", chan_name);
308 /* chan_name is not used anymore by framework */
309 kfree(chan_name);
310 }
311
312 sc_ipc->dev = dev;
313 mutex_init(&sc_ipc->lock);
314 init_completion(&sc_ipc->done);
315
316 imx_sc_ipc_handle = sc_ipc;
317
318 ret = imx_scu_enable_general_irq_channel(dev);
319 if (ret)
320 dev_warn(dev,
321 "failed to enable general irq channel: %d\n", ret);
322
323 dev_info(dev, "NXP i.MX SCU Initialized\n");
324
325 return devm_of_platform_populate(dev);
326}
327
328static const struct of_device_id imx_scu_match[] = {
329 { .compatible = "fsl,imx-scu", },
330 { /* Sentinel */ }
331};
332
333static struct platform_driver imx_scu_driver = {
334 .driver = {
335 .name = "imx-scu",
336 .of_match_table = imx_scu_match,
337 },
338 .probe = imx_scu_probe,
339};
340builtin_platform_driver(imx_scu_driver);
341
342MODULE_AUTHOR("Dong Aisheng <aisheng.dong@nxp.com>");
343MODULE_DESCRIPTION("IMX SCU firmware protocol driver");
344MODULE_LICENSE("GPL v2");