| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * rt5514-spi.h -- RT5514 driver |
| 4 | * |
| 5 | * Copyright 2015 Realtek Semiconductor Corp. |
| 6 | * Author: Oder Chiou <oder_chiou@realtek.com> |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #ifndef __RT5514_SPI_H__ |
| 10 | #define __RT5514_SPI_H__ |
| 11 | |
| 12 | /** |
| 13 | * RT5514_SPI_BUF_LEN is the buffer size of SPI master controller. |
| 14 | */ |
| 15 | #define RT5514_SPI_BUF_LEN 240 |
| 16 | |
| 17 | #define RT5514_BUFFER_VOICE_BASE 0x18000200 |
| 18 | #define RT5514_BUFFER_VOICE_LIMIT 0x18000204 |
| 19 | #define RT5514_BUFFER_VOICE_WP 0x1800020c |
| 20 | #define RT5514_IRQ_CTRL 0x18002094 |
| 21 | |
| 22 | #define RT5514_IRQ_STATUS_BIT (0x1 << 5) |
| 23 | |
| 24 | /* SPI Command */ |
| 25 | enum { |
| 26 | RT5514_SPI_CMD_16_READ = 0, |
| 27 | RT5514_SPI_CMD_16_WRITE, |
| 28 | RT5514_SPI_CMD_32_READ, |
| 29 | RT5514_SPI_CMD_32_WRITE, |
| 30 | RT5514_SPI_CMD_BURST_READ, |
| 31 | RT5514_SPI_CMD_BURST_WRITE, |
| 32 | }; |
| 33 | |
| 34 | int rt5514_spi_burst_read(unsigned int addr, u8 *rxbuf, size_t len); |
| 35 | int rt5514_spi_burst_write(u32 addr, const u8 *txbuf, size_t len); |
| 36 | |
| 37 | #endif /* __RT5514_SPI_H__ */ |