David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) ST-Ericsson SA 2010 |
| 4 | * |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 5 | * Authors: Sundar Iyer <sundar.iyer@stericsson.com> for ST-Ericsson |
| 6 | * Bengt Jonsson <bengt.g.jonsson@stericsson.com> for ST-Ericsson |
| 7 | * Daniel Willerud <daniel.willerud@stericsson.com> for ST-Ericsson |
| 8 | */ |
| 9 | |
| 10 | #ifndef __LINUX_MFD_AB8500_REGULATOR_H |
| 11 | #define __LINUX_MFD_AB8500_REGULATOR_H |
| 12 | |
| 13 | #include <linux/platform_device.h> |
| 14 | |
| 15 | /* AB8500 regulators */ |
| 16 | enum ab8500_regulator_id { |
| 17 | AB8500_LDO_AUX1, |
| 18 | AB8500_LDO_AUX2, |
| 19 | AB8500_LDO_AUX3, |
| 20 | AB8500_LDO_INTCORE, |
| 21 | AB8500_LDO_TVOUT, |
| 22 | AB8500_LDO_AUDIO, |
| 23 | AB8500_LDO_ANAMIC1, |
| 24 | AB8500_LDO_ANAMIC2, |
| 25 | AB8500_LDO_DMIC, |
| 26 | AB8500_LDO_ANA, |
| 27 | AB8500_NUM_REGULATORS, |
| 28 | }; |
| 29 | |
| 30 | /* AB8505 regulators */ |
| 31 | enum ab8505_regulator_id { |
| 32 | AB8505_LDO_AUX1, |
| 33 | AB8505_LDO_AUX2, |
| 34 | AB8505_LDO_AUX3, |
| 35 | AB8505_LDO_AUX4, |
| 36 | AB8505_LDO_AUX5, |
| 37 | AB8505_LDO_AUX6, |
| 38 | AB8505_LDO_INTCORE, |
| 39 | AB8505_LDO_ADC, |
| 40 | AB8505_LDO_USB, |
| 41 | AB8505_LDO_AUDIO, |
| 42 | AB8505_LDO_ANAMIC1, |
| 43 | AB8505_LDO_ANAMIC2, |
| 44 | AB8505_LDO_AUX8, |
| 45 | AB8505_LDO_ANA, |
| 46 | AB8505_SYSCLKREQ_2, |
| 47 | AB8505_SYSCLKREQ_4, |
| 48 | AB8505_NUM_REGULATORS, |
| 49 | }; |
| 50 | |
| 51 | /* AB8500 and AB8505 register initialization */ |
| 52 | struct ab8500_regulator_reg_init { |
| 53 | int id; |
| 54 | u8 mask; |
| 55 | u8 value; |
| 56 | }; |
| 57 | |
| 58 | #define INIT_REGULATOR_REGISTER(_id, _mask, _value) \ |
| 59 | { \ |
| 60 | .id = _id, \ |
| 61 | .mask = _mask, \ |
| 62 | .value = _value, \ |
| 63 | } |
| 64 | |
| 65 | /* AB8500 registers */ |
| 66 | enum ab8500_regulator_reg { |
| 67 | AB8500_REGUREQUESTCTRL2, |
| 68 | AB8500_REGUREQUESTCTRL3, |
| 69 | AB8500_REGUREQUESTCTRL4, |
| 70 | AB8500_REGUSYSCLKREQ1HPVALID1, |
| 71 | AB8500_REGUSYSCLKREQ1HPVALID2, |
| 72 | AB8500_REGUHWHPREQ1VALID1, |
| 73 | AB8500_REGUHWHPREQ1VALID2, |
| 74 | AB8500_REGUHWHPREQ2VALID1, |
| 75 | AB8500_REGUHWHPREQ2VALID2, |
| 76 | AB8500_REGUSWHPREQVALID1, |
| 77 | AB8500_REGUSWHPREQVALID2, |
| 78 | AB8500_REGUSYSCLKREQVALID1, |
| 79 | AB8500_REGUSYSCLKREQVALID2, |
| 80 | AB8500_REGUMISC1, |
| 81 | AB8500_VAUDIOSUPPLY, |
| 82 | AB8500_REGUCTRL1VAMIC, |
| 83 | AB8500_VPLLVANAREGU, |
| 84 | AB8500_VREFDDR, |
| 85 | AB8500_EXTSUPPLYREGU, |
| 86 | AB8500_VAUX12REGU, |
| 87 | AB8500_VRF1VAUX3REGU, |
| 88 | AB8500_VAUX1SEL, |
| 89 | AB8500_VAUX2SEL, |
| 90 | AB8500_VRF1VAUX3SEL, |
| 91 | AB8500_REGUCTRL2SPARE, |
| 92 | AB8500_REGUCTRLDISCH, |
| 93 | AB8500_REGUCTRLDISCH2, |
| 94 | AB8500_NUM_REGULATOR_REGISTERS, |
| 95 | }; |
| 96 | |
| 97 | /* AB8505 registers */ |
| 98 | enum ab8505_regulator_reg { |
| 99 | AB8505_REGUREQUESTCTRL1, |
| 100 | AB8505_REGUREQUESTCTRL2, |
| 101 | AB8505_REGUREQUESTCTRL3, |
| 102 | AB8505_REGUREQUESTCTRL4, |
| 103 | AB8505_REGUSYSCLKREQ1HPVALID1, |
| 104 | AB8505_REGUSYSCLKREQ1HPVALID2, |
| 105 | AB8505_REGUHWHPREQ1VALID1, |
| 106 | AB8505_REGUHWHPREQ1VALID2, |
| 107 | AB8505_REGUHWHPREQ2VALID1, |
| 108 | AB8505_REGUHWHPREQ2VALID2, |
| 109 | AB8505_REGUSWHPREQVALID1, |
| 110 | AB8505_REGUSWHPREQVALID2, |
| 111 | AB8505_REGUSYSCLKREQVALID1, |
| 112 | AB8505_REGUSYSCLKREQVALID2, |
| 113 | AB8505_REGUVAUX4REQVALID, |
| 114 | AB8505_REGUMISC1, |
| 115 | AB8505_VAUDIOSUPPLY, |
| 116 | AB8505_REGUCTRL1VAMIC, |
| 117 | AB8505_VSMPSAREGU, |
| 118 | AB8505_VSMPSBREGU, |
| 119 | AB8505_VSAFEREGU, /* NOTE! PRCMU register */ |
| 120 | AB8505_VPLLVANAREGU, |
| 121 | AB8505_EXTSUPPLYREGU, |
| 122 | AB8505_VAUX12REGU, |
| 123 | AB8505_VRF1VAUX3REGU, |
| 124 | AB8505_VSMPSASEL1, |
| 125 | AB8505_VSMPSASEL2, |
| 126 | AB8505_VSMPSASEL3, |
| 127 | AB8505_VSMPSBSEL1, |
| 128 | AB8505_VSMPSBSEL2, |
| 129 | AB8505_VSMPSBSEL3, |
| 130 | AB8505_VSAFESEL1, /* NOTE! PRCMU register */ |
| 131 | AB8505_VSAFESEL2, /* NOTE! PRCMU register */ |
| 132 | AB8505_VSAFESEL3, /* NOTE! PRCMU register */ |
| 133 | AB8505_VAUX1SEL, |
| 134 | AB8505_VAUX2SEL, |
| 135 | AB8505_VRF1VAUX3SEL, |
| 136 | AB8505_VAUX4REQCTRL, |
| 137 | AB8505_VAUX4REGU, |
| 138 | AB8505_VAUX4SEL, |
| 139 | AB8505_REGUCTRLDISCH, |
| 140 | AB8505_REGUCTRLDISCH2, |
| 141 | AB8505_REGUCTRLDISCH3, |
| 142 | AB8505_CTRLVAUX5, |
| 143 | AB8505_CTRLVAUX6, |
| 144 | AB8505_NUM_REGULATOR_REGISTERS, |
| 145 | }; |
| 146 | |
| 147 | /* AB8500 external regulators */ |
| 148 | struct ab8500_ext_regulator_cfg { |
| 149 | bool hwreq; /* requires hw mode or high power mode */ |
| 150 | }; |
| 151 | |
| 152 | enum ab8500_ext_regulator_id { |
| 153 | AB8500_EXT_SUPPLY1, |
| 154 | AB8500_EXT_SUPPLY2, |
| 155 | AB8500_EXT_SUPPLY3, |
| 156 | AB8500_NUM_EXT_REGULATORS, |
| 157 | }; |
| 158 | |
| 159 | /* AB8500 regulator platform data */ |
| 160 | struct ab8500_regulator_platform_data { |
| 161 | int num_reg_init; |
| 162 | struct ab8500_regulator_reg_init *reg_init; |
| 163 | int num_regulator; |
| 164 | struct regulator_init_data *regulator; |
| 165 | int num_ext_regulator; |
| 166 | struct regulator_init_data *ext_regulator; |
| 167 | }; |
| 168 | |
| 169 | #endif |