| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | config SH_INTC |
| 3 | bool |
| 4 | select IRQ_DOMAIN |
| 5 | |
| 6 | if SH_INTC |
| 7 | |
| 8 | comment "Interrupt controller options" |
| 9 | |
| 10 | config INTC_USERIMASK |
| 11 | bool "Userspace interrupt masking support" |
| 12 | depends on (SUPERH && CPU_SH4A) || COMPILE_TEST |
| 13 | help |
| 14 | This enables support for hardware-assisted userspace hardirq |
| 15 | masking. |
| 16 | |
| 17 | SH-4A and newer interrupt blocks all support a special shadowed |
| 18 | page with all non-masking registers obscured when mapped in to |
| 19 | userspace. This is primarily for use by userspace device |
| 20 | drivers that are using special priority levels. |
| 21 | |
| 22 | If in doubt, say N. |
| 23 | |
| 24 | config INTC_BALANCING |
| 25 | bool "Hardware IRQ balancing support" |
| 26 | depends on SMP && SUPERH && CPU_SHX3 |
| 27 | help |
| 28 | This enables support for IRQ auto-distribution mode on SH-X3 |
| 29 | SMP parts. All of the balancing and CPU wakeup decisions are |
| 30 | taken care of automatically by hardware for distributed |
| 31 | vectors. |
| 32 | |
| 33 | If in doubt, say N. |
| 34 | |
| 35 | config INTC_MAPPING_DEBUG |
| 36 | bool "Expose IRQ to per-controller id mapping via debugfs" |
| 37 | depends on DEBUG_FS |
| 38 | help |
| 39 | This will create a debugfs entry for showing the relationship |
| 40 | between system IRQs and the per-controller id tables. |
| 41 | |
| 42 | If in doubt, say N. |
| 43 | |
| 44 | endif |