| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | # SPDX-License-Identifier: GPL-2.0-only |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | config TEGRA_MC |
| 3 | bool "NVIDIA Tegra Memory Controller support" |
| 4 | default y |
| 5 | depends on ARCH_TEGRA |
| 6 | help |
| 7 | This driver supports the Memory Controller (MC) hardware found on |
| 8 | NVIDIA Tegra SoCs. |
| 9 | |
| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 10 | config TEGRA20_EMC |
| 11 | bool "NVIDIA Tegra20 External Memory Controller driver" |
| 12 | default y |
| 13 | depends on ARCH_TEGRA_2x_SOC |
| 14 | help |
| 15 | This driver is for the External Memory Controller (EMC) found on |
| 16 | Tegra20 chips. The EMC controls the external DRAM on the board. |
| 17 | This driver is required to change memory timings / clock rate for |
| 18 | external memory. |
| 19 | |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 20 | config TEGRA124_EMC |
| 21 | bool "NVIDIA Tegra124 External Memory Controller driver" |
| 22 | default y |
| 23 | depends on TEGRA_MC && ARCH_TEGRA_124_SOC |
| 24 | help |
| 25 | This driver is for the External Memory Controller (EMC) found on |
| 26 | Tegra124 chips. The EMC controls the external DRAM on the board. |
| 27 | This driver is required to change memory timings / clock rate for |
| 28 | external memory. |