TrustedFirmware Git Browser
Code Review Sign In
review.trustedfirmware.org / hafnium / third_party / linux.git / 0f672f6c0b52b7b0700b0915c72b540721af4465 / . / drivers / gpu / drm / msm / Makefile
blob: 1579cf0d828f80b776c52930a539fb48cb59dff1 [file] [log] [blame]
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]1# SPDX-License-Identifier: GPL-2.0
David Brazdil0f672f62019-12-10 10:32:29 +0000[diff] [blame^]2ccflags-y := -I $(srctree)/$(src)
3ccflags-y += -I $(srctree)/$(src)/disp/dpu1
4ccflags-$(CONFIG_DRM_MSM_DSI) += -I $(srctree)/$(src)/dsi
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]5
6msm-y := \
7 adreno/adreno_device.o \
8 adreno/adreno_gpu.o \
David Brazdil0f672f62019-12-10 10:32:29 +0000[diff] [blame^]9 adreno/a2xx_gpu.o \
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]10 adreno/a3xx_gpu.o \
11 adreno/a4xx_gpu.o \
12 adreno/a5xx_gpu.o \
13 adreno/a5xx_power.o \
14 adreno/a5xx_preempt.o \
15 adreno/a6xx_gpu.o \
16 adreno/a6xx_gmu.o \
17 adreno/a6xx_hfi.o \
18 hdmi/hdmi.o \
19 hdmi/hdmi_audio.o \
20 hdmi/hdmi_bridge.o \
21 hdmi/hdmi_connector.o \
22 hdmi/hdmi_i2c.o \
23 hdmi/hdmi_phy.o \
24 hdmi/hdmi_phy_8960.o \
25 hdmi/hdmi_phy_8x60.o \
26 hdmi/hdmi_phy_8x74.o \
27 edp/edp.o \
28 edp/edp_aux.o \
29 edp/edp_bridge.o \
30 edp/edp_connector.o \
31 edp/edp_ctrl.o \
32 edp/edp_phy.o \
33 disp/mdp_format.o \
34 disp/mdp_kms.o \
35 disp/mdp4/mdp4_crtc.o \
36 disp/mdp4/mdp4_dtv_encoder.o \
37 disp/mdp4/mdp4_lcdc_encoder.o \
38 disp/mdp4/mdp4_lvds_connector.o \
39 disp/mdp4/mdp4_irq.o \
40 disp/mdp4/mdp4_kms.o \
41 disp/mdp4/mdp4_plane.o \
42 disp/mdp5/mdp5_cfg.o \
43 disp/mdp5/mdp5_ctl.o \
44 disp/mdp5/mdp5_crtc.o \
45 disp/mdp5/mdp5_encoder.o \
46 disp/mdp5/mdp5_irq.o \
47 disp/mdp5/mdp5_mdss.o \
48 disp/mdp5/mdp5_kms.o \
49 disp/mdp5/mdp5_pipe.o \
50 disp/mdp5/mdp5_mixer.o \
51 disp/mdp5/mdp5_plane.o \
52 disp/mdp5/mdp5_smp.o \
53 disp/dpu1/dpu_core_irq.o \
54 disp/dpu1/dpu_core_perf.o \
55 disp/dpu1/dpu_crtc.o \
56 disp/dpu1/dpu_encoder.o \
57 disp/dpu1/dpu_encoder_phys_cmd.o \
58 disp/dpu1/dpu_encoder_phys_vid.o \
59 disp/dpu1/dpu_formats.o \
60 disp/dpu1/dpu_hw_blk.o \
61 disp/dpu1/dpu_hw_catalog.o \
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]62 disp/dpu1/dpu_hw_ctl.o \
63 disp/dpu1/dpu_hw_interrupts.o \
64 disp/dpu1/dpu_hw_intf.o \
65 disp/dpu1/dpu_hw_lm.o \
66 disp/dpu1/dpu_hw_pingpong.o \
67 disp/dpu1/dpu_hw_sspp.o \
68 disp/dpu1/dpu_hw_top.o \
69 disp/dpu1/dpu_hw_util.o \
70 disp/dpu1/dpu_hw_vbif.o \
71 disp/dpu1/dpu_io_util.o \
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]72 disp/dpu1/dpu_kms.o \
73 disp/dpu1/dpu_mdss.o \
74 disp/dpu1/dpu_plane.o \
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]75 disp/dpu1/dpu_rm.o \
76 disp/dpu1/dpu_vbif.o \
77 msm_atomic.o \
David Brazdil0f672f62019-12-10 10:32:29 +0000[diff] [blame^]78 msm_atomic_tracepoints.o \
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]79 msm_debugfs.o \
80 msm_drv.o \
81 msm_fb.o \
82 msm_fence.o \
83 msm_gem.o \
84 msm_gem_prime.o \
85 msm_gem_shrinker.o \
86 msm_gem_submit.o \
87 msm_gem_vma.o \
88 msm_gpu.o \
89 msm_iommu.o \
90 msm_perf.o \
91 msm_rd.o \
92 msm_ringbuffer.o \
David Brazdil0f672f62019-12-10 10:32:29 +0000[diff] [blame^]93 msm_submitqueue.o \
94 msm_gpu_tracepoints.o \
95 msm_gpummu.o
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]96
David Brazdil0f672f62019-12-10 10:32:29 +0000[diff] [blame^]97msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o
98
99msm-$(CONFIG_DRM_MSM_GPU_STATE) += adreno/a6xx_gpu_state.o
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000[diff] [blame]100
101msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
102msm-$(CONFIG_COMMON_CLK) += disp/mdp4/mdp4_lvds_pll.o
103msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_pll_8960.o
104msm-$(CONFIG_COMMON_CLK) += hdmi/hdmi_phy_8996.o
105
106msm-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o
107
108msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \
109 disp/mdp4/mdp4_dsi_encoder.o \
110 dsi/dsi_cfg.o \
111 dsi/dsi_host.o \
112 dsi/dsi_manager.o \
113 dsi/phy/dsi_phy.o \
114 disp/mdp5/mdp5_cmd_encoder.o
115
116msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o
117msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o
118msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/phy/dsi_phy_28nm_8960.o
119msm-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/phy/dsi_phy_14nm.o
120msm-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/phy/dsi_phy_10nm.o
121
122ifeq ($(CONFIG_DRM_MSM_DSI_PLL),y)
123msm-y += dsi/pll/dsi_pll.o
124msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/pll/dsi_pll_28nm.o
125msm-$(CONFIG_DRM_MSM_DSI_28NM_8960_PHY) += dsi/pll/dsi_pll_28nm_8960.o
126msm-$(CONFIG_DRM_MSM_DSI_14NM_PHY) += dsi/pll/dsi_pll_14nm.o
127msm-$(CONFIG_DRM_MSM_DSI_10NM_PHY) += dsi/pll/dsi_pll_10nm.o
128endif
129
130obj-$(CONFIG_DRM_MSM) += msm.o