blob: 2587ea834f067f4e9d90954d4a31daaced82115a [file] [log] [blame]
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001# SPDX-License-Identifier: GPL-2.0
2#
3# Makefile for the drm device driver. This driver provides support for the
4# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
5
6# Add a set of useful warning flags and enable -Werror for CI to prevent
7# trivial mistakes from creeping in. We have to do this piecemeal as we reject
8# any patch that isn't warning clean, so turning on -Wall -Wextra (or W=1) we
9# need to filter out dubious warnings. Still it is our interest
10# to keep running locally with W=1 C=1 until we are completely clean.
11#
12# Note the danger in using -Wall -Wextra is that when CI updates gcc we
13# will most likely get a sudden build breakage... Hopefully we will fix
14# new warnings before CI updates!
David Brazdil0f672f62019-12-10 10:32:29 +000015subdir-ccflags-y := -Wall -Wextra
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000016subdir-ccflags-y += $(call cc-disable-warning, unused-parameter)
17subdir-ccflags-y += $(call cc-disable-warning, type-limits)
18subdir-ccflags-y += $(call cc-disable-warning, missing-field-initializers)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000019subdir-ccflags-y += $(call cc-disable-warning, unused-but-set-variable)
20# clang warnings
21subdir-ccflags-y += $(call cc-disable-warning, sign-compare)
22subdir-ccflags-y += $(call cc-disable-warning, sometimes-uninitialized)
23subdir-ccflags-y += $(call cc-disable-warning, initializer-overrides)
David Brazdil0f672f62019-12-10 10:32:29 +000024subdir-ccflags-y += $(call cc-disable-warning, uninitialized)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000025subdir-ccflags-$(CONFIG_DRM_I915_WERROR) += -Werror
26
27# Fine grained warnings disable
28CFLAGS_i915_pci.o = $(call cc-disable-warning, override-init)
David Brazdil0f672f62019-12-10 10:32:29 +000029CFLAGS_display/intel_fbdev.o = $(call cc-disable-warning, override-init)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000030
31subdir-ccflags-y += \
32 $(call as-instr,movntdqa (%eax)$(comma)%xmm0,-DCONFIG_AS_MOVNTDQA)
33
David Brazdil0f672f62019-12-10 10:32:29 +000034# Extra header tests
35header-test-pattern-$(CONFIG_DRM_I915_WERROR) := *.h
36
37subdir-ccflags-y += -I$(srctree)/$(src)
38
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000039# Please keep these build lists sorted!
40
41# core driver code
David Brazdil0f672f62019-12-10 10:32:29 +000042i915-y += i915_drv.o \
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000043 i915_irq.o \
David Brazdil0f672f62019-12-10 10:32:29 +000044 i915_getparam.o \
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000045 i915_params.o \
46 i915_pci.o \
David Brazdil0f672f62019-12-10 10:32:29 +000047 i915_scatterlist.o \
48 i915_suspend.o \
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000049 i915_sysfs.o \
David Brazdil0f672f62019-12-10 10:32:29 +000050 i915_utils.o \
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000051 intel_csr.o \
52 intel_device_info.o \
David Brazdil0f672f62019-12-10 10:32:29 +000053 intel_pch.o \
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000054 intel_pm.o \
55 intel_runtime_pm.o \
David Brazdil0f672f62019-12-10 10:32:29 +000056 intel_sideband.o \
57 intel_uncore.o \
58 intel_wakeref.o
59
60# core library code
61i915-y += \
62 i915_memcpy.o \
63 i915_mm.o \
64 i915_sw_fence.o \
65 i915_sw_fence_work.o \
66 i915_syncmap.o \
67 i915_user_extensions.o
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000068
69i915-$(CONFIG_COMPAT) += i915_ioc32.o
David Brazdil0f672f62019-12-10 10:32:29 +000070i915-$(CONFIG_DEBUG_FS) += i915_debugfs.o display/intel_pipe_crc.o
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000071i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
72
David Brazdil0f672f62019-12-10 10:32:29 +000073# "Graphics Technology" (aka we talk to the gpu)
74obj-y += gt/
75gt-y += \
76 gt/intel_breadcrumbs.o \
77 gt/intel_context.o \
78 gt/intel_engine_cs.o \
79 gt/intel_engine_pool.o \
80 gt/intel_engine_pm.o \
81 gt/intel_engine_user.o \
82 gt/intel_gt.o \
83 gt/intel_gt_irq.o \
84 gt/intel_gt_pm.o \
85 gt/intel_gt_pm_irq.o \
86 gt/intel_hangcheck.o \
87 gt/intel_lrc.o \
88 gt/intel_renderstate.o \
89 gt/intel_reset.o \
90 gt/intel_ringbuffer.o \
91 gt/intel_mocs.o \
92 gt/intel_sseu.o \
93 gt/intel_timeline.o \
94 gt/intel_workarounds.o
95# autogenerated null render state
96gt-y += \
97 gt/gen6_renderstate.o \
98 gt/gen7_renderstate.o \
99 gt/gen8_renderstate.o \
100 gt/gen9_renderstate.o
101i915-y += $(gt-y)
102
103# GEM (Graphics Execution Management) code
104obj-y += gem/
105gem-y += \
106 gem/i915_gem_busy.o \
107 gem/i915_gem_clflush.o \
108 gem/i915_gem_client_blt.o \
109 gem/i915_gem_context.o \
110 gem/i915_gem_dmabuf.o \
111 gem/i915_gem_domain.o \
112 gem/i915_gem_execbuffer.o \
113 gem/i915_gem_fence.o \
114 gem/i915_gem_internal.o \
115 gem/i915_gem_object.o \
116 gem/i915_gem_object_blt.o \
117 gem/i915_gem_mman.o \
118 gem/i915_gem_pages.o \
119 gem/i915_gem_phys.o \
120 gem/i915_gem_pm.o \
121 gem/i915_gem_shmem.o \
122 gem/i915_gem_shrinker.o \
123 gem/i915_gem_stolen.o \
124 gem/i915_gem_throttle.o \
125 gem/i915_gem_tiling.o \
126 gem/i915_gem_userptr.o \
127 gem/i915_gem_wait.o \
128 gem/i915_gemfs.o
129i915-y += \
130 $(gem-y) \
131 i915_active.o \
132 i915_buddy.o \
133 i915_cmd_parser.o \
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000134 i915_gem_evict.o \
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000135 i915_gem_fence_reg.o \
136 i915_gem_gtt.o \
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000137 i915_gem.o \
David Brazdil0f672f62019-12-10 10:32:29 +0000138 i915_globals.o \
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000139 i915_query.o \
140 i915_request.o \
David Brazdil0f672f62019-12-10 10:32:29 +0000141 i915_scheduler.o \
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000142 i915_trace_points.o \
143 i915_vma.o \
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000144 intel_wopcm.o
145
146# general-purpose microcontroller (GuC) support
David Brazdil0f672f62019-12-10 10:32:29 +0000147obj-y += gt/uc/
148i915-y += gt/uc/intel_uc.o \
149 gt/uc/intel_uc_fw.o \
150 gt/uc/intel_guc.o \
151 gt/uc/intel_guc_ads.o \
152 gt/uc/intel_guc_ct.o \
153 gt/uc/intel_guc_fw.o \
154 gt/uc/intel_guc_log.o \
155 gt/uc/intel_guc_submission.o \
156 gt/uc/intel_huc.o \
157 gt/uc/intel_huc_fw.o
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000158
159# modesetting core code
David Brazdil0f672f62019-12-10 10:32:29 +0000160obj-y += display/
161i915-y += \
162 display/intel_atomic.o \
163 display/intel_atomic_plane.o \
164 display/intel_audio.o \
165 display/intel_bios.o \
166 display/intel_bw.o \
167 display/intel_cdclk.o \
168 display/intel_color.o \
169 display/intel_combo_phy.o \
170 display/intel_connector.o \
171 display/intel_display.o \
172 display/intel_display_power.o \
173 display/intel_dpio_phy.o \
174 display/intel_dpll_mgr.o \
175 display/intel_fbc.o \
176 display/intel_fifo_underrun.o \
177 display/intel_frontbuffer.o \
178 display/intel_hdcp.o \
179 display/intel_hotplug.o \
180 display/intel_lpe_audio.o \
181 display/intel_overlay.o \
182 display/intel_psr.o \
183 display/intel_quirks.o \
184 display/intel_sprite.o \
185 display/intel_tc.o
186i915-$(CONFIG_ACPI) += \
187 display/intel_acpi.o \
188 display/intel_opregion.o
189i915-$(CONFIG_DRM_FBDEV_EMULATION) += \
190 display/intel_fbdev.o
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000191
192# modesetting output/encoder code
David Brazdil0f672f62019-12-10 10:32:29 +0000193i915-y += \
194 display/dvo_ch7017.o \
195 display/dvo_ch7xxx.o \
196 display/dvo_ivch.o \
197 display/dvo_ns2501.o \
198 display/dvo_sil164.o \
199 display/dvo_tfp410.o \
200 display/icl_dsi.o \
201 display/intel_crt.o \
202 display/intel_ddi.o \
203 display/intel_dp.o \
204 display/intel_dp_aux_backlight.o \
205 display/intel_dp_link_training.o \
206 display/intel_dp_mst.o \
207 display/intel_dsi.o \
208 display/intel_dsi_dcs_backlight.o \
209 display/intel_dsi_vbt.o \
210 display/intel_dvo.o \
211 display/intel_gmbus.o \
212 display/intel_hdmi.o \
213 display/intel_lspcon.o \
214 display/intel_lvds.o \
215 display/intel_panel.o \
216 display/intel_sdvo.o \
217 display/intel_tv.o \
218 display/intel_vdsc.o \
219 display/vlv_dsi.o \
220 display/vlv_dsi_pll.o
221
222# perf code
223obj-y += oa/
224i915-y += \
225 oa/i915_oa_hsw.o \
226 oa/i915_oa_bdw.o \
227 oa/i915_oa_chv.o \
228 oa/i915_oa_sklgt2.o \
229 oa/i915_oa_sklgt3.o \
230 oa/i915_oa_sklgt4.o \
231 oa/i915_oa_bxt.o \
232 oa/i915_oa_kblgt2.o \
233 oa/i915_oa_kblgt3.o \
234 oa/i915_oa_glk.o \
235 oa/i915_oa_cflgt2.o \
236 oa/i915_oa_cflgt3.o \
237 oa/i915_oa_cnl.o \
238 oa/i915_oa_icl.o
239i915-y += i915_perf.o
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000240
241# Post-mortem debug and GPU hang state capture
242i915-$(CONFIG_DRM_I915_CAPTURE_ERROR) += i915_gpu_error.o
243i915-$(CONFIG_DRM_I915_SELFTEST) += \
David Brazdil0f672f62019-12-10 10:32:29 +0000244 gem/selftests/igt_gem_utils.o \
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000245 selftests/i915_random.o \
246 selftests/i915_selftest.o \
David Brazdil0f672f62019-12-10 10:32:29 +0000247 selftests/igt_flush_test.o \
248 selftests/igt_live_test.o \
249 selftests/igt_reset.o \
250 selftests/igt_spinner.o
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000251
252# virtual gpu code
253i915-y += i915_vgpu.o
254
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000255ifeq ($(CONFIG_DRM_I915_GVT),y)
256i915-y += intel_gvt.o
257include $(src)/gvt/Makefile
258endif
259
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000260obj-$(CONFIG_DRM_I915) += i915.o
David Brazdil0f672f62019-12-10 10:32:29 +0000261obj-$(CONFIG_DRM_I915_GVT_KVMGT) += gvt/kvmgt.o