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David Brazdil0f672f62019-12-10 10:32:29 +00001/* SPDX-License-Identifier: GPL-2.0-only */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002/*
3 * Copyright (c) 2016 Maxime Ripard. All rights reserved.
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004 */
5
6#ifndef _COMMON_H_
7#define _COMMON_H_
8
9#include <linux/compiler.h>
10#include <linux/clk-provider.h>
11
12#define CCU_FEATURE_FRACTIONAL BIT(0)
13#define CCU_FEATURE_VARIABLE_PREDIV BIT(1)
14#define CCU_FEATURE_FIXED_PREDIV BIT(2)
15#define CCU_FEATURE_FIXED_POSTDIV BIT(3)
16#define CCU_FEATURE_ALL_PREDIV BIT(4)
17#define CCU_FEATURE_LOCK_REG BIT(5)
18#define CCU_FEATURE_MMC_TIMING_SWITCH BIT(6)
19#define CCU_FEATURE_SIGMA_DELTA_MOD BIT(7)
20
21/* MMC timing mode switch bit */
22#define CCU_MMC_NEW_TIMING_MODE BIT(30)
23
24struct device_node;
25
26struct ccu_common {
27 void __iomem *base;
28 u16 reg;
29 u16 lock_reg;
30 u32 prediv;
31
32 unsigned long features;
33 spinlock_t *lock;
34 struct clk_hw hw;
35};
36
37static inline struct ccu_common *hw_to_ccu_common(struct clk_hw *hw)
38{
39 return container_of(hw, struct ccu_common, hw);
40}
41
42struct sunxi_ccu_desc {
43 struct ccu_common **ccu_clks;
44 unsigned long num_ccu_clks;
45
46 struct clk_hw_onecell_data *hw_clks;
47
48 struct ccu_reset_map *resets;
49 unsigned long num_resets;
50};
51
52void ccu_helper_wait_for_lock(struct ccu_common *common, u32 lock);
53
54struct ccu_pll_nb {
55 struct notifier_block clk_nb;
56 struct ccu_common *common;
57
58 u32 enable;
59 u32 lock;
60};
61
62#define to_ccu_pll_nb(_nb) container_of(_nb, struct ccu_pll_nb, clk_nb)
63
64int ccu_pll_notifier_register(struct ccu_pll_nb *pll_nb);
65
66int sunxi_ccu_probe(struct device_node *node, void __iomem *reg,
67 const struct sunxi_ccu_desc *desc);
68
69#endif /* _COMMON_H_ */