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David Brazdil0f672f62019-12-10 10:32:29 +00001// SPDX-License-Identifier: GPL-2.0-or-later
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002/*
3 * Copyright 2011-2012 Calxeda, Inc.
4 * Copyright (C) 2012-2013 Altera Corporation <www.altera.com>
5 *
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00006 * Based from clk-highbank.c
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00007 */
8#include <linux/of.h>
9
10#include "clk.h"
11
12CLK_OF_DECLARE(socfpga_pll_clk, "altr,socfpga-pll-clock", socfpga_pll_init);
13CLK_OF_DECLARE(socfpga_perip_clk, "altr,socfpga-perip-clk", socfpga_periph_init);
14CLK_OF_DECLARE(socfpga_gate_clk, "altr,socfpga-gate-clk", socfpga_gate_init);
15CLK_OF_DECLARE(socfpga_a10_pll_clk, "altr,socfpga-a10-pll-clock",
16 socfpga_a10_pll_init);
17CLK_OF_DECLARE(socfpga_a10_perip_clk, "altr,socfpga-a10-perip-clk",
18 socfpga_a10_periph_init);
19CLK_OF_DECLARE(socfpga_a10_gate_clk, "altr,socfpga-a10-gate-clk",
20 socfpga_a10_gate_init);