| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | #include <linux/linkage.h> |
| 3 | #include <asm/percpu.h> |
| 4 | |
| 5 | .text |
| 6 | |
| 7 | /* |
| 8 | * Inputs: |
| 9 | * %rsi : memory location to compare |
| 10 | * %rax : low 64 bits of old value |
| 11 | * %rdx : high 64 bits of old value |
| 12 | * %rbx : low 64 bits of new value |
| 13 | * %rcx : high 64 bits of new value |
| 14 | * %al : Operation successful |
| 15 | */ |
| 16 | ENTRY(this_cpu_cmpxchg16b_emu) |
| 17 | |
| 18 | # |
| 19 | # Emulate 'cmpxchg16b %gs:(%rsi)' except we return the result in %al not |
| 20 | # via the ZF. Caller will access %al to get result. |
| 21 | # |
| 22 | # Note that this is only useful for a cpuops operation. Meaning that we |
| 23 | # do *not* have a fully atomic operation but just an operation that is |
| 24 | # *atomic* on a single cpu (as provided by the this_cpu_xx class of |
| 25 | # macros). |
| 26 | # |
| 27 | pushfq |
| 28 | cli |
| 29 | |
| 30 | cmpq PER_CPU_VAR((%rsi)), %rax |
| 31 | jne .Lnot_same |
| 32 | cmpq PER_CPU_VAR(8(%rsi)), %rdx |
| 33 | jne .Lnot_same |
| 34 | |
| 35 | movq %rbx, PER_CPU_VAR((%rsi)) |
| 36 | movq %rcx, PER_CPU_VAR(8(%rsi)) |
| 37 | |
| 38 | popfq |
| 39 | mov $1, %al |
| 40 | ret |
| 41 | |
| 42 | .Lnot_same: |
| 43 | popfq |
| 44 | xor %al,%al |
| 45 | ret |
| 46 | |
| 47 | ENDPROC(this_cpu_cmpxchg16b_emu) |