| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 2 | #ifndef ARCH_X86_CPU_H |
| 3 | #define ARCH_X86_CPU_H |
| 4 | |
| 5 | /* attempt to consolidate cpu attributes */ |
| 6 | struct cpu_dev { |
| 7 | const char *c_vendor; |
| 8 | |
| 9 | /* some have two possibilities for cpuid string */ |
| 10 | const char *c_ident[2]; |
| 11 | |
| 12 | void (*c_early_init)(struct cpuinfo_x86 *); |
| 13 | void (*c_bsp_init)(struct cpuinfo_x86 *); |
| 14 | void (*c_init)(struct cpuinfo_x86 *); |
| 15 | void (*c_identify)(struct cpuinfo_x86 *); |
| 16 | void (*c_detect_tlb)(struct cpuinfo_x86 *); |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 17 | int c_x86_vendor; |
| 18 | #ifdef CONFIG_X86_32 |
| 19 | /* Optional vendor specific routine to obtain the cache size. */ |
| 20 | unsigned int (*legacy_cache_size)(struct cpuinfo_x86 *, |
| 21 | unsigned int); |
| 22 | |
| 23 | /* Family/stepping-based lookup table for model names. */ |
| 24 | struct legacy_cpu_model_info { |
| 25 | int family; |
| 26 | const char *model_names[16]; |
| 27 | } legacy_models[5]; |
| 28 | #endif |
| 29 | }; |
| 30 | |
| 31 | struct _tlb_table { |
| 32 | unsigned char descriptor; |
| 33 | char tlb_type; |
| 34 | unsigned int entries; |
| 35 | /* unsigned int ways; */ |
| 36 | char info[128]; |
| 37 | }; |
| 38 | |
| 39 | #define cpu_dev_register(cpu_devX) \ |
| 40 | static const struct cpu_dev *const __cpu_dev_##cpu_devX __used \ |
| 41 | __attribute__((__section__(".x86_cpu_dev.init"))) = \ |
| 42 | &cpu_devX; |
| 43 | |
| 44 | extern const struct cpu_dev *const __x86_cpu_dev_start[], |
| 45 | *const __x86_cpu_dev_end[]; |
| 46 | |
| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 47 | #ifdef CONFIG_CPU_SUP_INTEL |
| 48 | enum tsx_ctrl_states { |
| 49 | TSX_CTRL_ENABLE, |
| 50 | TSX_CTRL_DISABLE, |
| 51 | TSX_CTRL_NOT_SUPPORTED, |
| 52 | }; |
| 53 | |
| 54 | extern __ro_after_init enum tsx_ctrl_states tsx_ctrl_state; |
| 55 | |
| 56 | extern void __init tsx_init(void); |
| 57 | extern void tsx_enable(void); |
| 58 | extern void tsx_disable(void); |
| 59 | #else |
| 60 | static inline void tsx_init(void) { } |
| 61 | #endif /* CONFIG_CPU_SUP_INTEL */ |
| 62 | |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 63 | extern void get_cpu_cap(struct cpuinfo_x86 *c); |
| 64 | extern void get_cpu_address_sizes(struct cpuinfo_x86 *c); |
| 65 | extern void cpu_detect_cache_sizes(struct cpuinfo_x86 *c); |
| 66 | extern void init_scattered_cpuid_features(struct cpuinfo_x86 *c); |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 67 | extern void init_intel_cacheinfo(struct cpuinfo_x86 *c); |
| 68 | extern void init_amd_cacheinfo(struct cpuinfo_x86 *c); |
| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 69 | extern void init_hygon_cacheinfo(struct cpuinfo_x86 *c); |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 70 | |
| 71 | extern void detect_num_cpu_cores(struct cpuinfo_x86 *c); |
| 72 | extern int detect_extended_topology_early(struct cpuinfo_x86 *c); |
| 73 | extern int detect_extended_topology(struct cpuinfo_x86 *c); |
| 74 | extern int detect_ht_early(struct cpuinfo_x86 *c); |
| 75 | extern void detect_ht(struct cpuinfo_x86 *c); |
| 76 | |
| 77 | unsigned int aperfmperf_get_khz(int cpu); |
| 78 | |
| 79 | extern void x86_spec_ctrl_setup_ap(void); |
| 80 | |
| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 81 | extern u64 x86_read_arch_cap_msr(void); |
| 82 | |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 83 | #endif /* ARCH_X86_CPU_H */ |