David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0 |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * SDK7786 FPGA Support. |
| 4 | * |
| 5 | * Copyright (C) 2010 Paul Mundt |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 6 | */ |
| 7 | #include <linux/init.h> |
| 8 | #include <linux/io.h> |
| 9 | #include <linux/bcd.h> |
| 10 | #include <mach/fpga.h> |
David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 11 | #include <linux/sizes.h> |
Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 12 | |
| 13 | #define FPGA_REGS_OFFSET 0x03fff800 |
| 14 | #define FPGA_REGS_SIZE 0x490 |
| 15 | |
| 16 | /* |
| 17 | * The FPGA can be mapped in any of the generally available areas, |
| 18 | * so we attempt to scan for it using the fixed SRSTR read magic. |
| 19 | * |
| 20 | * Once the FPGA is located, the rest of the mapping data for the other |
| 21 | * components can be determined dynamically from its section mapping |
| 22 | * registers. |
| 23 | */ |
| 24 | static void __iomem *sdk7786_fpga_probe(void) |
| 25 | { |
| 26 | unsigned long area; |
| 27 | void __iomem *base; |
| 28 | |
| 29 | /* |
| 30 | * Iterate over all of the areas where the FPGA could be mapped. |
| 31 | * The possible range is anywhere from area 0 through 6, area 7 |
| 32 | * is reserved. |
| 33 | */ |
| 34 | for (area = PA_AREA0; area < PA_AREA7; area += SZ_64M) { |
| 35 | base = ioremap_nocache(area + FPGA_REGS_OFFSET, FPGA_REGS_SIZE); |
| 36 | if (!base) { |
| 37 | /* Failed to remap this area, move along. */ |
| 38 | continue; |
| 39 | } |
| 40 | |
| 41 | if (ioread16(base + SRSTR) == SRSTR_MAGIC) |
| 42 | return base; /* Found it! */ |
| 43 | |
| 44 | iounmap(base); |
| 45 | } |
| 46 | |
| 47 | return NULL; |
| 48 | } |
| 49 | |
| 50 | void __iomem *sdk7786_fpga_base; |
| 51 | |
| 52 | void __init sdk7786_fpga_init(void) |
| 53 | { |
| 54 | u16 version, date; |
| 55 | |
| 56 | sdk7786_fpga_base = sdk7786_fpga_probe(); |
| 57 | if (unlikely(!sdk7786_fpga_base)) { |
| 58 | panic("FPGA detection failed.\n"); |
| 59 | return; |
| 60 | } |
| 61 | |
| 62 | version = fpga_read_reg(FPGAVR); |
| 63 | date = fpga_read_reg(FPGADR); |
| 64 | |
| 65 | pr_info("\tFPGA version:\t%d.%d (built on %d/%d/%d)\n", |
| 66 | bcd2bin(version >> 8) & 0xf, bcd2bin(version & 0xf), |
| 67 | ((date >> 12) & 0xf) + 2000, |
| 68 | (date >> 8) & 0xf, bcd2bin(date & 0xff)); |
| 69 | } |