| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * SBC8548 Device Tree Source |
| 4 | * |
| 5 | * Configured for booting off the alternate (64MB SODIMM) flash. |
| 6 | * Requires switching JP12 jumpers and changing SW2.8 setting. |
| 7 | * |
| 8 | * Copyright 2013 Wind River Systems Inc. |
| 9 | * |
| 10 | * Paul Gortmaker (see MAINTAINERS for contact information) |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 11 | */ |
| 12 | |
| 13 | |
| 14 | /dts-v1/; |
| 15 | |
| 16 | /include/ "sbc8548-pre.dtsi" |
| 17 | |
| 18 | /{ |
| 19 | localbus@e0000000 { |
| 20 | #address-cells = <2>; |
| 21 | #size-cells = <1>; |
| 22 | compatible = "simple-bus"; |
| 23 | reg = <0xe0000000 0x5000>; |
| 24 | interrupt-parent = <&mpic>; |
| 25 | |
| 26 | ranges = <0x0 0x0 0xfc000000 0x04000000 /*64MB Flash*/ |
| 27 | 0x3 0x0 0xf0000000 0x04000000 /*64MB SDRAM*/ |
| 28 | 0x4 0x0 0xf4000000 0x04000000 /*64MB SDRAM*/ |
| 29 | 0x5 0x0 0xf8000000 0x00b10000 /* EPLD */ |
| 30 | 0x6 0x0 0xef800000 0x00800000>; /*8MB Flash*/ |
| 31 | |
| 32 | flash@0,0 { |
| 33 | #address-cells = <1>; |
| 34 | #size-cells = <1>; |
| 35 | reg = <0x0 0x0 0x04000000>; |
| 36 | compatible = "intel,JS28F128", "cfi-flash"; |
| 37 | bank-width = <4>; |
| 38 | device-width = <1>; |
| 39 | partition@0 { |
| 40 | label = "space"; |
| 41 | /* FC000000 -> FFEFFFFF */ |
| 42 | reg = <0x00000000 0x03f00000>; |
| 43 | }; |
| 44 | partition@3f00000 { |
| 45 | label = "bootloader"; |
| 46 | /* FFF00000 -> FFFFFFFF */ |
| 47 | reg = <0x03f00000 0x00100000>; |
| 48 | read-only; |
| 49 | }; |
| 50 | }; |
| 51 | |
| 52 | |
| 53 | epld@5,0 { |
| 54 | compatible = "wrs,epld-localbus"; |
| 55 | #address-cells = <2>; |
| 56 | #size-cells = <1>; |
| 57 | reg = <0x5 0x0 0x00b10000>; |
| 58 | ranges = < |
| 59 | 0x0 0x0 0x5 0x000000 0x1fff /* LED */ |
| 60 | 0x1 0x0 0x5 0x100000 0x1fff /* Switches */ |
| 61 | 0x3 0x0 0x5 0x300000 0x1fff /* HW Rev. */ |
| 62 | 0xb 0x0 0x5 0xb00000 0x1fff /* EEPROM */ |
| 63 | >; |
| 64 | |
| 65 | led@0,0 { |
| 66 | compatible = "led"; |
| 67 | reg = <0x0 0x0 0x1fff>; |
| 68 | }; |
| 69 | |
| 70 | switches@1,0 { |
| 71 | compatible = "switches"; |
| 72 | reg = <0x1 0x0 0x1fff>; |
| 73 | }; |
| 74 | |
| 75 | hw-rev@3,0 { |
| 76 | compatible = "hw-rev"; |
| 77 | reg = <0x3 0x0 0x1fff>; |
| 78 | }; |
| 79 | |
| 80 | eeprom@b,0 { |
| 81 | compatible = "eeprom"; |
| 82 | reg = <0xb 0 0x1fff>; |
| 83 | }; |
| 84 | |
| 85 | }; |
| 86 | |
| 87 | alt-flash@6,0 { |
| 88 | #address-cells = <1>; |
| 89 | #size-cells = <1>; |
| 90 | compatible = "intel,JS28F640", "cfi-flash"; |
| 91 | reg = <0x6 0x0 0x800000>; |
| 92 | bank-width = <1>; |
| 93 | device-width = <1>; |
| 94 | partition@0 { |
| 95 | label = "space"; |
| 96 | /* EF800000 -> EFF9FFFF */ |
| 97 | reg = <0x00000000 0x007a0000>; |
| 98 | }; |
| 99 | partition@7a0000 { |
| 100 | label = "bootloader"; |
| 101 | /* EFFA0000 -> EFFFFFFF */ |
| 102 | reg = <0x007a0000 0x00060000>; |
| 103 | read-only; |
| 104 | }; |
| 105 | }; |
| 106 | |
| 107 | |
| 108 | }; |
| 109 | }; |
| 110 | |
| 111 | /include/ "sbc8548-post.dtsi" |