David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | // Copyright (C) 2018 Hangzhou C-SKY Microsystems co.,ltd. |
| 3 | |
| 4 | #include <linux/console.h> |
| 5 | #include <linux/memblock.h> |
| 6 | #include <linux/initrd.h> |
| 7 | #include <linux/of.h> |
| 8 | #include <linux/of_fdt.h> |
| 9 | #include <linux/start_kernel.h> |
| 10 | #include <linux/dma-contiguous.h> |
| 11 | #include <linux/screen_info.h> |
| 12 | #include <asm/sections.h> |
| 13 | #include <asm/mmu_context.h> |
| 14 | #include <asm/pgalloc.h> |
| 15 | |
| 16 | #ifdef CONFIG_DUMMY_CONSOLE |
| 17 | struct screen_info screen_info = { |
| 18 | .orig_video_lines = 30, |
| 19 | .orig_video_cols = 80, |
| 20 | .orig_video_mode = 0, |
| 21 | .orig_video_ega_bx = 0, |
| 22 | .orig_video_isVGA = 1, |
| 23 | .orig_video_points = 8 |
| 24 | }; |
| 25 | #endif |
| 26 | |
| 27 | phys_addr_t __init_memblock memblock_end_of_REG0(void) |
| 28 | { |
| 29 | return (memblock.memory.regions[0].base + |
| 30 | memblock.memory.regions[0].size); |
| 31 | } |
| 32 | |
| 33 | phys_addr_t __init_memblock memblock_start_of_REG1(void) |
| 34 | { |
| 35 | return memblock.memory.regions[1].base; |
| 36 | } |
| 37 | |
| 38 | size_t __init_memblock memblock_size_of_REG1(void) |
| 39 | { |
| 40 | return memblock.memory.regions[1].size; |
| 41 | } |
| 42 | |
| 43 | static void __init csky_memblock_init(void) |
| 44 | { |
| 45 | unsigned long zone_size[MAX_NR_ZONES]; |
| 46 | unsigned long zhole_size[MAX_NR_ZONES]; |
| 47 | signed long size; |
| 48 | |
| 49 | memblock_reserve(__pa(_stext), _end - _stext); |
| 50 | #ifdef CONFIG_BLK_DEV_INITRD |
| 51 | memblock_reserve(__pa(initrd_start), initrd_end - initrd_start); |
| 52 | #endif |
| 53 | |
| 54 | early_init_fdt_reserve_self(); |
| 55 | early_init_fdt_scan_reserved_mem(); |
| 56 | |
| 57 | memblock_dump_all(); |
| 58 | |
| 59 | memset(zone_size, 0, sizeof(zone_size)); |
| 60 | memset(zhole_size, 0, sizeof(zhole_size)); |
| 61 | |
| 62 | min_low_pfn = PFN_UP(memblock_start_of_DRAM()); |
| 63 | max_pfn = PFN_DOWN(memblock_end_of_DRAM()); |
| 64 | |
| 65 | max_low_pfn = PFN_UP(memblock_end_of_REG0()); |
| 66 | if (max_low_pfn == 0) |
| 67 | max_low_pfn = max_pfn; |
| 68 | |
| 69 | size = max_pfn - min_low_pfn; |
| 70 | |
| 71 | if (memblock.memory.cnt > 1) { |
| 72 | zone_size[ZONE_NORMAL] = |
| 73 | PFN_DOWN(memblock_start_of_REG1()) - min_low_pfn; |
| 74 | zhole_size[ZONE_NORMAL] = |
| 75 | PFN_DOWN(memblock_start_of_REG1()) - max_low_pfn; |
| 76 | } else { |
| 77 | if (size <= PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET)) |
| 78 | zone_size[ZONE_NORMAL] = max_pfn - min_low_pfn; |
| 79 | else { |
| 80 | zone_size[ZONE_NORMAL] = |
| 81 | PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET); |
| 82 | max_low_pfn = min_low_pfn + zone_size[ZONE_NORMAL]; |
| 83 | } |
| 84 | } |
| 85 | |
| 86 | #ifdef CONFIG_HIGHMEM |
| 87 | size = 0; |
| 88 | if (memblock.memory.cnt > 1) { |
| 89 | size = PFN_DOWN(memblock_size_of_REG1()); |
| 90 | highstart_pfn = PFN_DOWN(memblock_start_of_REG1()); |
| 91 | } else { |
| 92 | size = max_pfn - min_low_pfn - |
| 93 | PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET); |
| 94 | highstart_pfn = min_low_pfn + |
| 95 | PFN_DOWN(LOWMEM_LIMIT - PHYS_OFFSET_OFFSET); |
| 96 | } |
| 97 | |
| 98 | if (size > 0) |
| 99 | zone_size[ZONE_HIGHMEM] = size; |
| 100 | |
| 101 | highend_pfn = max_pfn; |
| 102 | #endif |
| 103 | memblock_set_current_limit(PFN_PHYS(max_low_pfn)); |
| 104 | |
| 105 | dma_contiguous_reserve(0); |
| 106 | |
| 107 | free_area_init_node(0, zone_size, min_low_pfn, zhole_size); |
| 108 | } |
| 109 | |
| 110 | void __init setup_arch(char **cmdline_p) |
| 111 | { |
| 112 | *cmdline_p = boot_command_line; |
| 113 | |
| 114 | console_verbose(); |
| 115 | |
| 116 | pr_info("Phys. mem: %ldMB\n", |
| 117 | (unsigned long) memblock_phys_mem_size()/1024/1024); |
| 118 | |
| 119 | init_mm.start_code = (unsigned long) _stext; |
| 120 | init_mm.end_code = (unsigned long) _etext; |
| 121 | init_mm.end_data = (unsigned long) _edata; |
| 122 | init_mm.brk = (unsigned long) _end; |
| 123 | |
| 124 | parse_early_param(); |
| 125 | |
| 126 | csky_memblock_init(); |
| 127 | |
| 128 | unflatten_and_copy_device_tree(); |
| 129 | |
| 130 | #ifdef CONFIG_SMP |
| 131 | setup_smp(); |
| 132 | #endif |
| 133 | |
| 134 | sparse_init(); |
| 135 | |
| 136 | #ifdef CONFIG_HIGHMEM |
| 137 | kmap_init(); |
| 138 | #endif |
| 139 | |
| 140 | #if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE) |
| 141 | conswitchp = &dummy_con; |
| 142 | #endif |
| 143 | } |
| 144 | |
| 145 | unsigned long va_pa_offset; |
| 146 | EXPORT_SYMBOL(va_pa_offset); |
| 147 | |
| 148 | asmlinkage __visible void __init csky_start(unsigned int unused, |
| 149 | void *dtb_start) |
| 150 | { |
| 151 | /* Clean up bss section */ |
| 152 | memset(__bss_start, 0, __bss_stop - __bss_start); |
| 153 | |
| 154 | va_pa_offset = read_mmu_msa0() & ~(SSEG_SIZE - 1); |
| 155 | |
| 156 | pre_trap_init(); |
| 157 | pre_mmu_init(); |
| 158 | |
| 159 | if (dtb_start == NULL) |
| 160 | early_init_dt_scan(__dtb_start); |
| 161 | else |
| 162 | early_init_dt_scan(dtb_start); |
| 163 | |
| 164 | start_kernel(); |
| 165 | |
| 166 | asm volatile("br .\n"); |
| 167 | } |