| David Brazdil | 0f672f6 | 2019-12-10 10:32:29 +0000 | [diff] [blame^] | 1 | // SPDX-License-Identifier: GPL-2.0-only |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2011-2012 Calxeda, Inc. |
| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 4 | */ |
| 5 | |
| 6 | /dts-v1/; |
| 7 | |
| 8 | /* First 4KB has pen for secondary cores. */ |
| 9 | /memreserve/ 0x00000000 0x0001000; |
| 10 | |
| 11 | / { |
| 12 | model = "Calxeda ECX-2000"; |
| 13 | compatible = "calxeda,ecx-2000"; |
| 14 | #address-cells = <2>; |
| 15 | #size-cells = <2>; |
| 16 | clock-ranges; |
| 17 | |
| 18 | cpus { |
| 19 | #address-cells = <1>; |
| 20 | #size-cells = <0>; |
| 21 | |
| 22 | cpu@0 { |
| 23 | compatible = "arm,cortex-a15"; |
| 24 | device_type = "cpu"; |
| 25 | reg = <0>; |
| 26 | clocks = <&a9pll>; |
| 27 | clock-names = "cpu"; |
| 28 | }; |
| 29 | |
| 30 | cpu@1 { |
| 31 | compatible = "arm,cortex-a15"; |
| 32 | device_type = "cpu"; |
| 33 | reg = <1>; |
| 34 | clocks = <&a9pll>; |
| 35 | clock-names = "cpu"; |
| 36 | }; |
| 37 | |
| 38 | cpu@2 { |
| 39 | compatible = "arm,cortex-a15"; |
| 40 | device_type = "cpu"; |
| 41 | reg = <2>; |
| 42 | clocks = <&a9pll>; |
| 43 | clock-names = "cpu"; |
| 44 | }; |
| 45 | |
| 46 | cpu@3 { |
| 47 | compatible = "arm,cortex-a15"; |
| 48 | device_type = "cpu"; |
| 49 | reg = <3>; |
| 50 | clocks = <&a9pll>; |
| 51 | clock-names = "cpu"; |
| 52 | }; |
| 53 | }; |
| 54 | |
| 55 | memory@0 { |
| 56 | name = "memory"; |
| 57 | device_type = "memory"; |
| 58 | reg = <0x00000000 0x00000000 0x00000000 0xff800000>; |
| 59 | }; |
| 60 | |
| 61 | memory@200000000 { |
| 62 | name = "memory"; |
| 63 | device_type = "memory"; |
| 64 | reg = <0x00000002 0x00000000 0x00000003 0x00000000>; |
| 65 | }; |
| 66 | |
| 67 | soc { |
| 68 | ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>; |
| 69 | |
| 70 | timer { |
| 71 | compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>, |
| 72 | <1 14 0xf08>, |
| 73 | <1 11 0xf08>, |
| 74 | <1 10 0xf08>; |
| 75 | }; |
| 76 | |
| 77 | memory-controller@fff00000 { |
| 78 | compatible = "calxeda,ecx-2000-ddr-ctrl"; |
| 79 | reg = <0xfff00000 0x1000>; |
| 80 | interrupts = <0 91 4>; |
| 81 | }; |
| 82 | |
| 83 | intc: interrupt-controller@fff11000 { |
| 84 | compatible = "arm,cortex-a15-gic"; |
| 85 | #interrupt-cells = <3>; |
| 86 | #size-cells = <0>; |
| 87 | #address-cells = <1>; |
| 88 | interrupt-controller; |
| 89 | interrupts = <1 9 0xf04>; |
| 90 | reg = <0xfff11000 0x1000>, |
| 91 | <0xfff12000 0x2000>, |
| 92 | <0xfff14000 0x2000>, |
| 93 | <0xfff16000 0x2000>; |
| 94 | }; |
| 95 | |
| 96 | pmu { |
| 97 | compatible = "arm,cortex-a9-pmu"; |
| 98 | interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>; |
| 99 | }; |
| 100 | }; |
| 101 | }; |
| 102 | |
| 103 | /include/ "ecx-common.dtsi" |