blob: 8cd81dc0cc7273728680451fef4b4dd67c24b246 [file] [log] [blame]
David Brazdil0f672f62019-12-10 10:32:29 +00001// SPDX-License-Identifier: GPL-2.0-only
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002/*
3 * Copyright (C) 2015 Jablotron s.r.o. -- http://www.jablotron.com/
4 * Author: Rostislav Lisovy <lisovy@jablotron.cz>
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00005 */
6/dts-v1/;
7#include "am335x-chilisom.dtsi"
8
9/ {
10 model = "AM335x Chiliboard";
11 compatible = "grinn,am335x-chiliboard", "grinn,am335x-chilisom",
12 "ti,am33xx";
13
David Brazdil0f672f62019-12-10 10:32:29 +000014 chosen {
15 stdout-path = &uart0;
16 };
17
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000018 leds {
19 compatible = "gpio-leds";
20 pinctrl-names = "default";
21 pinctrl-0 = <&led_gpio_pins>;
22
23 led0 {
24 label = "led0";
25 gpios = <&gpio3 7 GPIO_ACTIVE_LOW>;
26 default-state = "keep";
27 linux,default-trigger = "heartbeat";
28 };
29
30 led1 {
31 label = "led1";
32 gpios = <&gpio3 8 GPIO_ACTIVE_LOW>;
33 default-state = "keep";
34 };
35 };
36};
37
38&am33xx_pinmux {
39 uart0_pins: pinmux_uart0_pins {
40 pinctrl-single,pins = <
David Brazdil0f672f62019-12-10 10:32:29 +000041 AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
42 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000043 >;
44 };
45
46 cpsw_default: cpsw_default {
47 pinctrl-single,pins = <
48 /* Slave 1 */
David Brazdil0f672f62019-12-10 10:32:29 +000049 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE1)
50 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE1)
51 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
52 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
53 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
54 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE1)
55 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE1)
56 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000057 >;
58 };
59
60 cpsw_sleep: cpsw_sleep {
61 pinctrl-single,pins = <
62 /* Slave 1 reset value */
David Brazdil0f672f62019-12-10 10:32:29 +000063 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7)
64 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
65 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
66 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
67 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
68 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
69 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
70 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
71 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000072 >;
73 };
74
75 davinci_mdio_default: davinci_mdio_default {
76 pinctrl-single,pins = <
77 /* mdio_data.mdio_data */
David Brazdil0f672f62019-12-10 10:32:29 +000078 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000079 /* mdio_clk.mdio_clk */
David Brazdil0f672f62019-12-10 10:32:29 +000080 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000081 >;
82 };
83
84 davinci_mdio_sleep: davinci_mdio_sleep {
85 pinctrl-single,pins = <
86 /* MDIO reset value */
David Brazdil0f672f62019-12-10 10:32:29 +000087 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
88 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000089 >;
90 };
91
92 usb1_drvvbus: usb1_drvvbus {
93 pinctrl-single,pins = <
David Brazdil0f672f62019-12-10 10:32:29 +000094 AM33XX_PADCONF(AM335X_PIN_USB1_DRVVBUS, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000095 >;
96 };
97
98 sd_pins: pinmux_sd_card {
99 pinctrl-single,pins = <
David Brazdil0f672f62019-12-10 10:32:29 +0000100 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT, MUX_MODE0)
101 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT, MUX_MODE0)
102 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT, MUX_MODE0)
103 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT, MUX_MODE0)
104 AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT, MUX_MODE0)
105 AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT, MUX_MODE0)
106 AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* spi0_cs1.gpio0_6 */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000107 >;
108 };
109
110 led_gpio_pins: led_gpio_pins {
111 pinctrl-single,pins = <
David Brazdil0f672f62019-12-10 10:32:29 +0000112 AM33XX_PADCONF(AM335X_PIN_EMU0, PIN_OUTPUT, MUX_MODE7) /* emu0.gpio3_7 */
113 AM33XX_PADCONF(AM335X_PIN_EMU1, PIN_OUTPUT, MUX_MODE7) /* emu1.gpio3_8 */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000114 >;
115 };
116};
117
118&uart0 {
119 pinctrl-names = "default";
120 pinctrl-0 = <&uart0_pins>;
121
122 status = "okay";
123};
124
125&ldo4_reg {
126 regulator-min-microvolt = <3300000>;
127 regulator-max-microvolt = <3300000>;
128};
129
130/* Ethernet */
131&mac {
132 slaves = <1>;
133 pinctrl-names = "default", "sleep";
134 pinctrl-0 = <&cpsw_default>;
135 pinctrl-1 = <&cpsw_sleep>;
136 status = "okay";
137};
138
139&davinci_mdio {
140 pinctrl-names = "default", "sleep";
141 pinctrl-0 = <&davinci_mdio_default>;
142 pinctrl-1 = <&davinci_mdio_sleep>;
143 status = "okay";
David Brazdil0f672f62019-12-10 10:32:29 +0000144
145 ethphy0: ethernet-phy@0 {
146 reg = <0>;
147 };
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000148};
149
150&cpsw_emac0 {
David Brazdil0f672f62019-12-10 10:32:29 +0000151 phy-handle = <&ethphy0>;
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000152 phy-mode = "rmii";
153};
154
Andrew Scullb4b6d4a2019-01-02 15:54:55 +0000155/* USB */
156&usb {
157 status = "okay";
158};
159
160&usb_ctrl_mod {
161 status = "okay";
162};
163
164&usb1_phy {
165 status = "okay";
166};
167
168&usb1 {
169 pinctrl-names = "default";
170 pinctrl-0 = <&usb1_drvvbus>;
171
172 status = "okay";
173 dr_mode = "host";
174};
175
176&cppi41dma {
177 status = "okay";
178};
179
180/* microSD */
181&mmc1 {
182 pinctrl-names = "default";
183 pinctrl-0 = <&sd_pins>;
184 vmmc-supply = <&ldo4_reg>;
185 bus-width = <0x4>;
186 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
187 status = "okay";
188};
189
190&tps {
191 interrupt-parent = <&intc>;
192 interrupts = <7>; /* NNMI */
193
194 charger {
195 status = "okay";
196 };
197
198 pwrbutton {
199 status = "okay";
200 };
201};