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Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * ld script for the x86 kernel
4 *
5 * Historic 32-bit version written by Martin Mares <mj@atrey.karlin.mff.cuni.cz>
6 *
7 * Modernisation, unification and other changes and fixes:
8 * Copyright (C) 2007-2009 Sam Ravnborg <sam@ravnborg.org>
9 *
10 *
11 * Don't define absolute symbols until and unless you know that symbol
12 * value is should remain constant even if kernel image is relocated
13 * at run time. Absolute symbols are not relocated. If symbol value should
14 * change if kernel is relocated, make the symbol section relative and
15 * put it inside the section definition.
16 */
17
18#ifdef CONFIG_X86_32
19#define LOAD_OFFSET __PAGE_OFFSET
20#else
21#define LOAD_OFFSET __START_KERNEL_map
22#endif
23
24#include <asm-generic/vmlinux.lds.h>
25#include <asm/asm-offsets.h>
26#include <asm/thread_info.h>
27#include <asm/page_types.h>
28#include <asm/orc_lookup.h>
29#include <asm/cache.h>
30#include <asm/boot.h>
31
32#undef i386 /* in case the preprocessor is a 32bit one */
33
34OUTPUT_FORMAT(CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT, CONFIG_OUTPUT_FORMAT)
35
36#ifdef CONFIG_X86_32
37OUTPUT_ARCH(i386)
38ENTRY(phys_startup_32)
39jiffies = jiffies_64;
40#else
41OUTPUT_ARCH(i386:x86-64)
42ENTRY(phys_startup_64)
43jiffies_64 = jiffies;
44#endif
45
46#if defined(CONFIG_X86_64)
47/*
48 * On 64-bit, align RODATA to 2MB so we retain large page mappings for
49 * boundaries spanning kernel text, rodata and data sections.
50 *
51 * However, kernel identity mappings will have different RWX permissions
52 * to the pages mapping to text and to the pages padding (which are freed) the
53 * text section. Hence kernel identity mappings will be broken to smaller
54 * pages. For 64-bit, kernel text and kernel identity mappings are different,
55 * so we can enable protection checks as well as retain 2MB large page
56 * mappings for kernel text.
57 */
58#define X86_ALIGN_RODATA_BEGIN . = ALIGN(HPAGE_SIZE);
59
60#define X86_ALIGN_RODATA_END \
61 . = ALIGN(HPAGE_SIZE); \
62 __end_rodata_hpage_align = .; \
63 __end_rodata_aligned = .;
64
65#define ALIGN_ENTRY_TEXT_BEGIN . = ALIGN(PMD_SIZE);
66#define ALIGN_ENTRY_TEXT_END . = ALIGN(PMD_SIZE);
67
68/*
69 * This section contains data which will be mapped as decrypted. Memory
70 * encryption operates on a page basis. Make this section PMD-aligned
71 * to avoid splitting the pages while mapping the section early.
72 *
73 * Note: We use a separate section so that only this section gets
74 * decrypted to avoid exposing more than we wish.
75 */
76#define BSS_DECRYPTED \
77 . = ALIGN(PMD_SIZE); \
78 __start_bss_decrypted = .; \
79 *(.bss..decrypted); \
80 . = ALIGN(PAGE_SIZE); \
81 __start_bss_decrypted_unused = .; \
82 . = ALIGN(PMD_SIZE); \
83 __end_bss_decrypted = .; \
84
85#else
86
87#define X86_ALIGN_RODATA_BEGIN
88#define X86_ALIGN_RODATA_END \
89 . = ALIGN(PAGE_SIZE); \
90 __end_rodata_aligned = .;
91
92#define ALIGN_ENTRY_TEXT_BEGIN
93#define ALIGN_ENTRY_TEXT_END
94#define BSS_DECRYPTED
95
96#endif
97
98PHDRS {
99 text PT_LOAD FLAGS(5); /* R_E */
100 data PT_LOAD FLAGS(6); /* RW_ */
101#ifdef CONFIG_X86_64
102#ifdef CONFIG_SMP
103 percpu PT_LOAD FLAGS(6); /* RW_ */
104#endif
105 init PT_LOAD FLAGS(7); /* RWE */
106#endif
107 note PT_NOTE FLAGS(0); /* ___ */
108}
109
110SECTIONS
111{
112#ifdef CONFIG_X86_32
113 . = LOAD_OFFSET + LOAD_PHYSICAL_ADDR;
114 phys_startup_32 = ABSOLUTE(startup_32 - LOAD_OFFSET);
115#else
116 . = __START_KERNEL;
117 phys_startup_64 = ABSOLUTE(startup_64 - LOAD_OFFSET);
118#endif
119
120 /* Text and read-only data */
121 .text : AT(ADDR(.text) - LOAD_OFFSET) {
122 _text = .;
123 _stext = .;
124 /* bootstrapping code */
125 HEAD_TEXT
126 TEXT_TEXT
127 SCHED_TEXT
128 CPUIDLE_TEXT
129 LOCK_TEXT
130 KPROBES_TEXT
131 ALIGN_ENTRY_TEXT_BEGIN
132 ENTRY_TEXT
133 IRQENTRY_TEXT
134 ALIGN_ENTRY_TEXT_END
135 SOFTIRQENTRY_TEXT
136 *(.fixup)
137 *(.gnu.warning)
138
139#ifdef CONFIG_X86_64
140 . = ALIGN(PAGE_SIZE);
141 __entry_trampoline_start = .;
142 _entry_trampoline = .;
143 *(.entry_trampoline)
144 . = ALIGN(PAGE_SIZE);
145 __entry_trampoline_end = .;
146 ASSERT(. - _entry_trampoline == PAGE_SIZE, "entry trampoline is too big");
147#endif
148
149#ifdef CONFIG_RETPOLINE
150 __indirect_thunk_start = .;
151 *(.text.__x86.indirect_thunk)
152 __indirect_thunk_end = .;
153#endif
154
155 /* End of text section */
156 _etext = .;
157 } :text = 0x9090
158
159 NOTES :text :note
160
161 EXCEPTION_TABLE(16) :text = 0x9090
162
163 /* .text should occupy whole number of pages */
164 . = ALIGN(PAGE_SIZE);
165 X86_ALIGN_RODATA_BEGIN
166 RO_DATA(PAGE_SIZE)
167 X86_ALIGN_RODATA_END
168
169 /* Data */
170 .data : AT(ADDR(.data) - LOAD_OFFSET) {
171 /* Start of data section */
172 _sdata = .;
173
174 /* init_task */
175 INIT_TASK_DATA(THREAD_SIZE)
176
177#ifdef CONFIG_X86_32
178 /* 32 bit has nosave before _edata */
179 NOSAVE_DATA
180#endif
181
182 PAGE_ALIGNED_DATA(PAGE_SIZE)
183
184 CACHELINE_ALIGNED_DATA(L1_CACHE_BYTES)
185
186 DATA_DATA
187 CONSTRUCTORS
188
189 /* rarely changed data like cpu maps */
190 READ_MOSTLY_DATA(INTERNODE_CACHE_BYTES)
191
192 /* End of data section */
193 _edata = .;
194 } :data
195
196 BUG_TABLE
197
198 ORC_UNWIND_TABLE
199
200 . = ALIGN(PAGE_SIZE);
201 __vvar_page = .;
202
203 .vvar : AT(ADDR(.vvar) - LOAD_OFFSET) {
204 /* work around gold bug 13023 */
205 __vvar_beginning_hack = .;
206
207 /* Place all vvars at the offsets in asm/vvar.h. */
208#define EMIT_VVAR(name, offset) \
209 . = __vvar_beginning_hack + offset; \
210 *(.vvar_ ## name)
211#define __VVAR_KERNEL_LDS
212#include <asm/vvar.h>
213#undef __VVAR_KERNEL_LDS
214#undef EMIT_VVAR
215
216 /*
217 * Pad the rest of the page with zeros. Otherwise the loader
218 * can leave garbage here.
219 */
220 . = __vvar_beginning_hack + PAGE_SIZE;
221 } :data
222
223 . = ALIGN(__vvar_page + PAGE_SIZE, PAGE_SIZE);
224
225 /* Init code and data - will be freed after init */
226 . = ALIGN(PAGE_SIZE);
227 .init.begin : AT(ADDR(.init.begin) - LOAD_OFFSET) {
228 __init_begin = .; /* paired with __init_end */
229 }
230
231#if defined(CONFIG_X86_64) && defined(CONFIG_SMP)
232 /*
233 * percpu offsets are zero-based on SMP. PERCPU_VADDR() changes the
234 * output PHDR, so the next output section - .init.text - should
235 * start another segment - init.
236 */
237 PERCPU_VADDR(INTERNODE_CACHE_BYTES, 0, :percpu)
238 ASSERT(SIZEOF(.data..percpu) < CONFIG_PHYSICAL_START,
239 "per-CPU data too large - increase CONFIG_PHYSICAL_START")
240#endif
241
242 INIT_TEXT_SECTION(PAGE_SIZE)
243#ifdef CONFIG_X86_64
244 :init
245#endif
246
247 /*
248 * Section for code used exclusively before alternatives are run. All
249 * references to such code must be patched out by alternatives, normally
250 * by using X86_FEATURE_ALWAYS CPU feature bit.
251 *
252 * See static_cpu_has() for an example.
253 */
254 .altinstr_aux : AT(ADDR(.altinstr_aux) - LOAD_OFFSET) {
255 *(.altinstr_aux)
256 }
257
258 INIT_DATA_SECTION(16)
259
260 .x86_cpu_dev.init : AT(ADDR(.x86_cpu_dev.init) - LOAD_OFFSET) {
261 __x86_cpu_dev_start = .;
262 *(.x86_cpu_dev.init)
263 __x86_cpu_dev_end = .;
264 }
265
266#ifdef CONFIG_X86_INTEL_MID
267 .x86_intel_mid_dev.init : AT(ADDR(.x86_intel_mid_dev.init) - \
268 LOAD_OFFSET) {
269 __x86_intel_mid_dev_start = .;
270 *(.x86_intel_mid_dev.init)
271 __x86_intel_mid_dev_end = .;
272 }
273#endif
274
275 /*
276 * start address and size of operations which during runtime
277 * can be patched with virtualization friendly instructions or
278 * baremetal native ones. Think page table operations.
279 * Details in paravirt_types.h
280 */
281 . = ALIGN(8);
282 .parainstructions : AT(ADDR(.parainstructions) - LOAD_OFFSET) {
283 __parainstructions = .;
284 *(.parainstructions)
285 __parainstructions_end = .;
286 }
287
288 /*
289 * struct alt_inst entries. From the header (alternative.h):
290 * "Alternative instructions for different CPU types or capabilities"
291 * Think locking instructions on spinlocks.
292 */
293 . = ALIGN(8);
294 .altinstructions : AT(ADDR(.altinstructions) - LOAD_OFFSET) {
295 __alt_instructions = .;
296 *(.altinstructions)
297 __alt_instructions_end = .;
298 }
299
300 /*
301 * And here are the replacement instructions. The linker sticks
302 * them as binary blobs. The .altinstructions has enough data to
303 * get the address and the length of them to patch the kernel safely.
304 */
305 .altinstr_replacement : AT(ADDR(.altinstr_replacement) - LOAD_OFFSET) {
306 *(.altinstr_replacement)
307 }
308
309 /*
310 * struct iommu_table_entry entries are injected in this section.
311 * It is an array of IOMMUs which during run time gets sorted depending
312 * on its dependency order. After rootfs_initcall is complete
313 * this section can be safely removed.
314 */
315 .iommu_table : AT(ADDR(.iommu_table) - LOAD_OFFSET) {
316 __iommu_table = .;
317 *(.iommu_table)
318 __iommu_table_end = .;
319 }
320
321 . = ALIGN(8);
322 .apicdrivers : AT(ADDR(.apicdrivers) - LOAD_OFFSET) {
323 __apicdrivers = .;
324 *(.apicdrivers);
325 __apicdrivers_end = .;
326 }
327
328 . = ALIGN(8);
329 /*
330 * .exit.text is discard at runtime, not link time, to deal with
331 * references from .altinstructions and .eh_frame
332 */
333 .exit.text : AT(ADDR(.exit.text) - LOAD_OFFSET) {
334 EXIT_TEXT
335 }
336
337 .exit.data : AT(ADDR(.exit.data) - LOAD_OFFSET) {
338 EXIT_DATA
339 }
340
341#if !defined(CONFIG_X86_64) || !defined(CONFIG_SMP)
342 PERCPU_SECTION(INTERNODE_CACHE_BYTES)
343#endif
344
345 . = ALIGN(PAGE_SIZE);
346
347 /* freed after init ends here */
348 .init.end : AT(ADDR(.init.end) - LOAD_OFFSET) {
349 __init_end = .;
350 }
351
352 /*
353 * smp_locks might be freed after init
354 * start/end must be page aligned
355 */
356 . = ALIGN(PAGE_SIZE);
357 .smp_locks : AT(ADDR(.smp_locks) - LOAD_OFFSET) {
358 __smp_locks = .;
359 *(.smp_locks)
360 . = ALIGN(PAGE_SIZE);
361 __smp_locks_end = .;
362 }
363
364#ifdef CONFIG_X86_64
365 .data_nosave : AT(ADDR(.data_nosave) - LOAD_OFFSET) {
366 NOSAVE_DATA
367 }
368#endif
369
370 /* BSS */
371 . = ALIGN(PAGE_SIZE);
372 .bss : AT(ADDR(.bss) - LOAD_OFFSET) {
373 __bss_start = .;
374 *(.bss..page_aligned)
375 *(.bss)
376 BSS_DECRYPTED
377 . = ALIGN(PAGE_SIZE);
378 __bss_stop = .;
379 }
380
381 . = ALIGN(PAGE_SIZE);
382 .brk : AT(ADDR(.brk) - LOAD_OFFSET) {
383 __brk_base = .;
384 . += 64 * 1024; /* 64k alignment slop space */
385 *(.brk_reservation) /* areas brk users have reserved */
386 __brk_limit = .;
387 }
388
389 . = ALIGN(PAGE_SIZE); /* keep VO_INIT_SIZE page aligned */
390 _end = .;
391
392 STABS_DEBUG
393 DWARF_DEBUG
394
395 /* Sections to be discarded */
396 DISCARDS
397 /DISCARD/ : {
398 *(.eh_frame)
399 }
400}
401
402
403#ifdef CONFIG_X86_32
404/*
405 * The ASSERT() sink to . is intentional, for binutils 2.14 compatibility:
406 */
407. = ASSERT((_end - LOAD_OFFSET <= KERNEL_IMAGE_SIZE),
408 "kernel image bigger than KERNEL_IMAGE_SIZE");
409#else
410/*
411 * Per-cpu symbols which need to be offset from __per_cpu_load
412 * for the boot processor.
413 */
414#define INIT_PER_CPU(x) init_per_cpu__##x = x + __per_cpu_load
415INIT_PER_CPU(gdt_page);
416INIT_PER_CPU(irq_stack_union);
417
418/*
419 * Build-time check on the image size:
420 */
421. = ASSERT((_end - _text <= KERNEL_IMAGE_SIZE),
422 "kernel image bigger than KERNEL_IMAGE_SIZE");
423
424#ifdef CONFIG_SMP
425. = ASSERT((irq_stack_union == 0),
426 "irq_stack_union is not at start of per-cpu area");
427#endif
428
429#endif /* CONFIG_X86_32 */
430
431#ifdef CONFIG_KEXEC_CORE
432#include <asm/kexec.h>
433
434. = ASSERT(kexec_control_code_size <= KEXEC_CONTROL_CODE_MAX_SIZE,
435 "kexec control code size is too big");
436#endif
437