Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This program is free software; you can redistribute it and/or modify |
| 3 | * it under the terms of the GNU General Public License, version 2, as |
| 4 | * published by the Free Software Foundation. |
| 5 | * |
| 6 | * This program is distributed in the hope that it will be useful, |
| 7 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 8 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 9 | * GNU General Public License for more details. |
| 10 | * |
| 11 | * You should have received a copy of the GNU General Public License |
| 12 | * along with this program; if not, write to the Free Software |
| 13 | * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. |
| 14 | * |
| 15 | * Copyright IBM Corp. 2007 |
| 16 | * |
| 17 | * Authors: Hollis Blanchard <hollisb@us.ibm.com> |
| 18 | * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> |
| 19 | */ |
| 20 | |
| 21 | #include <linux/errno.h> |
| 22 | #include <linux/err.h> |
| 23 | #include <linux/kvm_host.h> |
| 24 | #include <linux/vmalloc.h> |
| 25 | #include <linux/hrtimer.h> |
| 26 | #include <linux/sched/signal.h> |
| 27 | #include <linux/fs.h> |
| 28 | #include <linux/slab.h> |
| 29 | #include <linux/file.h> |
| 30 | #include <linux/module.h> |
| 31 | #include <linux/irqbypass.h> |
| 32 | #include <linux/kvm_irqfd.h> |
| 33 | #include <asm/cputable.h> |
| 34 | #include <linux/uaccess.h> |
| 35 | #include <asm/kvm_ppc.h> |
| 36 | #include <asm/cputhreads.h> |
| 37 | #include <asm/irqflags.h> |
| 38 | #include <asm/iommu.h> |
| 39 | #include <asm/switch_to.h> |
| 40 | #include <asm/xive.h> |
| 41 | #ifdef CONFIG_PPC_PSERIES |
| 42 | #include <asm/hvcall.h> |
| 43 | #include <asm/plpar_wrappers.h> |
| 44 | #endif |
| 45 | |
| 46 | #include "timing.h" |
| 47 | #include "irq.h" |
| 48 | #include "../mm/mmu_decl.h" |
| 49 | |
| 50 | #define CREATE_TRACE_POINTS |
| 51 | #include "trace.h" |
| 52 | |
| 53 | struct kvmppc_ops *kvmppc_hv_ops; |
| 54 | EXPORT_SYMBOL_GPL(kvmppc_hv_ops); |
| 55 | struct kvmppc_ops *kvmppc_pr_ops; |
| 56 | EXPORT_SYMBOL_GPL(kvmppc_pr_ops); |
| 57 | |
| 58 | |
| 59 | int kvm_arch_vcpu_runnable(struct kvm_vcpu *v) |
| 60 | { |
| 61 | return !!(v->arch.pending_exceptions) || kvm_request_pending(v); |
| 62 | } |
| 63 | |
| 64 | bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu) |
| 65 | { |
| 66 | return false; |
| 67 | } |
| 68 | |
| 69 | int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu) |
| 70 | { |
| 71 | return 1; |
| 72 | } |
| 73 | |
| 74 | /* |
| 75 | * Common checks before entering the guest world. Call with interrupts |
| 76 | * disabled. |
| 77 | * |
| 78 | * returns: |
| 79 | * |
| 80 | * == 1 if we're ready to go into guest state |
| 81 | * <= 0 if we need to go back to the host with return value |
| 82 | */ |
| 83 | int kvmppc_prepare_to_enter(struct kvm_vcpu *vcpu) |
| 84 | { |
| 85 | int r; |
| 86 | |
| 87 | WARN_ON(irqs_disabled()); |
| 88 | hard_irq_disable(); |
| 89 | |
| 90 | while (true) { |
| 91 | if (need_resched()) { |
| 92 | local_irq_enable(); |
| 93 | cond_resched(); |
| 94 | hard_irq_disable(); |
| 95 | continue; |
| 96 | } |
| 97 | |
| 98 | if (signal_pending(current)) { |
| 99 | kvmppc_account_exit(vcpu, SIGNAL_EXITS); |
| 100 | vcpu->run->exit_reason = KVM_EXIT_INTR; |
| 101 | r = -EINTR; |
| 102 | break; |
| 103 | } |
| 104 | |
| 105 | vcpu->mode = IN_GUEST_MODE; |
| 106 | |
| 107 | /* |
| 108 | * Reading vcpu->requests must happen after setting vcpu->mode, |
| 109 | * so we don't miss a request because the requester sees |
| 110 | * OUTSIDE_GUEST_MODE and assumes we'll be checking requests |
| 111 | * before next entering the guest (and thus doesn't IPI). |
| 112 | * This also orders the write to mode from any reads |
| 113 | * to the page tables done while the VCPU is running. |
| 114 | * Please see the comment in kvm_flush_remote_tlbs. |
| 115 | */ |
| 116 | smp_mb(); |
| 117 | |
| 118 | if (kvm_request_pending(vcpu)) { |
| 119 | /* Make sure we process requests preemptable */ |
| 120 | local_irq_enable(); |
| 121 | trace_kvm_check_requests(vcpu); |
| 122 | r = kvmppc_core_check_requests(vcpu); |
| 123 | hard_irq_disable(); |
| 124 | if (r > 0) |
| 125 | continue; |
| 126 | break; |
| 127 | } |
| 128 | |
| 129 | if (kvmppc_core_prepare_to_enter(vcpu)) { |
| 130 | /* interrupts got enabled in between, so we |
| 131 | are back at square 1 */ |
| 132 | continue; |
| 133 | } |
| 134 | |
| 135 | guest_enter_irqoff(); |
| 136 | return 1; |
| 137 | } |
| 138 | |
| 139 | /* return to host */ |
| 140 | local_irq_enable(); |
| 141 | return r; |
| 142 | } |
| 143 | EXPORT_SYMBOL_GPL(kvmppc_prepare_to_enter); |
| 144 | |
| 145 | #if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE) |
| 146 | static void kvmppc_swab_shared(struct kvm_vcpu *vcpu) |
| 147 | { |
| 148 | struct kvm_vcpu_arch_shared *shared = vcpu->arch.shared; |
| 149 | int i; |
| 150 | |
| 151 | shared->sprg0 = swab64(shared->sprg0); |
| 152 | shared->sprg1 = swab64(shared->sprg1); |
| 153 | shared->sprg2 = swab64(shared->sprg2); |
| 154 | shared->sprg3 = swab64(shared->sprg3); |
| 155 | shared->srr0 = swab64(shared->srr0); |
| 156 | shared->srr1 = swab64(shared->srr1); |
| 157 | shared->dar = swab64(shared->dar); |
| 158 | shared->msr = swab64(shared->msr); |
| 159 | shared->dsisr = swab32(shared->dsisr); |
| 160 | shared->int_pending = swab32(shared->int_pending); |
| 161 | for (i = 0; i < ARRAY_SIZE(shared->sr); i++) |
| 162 | shared->sr[i] = swab32(shared->sr[i]); |
| 163 | } |
| 164 | #endif |
| 165 | |
| 166 | int kvmppc_kvm_pv(struct kvm_vcpu *vcpu) |
| 167 | { |
| 168 | int nr = kvmppc_get_gpr(vcpu, 11); |
| 169 | int r; |
| 170 | unsigned long __maybe_unused param1 = kvmppc_get_gpr(vcpu, 3); |
| 171 | unsigned long __maybe_unused param2 = kvmppc_get_gpr(vcpu, 4); |
| 172 | unsigned long __maybe_unused param3 = kvmppc_get_gpr(vcpu, 5); |
| 173 | unsigned long __maybe_unused param4 = kvmppc_get_gpr(vcpu, 6); |
| 174 | unsigned long r2 = 0; |
| 175 | |
| 176 | if (!(kvmppc_get_msr(vcpu) & MSR_SF)) { |
| 177 | /* 32 bit mode */ |
| 178 | param1 &= 0xffffffff; |
| 179 | param2 &= 0xffffffff; |
| 180 | param3 &= 0xffffffff; |
| 181 | param4 &= 0xffffffff; |
| 182 | } |
| 183 | |
| 184 | switch (nr) { |
| 185 | case KVM_HCALL_TOKEN(KVM_HC_PPC_MAP_MAGIC_PAGE): |
| 186 | { |
| 187 | #if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE) |
| 188 | /* Book3S can be little endian, find it out here */ |
| 189 | int shared_big_endian = true; |
| 190 | if (vcpu->arch.intr_msr & MSR_LE) |
| 191 | shared_big_endian = false; |
| 192 | if (shared_big_endian != vcpu->arch.shared_big_endian) |
| 193 | kvmppc_swab_shared(vcpu); |
| 194 | vcpu->arch.shared_big_endian = shared_big_endian; |
| 195 | #endif |
| 196 | |
| 197 | if (!(param2 & MAGIC_PAGE_FLAG_NOT_MAPPED_NX)) { |
| 198 | /* |
| 199 | * Older versions of the Linux magic page code had |
| 200 | * a bug where they would map their trampoline code |
| 201 | * NX. If that's the case, remove !PR NX capability. |
| 202 | */ |
| 203 | vcpu->arch.disable_kernel_nx = true; |
| 204 | kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu); |
| 205 | } |
| 206 | |
| 207 | vcpu->arch.magic_page_pa = param1 & ~0xfffULL; |
| 208 | vcpu->arch.magic_page_ea = param2 & ~0xfffULL; |
| 209 | |
| 210 | #ifdef CONFIG_PPC_64K_PAGES |
| 211 | /* |
| 212 | * Make sure our 4k magic page is in the same window of a 64k |
| 213 | * page within the guest and within the host's page. |
| 214 | */ |
| 215 | if ((vcpu->arch.magic_page_pa & 0xf000) != |
| 216 | ((ulong)vcpu->arch.shared & 0xf000)) { |
| 217 | void *old_shared = vcpu->arch.shared; |
| 218 | ulong shared = (ulong)vcpu->arch.shared; |
| 219 | void *new_shared; |
| 220 | |
| 221 | shared &= PAGE_MASK; |
| 222 | shared |= vcpu->arch.magic_page_pa & 0xf000; |
| 223 | new_shared = (void*)shared; |
| 224 | memcpy(new_shared, old_shared, 0x1000); |
| 225 | vcpu->arch.shared = new_shared; |
| 226 | } |
| 227 | #endif |
| 228 | |
| 229 | r2 = KVM_MAGIC_FEAT_SR | KVM_MAGIC_FEAT_MAS0_TO_SPRG7; |
| 230 | |
| 231 | r = EV_SUCCESS; |
| 232 | break; |
| 233 | } |
| 234 | case KVM_HCALL_TOKEN(KVM_HC_FEATURES): |
| 235 | r = EV_SUCCESS; |
| 236 | #if defined(CONFIG_PPC_BOOK3S) || defined(CONFIG_KVM_E500V2) |
| 237 | r2 |= (1 << KVM_FEATURE_MAGIC_PAGE); |
| 238 | #endif |
| 239 | |
| 240 | /* Second return value is in r4 */ |
| 241 | break; |
| 242 | case EV_HCALL_TOKEN(EV_IDLE): |
| 243 | r = EV_SUCCESS; |
| 244 | kvm_vcpu_block(vcpu); |
| 245 | kvm_clear_request(KVM_REQ_UNHALT, vcpu); |
| 246 | break; |
| 247 | default: |
| 248 | r = EV_UNIMPLEMENTED; |
| 249 | break; |
| 250 | } |
| 251 | |
| 252 | kvmppc_set_gpr(vcpu, 4, r2); |
| 253 | |
| 254 | return r; |
| 255 | } |
| 256 | EXPORT_SYMBOL_GPL(kvmppc_kvm_pv); |
| 257 | |
| 258 | int kvmppc_sanity_check(struct kvm_vcpu *vcpu) |
| 259 | { |
| 260 | int r = false; |
| 261 | |
| 262 | /* We have to know what CPU to virtualize */ |
| 263 | if (!vcpu->arch.pvr) |
| 264 | goto out; |
| 265 | |
| 266 | /* PAPR only works with book3s_64 */ |
| 267 | if ((vcpu->arch.cpu_type != KVM_CPU_3S_64) && vcpu->arch.papr_enabled) |
| 268 | goto out; |
| 269 | |
| 270 | /* HV KVM can only do PAPR mode for now */ |
| 271 | if (!vcpu->arch.papr_enabled && is_kvmppc_hv_enabled(vcpu->kvm)) |
| 272 | goto out; |
| 273 | |
| 274 | #ifdef CONFIG_KVM_BOOKE_HV |
| 275 | if (!cpu_has_feature(CPU_FTR_EMB_HV)) |
| 276 | goto out; |
| 277 | #endif |
| 278 | |
| 279 | r = true; |
| 280 | |
| 281 | out: |
| 282 | vcpu->arch.sane = r; |
| 283 | return r ? 0 : -EINVAL; |
| 284 | } |
| 285 | EXPORT_SYMBOL_GPL(kvmppc_sanity_check); |
| 286 | |
| 287 | int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu) |
| 288 | { |
| 289 | enum emulation_result er; |
| 290 | int r; |
| 291 | |
| 292 | er = kvmppc_emulate_loadstore(vcpu); |
| 293 | switch (er) { |
| 294 | case EMULATE_DONE: |
| 295 | /* Future optimization: only reload non-volatiles if they were |
| 296 | * actually modified. */ |
| 297 | r = RESUME_GUEST_NV; |
| 298 | break; |
| 299 | case EMULATE_AGAIN: |
| 300 | r = RESUME_GUEST; |
| 301 | break; |
| 302 | case EMULATE_DO_MMIO: |
| 303 | run->exit_reason = KVM_EXIT_MMIO; |
| 304 | /* We must reload nonvolatiles because "update" load/store |
| 305 | * instructions modify register state. */ |
| 306 | /* Future optimization: only reload non-volatiles if they were |
| 307 | * actually modified. */ |
| 308 | r = RESUME_HOST_NV; |
| 309 | break; |
| 310 | case EMULATE_FAIL: |
| 311 | { |
| 312 | u32 last_inst; |
| 313 | |
| 314 | kvmppc_get_last_inst(vcpu, INST_GENERIC, &last_inst); |
| 315 | /* XXX Deliver Program interrupt to guest. */ |
| 316 | pr_emerg("%s: emulation failed (%08x)\n", __func__, last_inst); |
| 317 | r = RESUME_HOST; |
| 318 | break; |
| 319 | } |
| 320 | default: |
| 321 | WARN_ON(1); |
| 322 | r = RESUME_GUEST; |
| 323 | } |
| 324 | |
| 325 | return r; |
| 326 | } |
| 327 | EXPORT_SYMBOL_GPL(kvmppc_emulate_mmio); |
| 328 | |
| 329 | int kvmppc_st(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, |
| 330 | bool data) |
| 331 | { |
| 332 | ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM & PAGE_MASK; |
| 333 | struct kvmppc_pte pte; |
| 334 | int r; |
| 335 | |
| 336 | vcpu->stat.st++; |
| 337 | |
| 338 | r = kvmppc_xlate(vcpu, *eaddr, data ? XLATE_DATA : XLATE_INST, |
| 339 | XLATE_WRITE, &pte); |
| 340 | if (r < 0) |
| 341 | return r; |
| 342 | |
| 343 | *eaddr = pte.raddr; |
| 344 | |
| 345 | if (!pte.may_write) |
| 346 | return -EPERM; |
| 347 | |
| 348 | /* Magic page override */ |
| 349 | if (kvmppc_supports_magic_page(vcpu) && mp_pa && |
| 350 | ((pte.raddr & KVM_PAM & PAGE_MASK) == mp_pa) && |
| 351 | !(kvmppc_get_msr(vcpu) & MSR_PR)) { |
| 352 | void *magic = vcpu->arch.shared; |
| 353 | magic += pte.eaddr & 0xfff; |
| 354 | memcpy(magic, ptr, size); |
| 355 | return EMULATE_DONE; |
| 356 | } |
| 357 | |
| 358 | if (kvm_write_guest(vcpu->kvm, pte.raddr, ptr, size)) |
| 359 | return EMULATE_DO_MMIO; |
| 360 | |
| 361 | return EMULATE_DONE; |
| 362 | } |
| 363 | EXPORT_SYMBOL_GPL(kvmppc_st); |
| 364 | |
| 365 | int kvmppc_ld(struct kvm_vcpu *vcpu, ulong *eaddr, int size, void *ptr, |
| 366 | bool data) |
| 367 | { |
| 368 | ulong mp_pa = vcpu->arch.magic_page_pa & KVM_PAM & PAGE_MASK; |
| 369 | struct kvmppc_pte pte; |
| 370 | int rc; |
| 371 | |
| 372 | vcpu->stat.ld++; |
| 373 | |
| 374 | rc = kvmppc_xlate(vcpu, *eaddr, data ? XLATE_DATA : XLATE_INST, |
| 375 | XLATE_READ, &pte); |
| 376 | if (rc) |
| 377 | return rc; |
| 378 | |
| 379 | *eaddr = pte.raddr; |
| 380 | |
| 381 | if (!pte.may_read) |
| 382 | return -EPERM; |
| 383 | |
| 384 | if (!data && !pte.may_execute) |
| 385 | return -ENOEXEC; |
| 386 | |
| 387 | /* Magic page override */ |
| 388 | if (kvmppc_supports_magic_page(vcpu) && mp_pa && |
| 389 | ((pte.raddr & KVM_PAM & PAGE_MASK) == mp_pa) && |
| 390 | !(kvmppc_get_msr(vcpu) & MSR_PR)) { |
| 391 | void *magic = vcpu->arch.shared; |
| 392 | magic += pte.eaddr & 0xfff; |
| 393 | memcpy(ptr, magic, size); |
| 394 | return EMULATE_DONE; |
| 395 | } |
| 396 | |
| 397 | if (kvm_read_guest(vcpu->kvm, pte.raddr, ptr, size)) |
| 398 | return EMULATE_DO_MMIO; |
| 399 | |
| 400 | return EMULATE_DONE; |
| 401 | } |
| 402 | EXPORT_SYMBOL_GPL(kvmppc_ld); |
| 403 | |
| 404 | int kvm_arch_hardware_enable(void) |
| 405 | { |
| 406 | return 0; |
| 407 | } |
| 408 | |
| 409 | int kvm_arch_hardware_setup(void) |
| 410 | { |
| 411 | return 0; |
| 412 | } |
| 413 | |
| 414 | void kvm_arch_check_processor_compat(void *rtn) |
| 415 | { |
| 416 | *(int *)rtn = kvmppc_core_check_processor_compat(); |
| 417 | } |
| 418 | |
| 419 | int kvm_arch_init_vm(struct kvm *kvm, unsigned long type) |
| 420 | { |
| 421 | struct kvmppc_ops *kvm_ops = NULL; |
| 422 | /* |
| 423 | * if we have both HV and PR enabled, default is HV |
| 424 | */ |
| 425 | if (type == 0) { |
| 426 | if (kvmppc_hv_ops) |
| 427 | kvm_ops = kvmppc_hv_ops; |
| 428 | else |
| 429 | kvm_ops = kvmppc_pr_ops; |
| 430 | if (!kvm_ops) |
| 431 | goto err_out; |
| 432 | } else if (type == KVM_VM_PPC_HV) { |
| 433 | if (!kvmppc_hv_ops) |
| 434 | goto err_out; |
| 435 | kvm_ops = kvmppc_hv_ops; |
| 436 | } else if (type == KVM_VM_PPC_PR) { |
| 437 | if (!kvmppc_pr_ops) |
| 438 | goto err_out; |
| 439 | kvm_ops = kvmppc_pr_ops; |
| 440 | } else |
| 441 | goto err_out; |
| 442 | |
| 443 | if (kvm_ops->owner && !try_module_get(kvm_ops->owner)) |
| 444 | return -ENOENT; |
| 445 | |
| 446 | kvm->arch.kvm_ops = kvm_ops; |
| 447 | return kvmppc_core_init_vm(kvm); |
| 448 | err_out: |
| 449 | return -EINVAL; |
| 450 | } |
| 451 | |
| 452 | bool kvm_arch_has_vcpu_debugfs(void) |
| 453 | { |
| 454 | return false; |
| 455 | } |
| 456 | |
| 457 | int kvm_arch_create_vcpu_debugfs(struct kvm_vcpu *vcpu) |
| 458 | { |
| 459 | return 0; |
| 460 | } |
| 461 | |
| 462 | void kvm_arch_destroy_vm(struct kvm *kvm) |
| 463 | { |
| 464 | unsigned int i; |
| 465 | struct kvm_vcpu *vcpu; |
| 466 | |
| 467 | #ifdef CONFIG_KVM_XICS |
| 468 | /* |
| 469 | * We call kick_all_cpus_sync() to ensure that all |
| 470 | * CPUs have executed any pending IPIs before we |
| 471 | * continue and free VCPUs structures below. |
| 472 | */ |
| 473 | if (is_kvmppc_hv_enabled(kvm)) |
| 474 | kick_all_cpus_sync(); |
| 475 | #endif |
| 476 | |
| 477 | kvm_for_each_vcpu(i, vcpu, kvm) |
| 478 | kvm_arch_vcpu_free(vcpu); |
| 479 | |
| 480 | mutex_lock(&kvm->lock); |
| 481 | for (i = 0; i < atomic_read(&kvm->online_vcpus); i++) |
| 482 | kvm->vcpus[i] = NULL; |
| 483 | |
| 484 | atomic_set(&kvm->online_vcpus, 0); |
| 485 | |
| 486 | kvmppc_core_destroy_vm(kvm); |
| 487 | |
| 488 | mutex_unlock(&kvm->lock); |
| 489 | |
| 490 | /* drop the module reference */ |
| 491 | module_put(kvm->arch.kvm_ops->owner); |
| 492 | } |
| 493 | |
| 494 | int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext) |
| 495 | { |
| 496 | int r; |
| 497 | /* Assume we're using HV mode when the HV module is loaded */ |
| 498 | int hv_enabled = kvmppc_hv_ops ? 1 : 0; |
| 499 | |
| 500 | if (kvm) { |
| 501 | /* |
| 502 | * Hooray - we know which VM type we're running on. Depend on |
| 503 | * that rather than the guess above. |
| 504 | */ |
| 505 | hv_enabled = is_kvmppc_hv_enabled(kvm); |
| 506 | } |
| 507 | |
| 508 | switch (ext) { |
| 509 | #ifdef CONFIG_BOOKE |
| 510 | case KVM_CAP_PPC_BOOKE_SREGS: |
| 511 | case KVM_CAP_PPC_BOOKE_WATCHDOG: |
| 512 | case KVM_CAP_PPC_EPR: |
| 513 | #else |
| 514 | case KVM_CAP_PPC_SEGSTATE: |
| 515 | case KVM_CAP_PPC_HIOR: |
| 516 | case KVM_CAP_PPC_PAPR: |
| 517 | #endif |
| 518 | case KVM_CAP_PPC_UNSET_IRQ: |
| 519 | case KVM_CAP_PPC_IRQ_LEVEL: |
| 520 | case KVM_CAP_ENABLE_CAP: |
| 521 | case KVM_CAP_ENABLE_CAP_VM: |
| 522 | case KVM_CAP_ONE_REG: |
| 523 | case KVM_CAP_IOEVENTFD: |
| 524 | case KVM_CAP_DEVICE_CTRL: |
| 525 | case KVM_CAP_IMMEDIATE_EXIT: |
| 526 | r = 1; |
| 527 | break; |
| 528 | case KVM_CAP_PPC_PAIRED_SINGLES: |
| 529 | case KVM_CAP_PPC_OSI: |
| 530 | case KVM_CAP_PPC_GET_PVINFO: |
| 531 | #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) |
| 532 | case KVM_CAP_SW_TLB: |
| 533 | #endif |
| 534 | /* We support this only for PR */ |
| 535 | r = !hv_enabled; |
| 536 | break; |
| 537 | #ifdef CONFIG_KVM_MPIC |
| 538 | case KVM_CAP_IRQ_MPIC: |
| 539 | r = 1; |
| 540 | break; |
| 541 | #endif |
| 542 | |
| 543 | #ifdef CONFIG_PPC_BOOK3S_64 |
| 544 | case KVM_CAP_SPAPR_TCE: |
| 545 | case KVM_CAP_SPAPR_TCE_64: |
| 546 | /* fallthrough */ |
| 547 | case KVM_CAP_SPAPR_TCE_VFIO: |
| 548 | case KVM_CAP_PPC_RTAS: |
| 549 | case KVM_CAP_PPC_FIXUP_HCALL: |
| 550 | case KVM_CAP_PPC_ENABLE_HCALL: |
| 551 | #ifdef CONFIG_KVM_XICS |
| 552 | case KVM_CAP_IRQ_XICS: |
| 553 | #endif |
| 554 | case KVM_CAP_PPC_GET_CPU_CHAR: |
| 555 | r = 1; |
| 556 | break; |
| 557 | |
| 558 | case KVM_CAP_PPC_ALLOC_HTAB: |
| 559 | r = hv_enabled; |
| 560 | break; |
| 561 | #endif /* CONFIG_PPC_BOOK3S_64 */ |
| 562 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
| 563 | case KVM_CAP_PPC_SMT: |
| 564 | r = 0; |
| 565 | if (kvm) { |
| 566 | if (kvm->arch.emul_smt_mode > 1) |
| 567 | r = kvm->arch.emul_smt_mode; |
| 568 | else |
| 569 | r = kvm->arch.smt_mode; |
| 570 | } else if (hv_enabled) { |
| 571 | if (cpu_has_feature(CPU_FTR_ARCH_300)) |
| 572 | r = 1; |
| 573 | else |
| 574 | r = threads_per_subcore; |
| 575 | } |
| 576 | break; |
| 577 | case KVM_CAP_PPC_SMT_POSSIBLE: |
| 578 | r = 1; |
| 579 | if (hv_enabled) { |
| 580 | if (!cpu_has_feature(CPU_FTR_ARCH_300)) |
| 581 | r = ((threads_per_subcore << 1) - 1); |
| 582 | else |
| 583 | /* P9 can emulate dbells, so allow any mode */ |
| 584 | r = 8 | 4 | 2 | 1; |
| 585 | } |
| 586 | break; |
| 587 | case KVM_CAP_PPC_RMA: |
| 588 | r = 0; |
| 589 | break; |
| 590 | case KVM_CAP_PPC_HWRNG: |
| 591 | r = kvmppc_hwrng_present(); |
| 592 | break; |
| 593 | case KVM_CAP_PPC_MMU_RADIX: |
| 594 | r = !!(hv_enabled && radix_enabled()); |
| 595 | break; |
| 596 | case KVM_CAP_PPC_MMU_HASH_V3: |
| 597 | r = !!(hv_enabled && cpu_has_feature(CPU_FTR_ARCH_300)); |
| 598 | break; |
| 599 | #endif |
| 600 | case KVM_CAP_SYNC_MMU: |
| 601 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
| 602 | r = hv_enabled; |
| 603 | #elif defined(KVM_ARCH_WANT_MMU_NOTIFIER) |
| 604 | r = 1; |
| 605 | #else |
| 606 | r = 0; |
| 607 | #endif |
| 608 | break; |
| 609 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
| 610 | case KVM_CAP_PPC_HTAB_FD: |
| 611 | r = hv_enabled; |
| 612 | break; |
| 613 | #endif |
| 614 | case KVM_CAP_NR_VCPUS: |
| 615 | /* |
| 616 | * Recommending a number of CPUs is somewhat arbitrary; we |
| 617 | * return the number of present CPUs for -HV (since a host |
| 618 | * will have secondary threads "offline"), and for other KVM |
| 619 | * implementations just count online CPUs. |
| 620 | */ |
| 621 | if (hv_enabled) |
| 622 | r = num_present_cpus(); |
| 623 | else |
| 624 | r = num_online_cpus(); |
| 625 | break; |
| 626 | case KVM_CAP_NR_MEMSLOTS: |
| 627 | r = KVM_USER_MEM_SLOTS; |
| 628 | break; |
| 629 | case KVM_CAP_MAX_VCPUS: |
| 630 | r = KVM_MAX_VCPUS; |
| 631 | break; |
| 632 | #ifdef CONFIG_PPC_BOOK3S_64 |
| 633 | case KVM_CAP_PPC_GET_SMMU_INFO: |
| 634 | r = 1; |
| 635 | break; |
| 636 | case KVM_CAP_SPAPR_MULTITCE: |
| 637 | r = 1; |
| 638 | break; |
| 639 | case KVM_CAP_SPAPR_RESIZE_HPT: |
| 640 | r = !!hv_enabled; |
| 641 | break; |
| 642 | #endif |
| 643 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
| 644 | case KVM_CAP_PPC_FWNMI: |
| 645 | r = hv_enabled; |
| 646 | break; |
| 647 | #endif |
| 648 | #ifdef CONFIG_PPC_TRANSACTIONAL_MEM |
| 649 | case KVM_CAP_PPC_HTM: |
| 650 | r = !!(cur_cpu_spec->cpu_user_features2 & PPC_FEATURE2_HTM) || |
| 651 | (hv_enabled && cpu_has_feature(CPU_FTR_P9_TM_HV_ASSIST)); |
| 652 | break; |
| 653 | #endif |
| 654 | default: |
| 655 | r = 0; |
| 656 | break; |
| 657 | } |
| 658 | return r; |
| 659 | |
| 660 | } |
| 661 | |
| 662 | long kvm_arch_dev_ioctl(struct file *filp, |
| 663 | unsigned int ioctl, unsigned long arg) |
| 664 | { |
| 665 | return -EINVAL; |
| 666 | } |
| 667 | |
| 668 | void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free, |
| 669 | struct kvm_memory_slot *dont) |
| 670 | { |
| 671 | kvmppc_core_free_memslot(kvm, free, dont); |
| 672 | } |
| 673 | |
| 674 | int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot, |
| 675 | unsigned long npages) |
| 676 | { |
| 677 | return kvmppc_core_create_memslot(kvm, slot, npages); |
| 678 | } |
| 679 | |
| 680 | int kvm_arch_prepare_memory_region(struct kvm *kvm, |
| 681 | struct kvm_memory_slot *memslot, |
| 682 | const struct kvm_userspace_memory_region *mem, |
| 683 | enum kvm_mr_change change) |
| 684 | { |
| 685 | return kvmppc_core_prepare_memory_region(kvm, memslot, mem); |
| 686 | } |
| 687 | |
| 688 | void kvm_arch_commit_memory_region(struct kvm *kvm, |
| 689 | const struct kvm_userspace_memory_region *mem, |
| 690 | const struct kvm_memory_slot *old, |
| 691 | const struct kvm_memory_slot *new, |
| 692 | enum kvm_mr_change change) |
| 693 | { |
| 694 | kvmppc_core_commit_memory_region(kvm, mem, old, new); |
| 695 | } |
| 696 | |
| 697 | void kvm_arch_flush_shadow_memslot(struct kvm *kvm, |
| 698 | struct kvm_memory_slot *slot) |
| 699 | { |
| 700 | kvmppc_core_flush_memslot(kvm, slot); |
| 701 | } |
| 702 | |
| 703 | struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm, unsigned int id) |
| 704 | { |
| 705 | struct kvm_vcpu *vcpu; |
| 706 | vcpu = kvmppc_core_vcpu_create(kvm, id); |
| 707 | if (!IS_ERR(vcpu)) { |
| 708 | vcpu->arch.wqp = &vcpu->wq; |
| 709 | kvmppc_create_vcpu_debugfs(vcpu, id); |
| 710 | } |
| 711 | return vcpu; |
| 712 | } |
| 713 | |
| 714 | void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu) |
| 715 | { |
| 716 | } |
| 717 | |
| 718 | void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu) |
| 719 | { |
| 720 | /* Make sure we're not using the vcpu anymore */ |
| 721 | hrtimer_cancel(&vcpu->arch.dec_timer); |
| 722 | |
| 723 | kvmppc_remove_vcpu_debugfs(vcpu); |
| 724 | |
| 725 | switch (vcpu->arch.irq_type) { |
| 726 | case KVMPPC_IRQ_MPIC: |
| 727 | kvmppc_mpic_disconnect_vcpu(vcpu->arch.mpic, vcpu); |
| 728 | break; |
| 729 | case KVMPPC_IRQ_XICS: |
| 730 | if (xive_enabled()) |
| 731 | kvmppc_xive_cleanup_vcpu(vcpu); |
| 732 | else |
| 733 | kvmppc_xics_free_icp(vcpu); |
| 734 | break; |
| 735 | } |
| 736 | |
| 737 | kvmppc_core_vcpu_free(vcpu); |
| 738 | } |
| 739 | |
| 740 | void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu) |
| 741 | { |
| 742 | kvm_arch_vcpu_free(vcpu); |
| 743 | } |
| 744 | |
| 745 | int kvm_cpu_has_pending_timer(struct kvm_vcpu *vcpu) |
| 746 | { |
| 747 | return kvmppc_core_pending_dec(vcpu); |
| 748 | } |
| 749 | |
| 750 | static enum hrtimer_restart kvmppc_decrementer_wakeup(struct hrtimer *timer) |
| 751 | { |
| 752 | struct kvm_vcpu *vcpu; |
| 753 | |
| 754 | vcpu = container_of(timer, struct kvm_vcpu, arch.dec_timer); |
| 755 | kvmppc_decrementer_func(vcpu); |
| 756 | |
| 757 | return HRTIMER_NORESTART; |
| 758 | } |
| 759 | |
| 760 | int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu) |
| 761 | { |
| 762 | int ret; |
| 763 | |
| 764 | hrtimer_init(&vcpu->arch.dec_timer, CLOCK_REALTIME, HRTIMER_MODE_ABS); |
| 765 | vcpu->arch.dec_timer.function = kvmppc_decrementer_wakeup; |
| 766 | vcpu->arch.dec_expires = get_tb(); |
| 767 | |
| 768 | #ifdef CONFIG_KVM_EXIT_TIMING |
| 769 | mutex_init(&vcpu->arch.exit_timing_lock); |
| 770 | #endif |
| 771 | ret = kvmppc_subarch_vcpu_init(vcpu); |
| 772 | return ret; |
| 773 | } |
| 774 | |
| 775 | void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu) |
| 776 | { |
| 777 | kvmppc_mmu_destroy(vcpu); |
| 778 | kvmppc_subarch_vcpu_uninit(vcpu); |
| 779 | } |
| 780 | |
| 781 | void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu) |
| 782 | { |
| 783 | #ifdef CONFIG_BOOKE |
| 784 | /* |
| 785 | * vrsave (formerly usprg0) isn't used by Linux, but may |
| 786 | * be used by the guest. |
| 787 | * |
| 788 | * On non-booke this is associated with Altivec and |
| 789 | * is handled by code in book3s.c. |
| 790 | */ |
| 791 | mtspr(SPRN_VRSAVE, vcpu->arch.vrsave); |
| 792 | #endif |
| 793 | kvmppc_core_vcpu_load(vcpu, cpu); |
| 794 | } |
| 795 | |
| 796 | void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) |
| 797 | { |
| 798 | kvmppc_core_vcpu_put(vcpu); |
| 799 | #ifdef CONFIG_BOOKE |
| 800 | vcpu->arch.vrsave = mfspr(SPRN_VRSAVE); |
| 801 | #endif |
| 802 | } |
| 803 | |
| 804 | /* |
| 805 | * irq_bypass_add_producer and irq_bypass_del_producer are only |
| 806 | * useful if the architecture supports PCI passthrough. |
| 807 | * irq_bypass_stop and irq_bypass_start are not needed and so |
| 808 | * kvm_ops are not defined for them. |
| 809 | */ |
| 810 | bool kvm_arch_has_irq_bypass(void) |
| 811 | { |
| 812 | return ((kvmppc_hv_ops && kvmppc_hv_ops->irq_bypass_add_producer) || |
| 813 | (kvmppc_pr_ops && kvmppc_pr_ops->irq_bypass_add_producer)); |
| 814 | } |
| 815 | |
| 816 | int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons, |
| 817 | struct irq_bypass_producer *prod) |
| 818 | { |
| 819 | struct kvm_kernel_irqfd *irqfd = |
| 820 | container_of(cons, struct kvm_kernel_irqfd, consumer); |
| 821 | struct kvm *kvm = irqfd->kvm; |
| 822 | |
| 823 | if (kvm->arch.kvm_ops->irq_bypass_add_producer) |
| 824 | return kvm->arch.kvm_ops->irq_bypass_add_producer(cons, prod); |
| 825 | |
| 826 | return 0; |
| 827 | } |
| 828 | |
| 829 | void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons, |
| 830 | struct irq_bypass_producer *prod) |
| 831 | { |
| 832 | struct kvm_kernel_irqfd *irqfd = |
| 833 | container_of(cons, struct kvm_kernel_irqfd, consumer); |
| 834 | struct kvm *kvm = irqfd->kvm; |
| 835 | |
| 836 | if (kvm->arch.kvm_ops->irq_bypass_del_producer) |
| 837 | kvm->arch.kvm_ops->irq_bypass_del_producer(cons, prod); |
| 838 | } |
| 839 | |
| 840 | #ifdef CONFIG_VSX |
| 841 | static inline int kvmppc_get_vsr_dword_offset(int index) |
| 842 | { |
| 843 | int offset; |
| 844 | |
| 845 | if ((index != 0) && (index != 1)) |
| 846 | return -1; |
| 847 | |
| 848 | #ifdef __BIG_ENDIAN |
| 849 | offset = index; |
| 850 | #else |
| 851 | offset = 1 - index; |
| 852 | #endif |
| 853 | |
| 854 | return offset; |
| 855 | } |
| 856 | |
| 857 | static inline int kvmppc_get_vsr_word_offset(int index) |
| 858 | { |
| 859 | int offset; |
| 860 | |
| 861 | if ((index > 3) || (index < 0)) |
| 862 | return -1; |
| 863 | |
| 864 | #ifdef __BIG_ENDIAN |
| 865 | offset = index; |
| 866 | #else |
| 867 | offset = 3 - index; |
| 868 | #endif |
| 869 | return offset; |
| 870 | } |
| 871 | |
| 872 | static inline void kvmppc_set_vsr_dword(struct kvm_vcpu *vcpu, |
| 873 | u64 gpr) |
| 874 | { |
| 875 | union kvmppc_one_reg val; |
| 876 | int offset = kvmppc_get_vsr_dword_offset(vcpu->arch.mmio_vsx_offset); |
| 877 | int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; |
| 878 | |
| 879 | if (offset == -1) |
| 880 | return; |
| 881 | |
| 882 | if (index >= 32) { |
| 883 | val.vval = VCPU_VSX_VR(vcpu, index - 32); |
| 884 | val.vsxval[offset] = gpr; |
| 885 | VCPU_VSX_VR(vcpu, index - 32) = val.vval; |
| 886 | } else { |
| 887 | VCPU_VSX_FPR(vcpu, index, offset) = gpr; |
| 888 | } |
| 889 | } |
| 890 | |
| 891 | static inline void kvmppc_set_vsr_dword_dump(struct kvm_vcpu *vcpu, |
| 892 | u64 gpr) |
| 893 | { |
| 894 | union kvmppc_one_reg val; |
| 895 | int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; |
| 896 | |
| 897 | if (index >= 32) { |
| 898 | val.vval = VCPU_VSX_VR(vcpu, index - 32); |
| 899 | val.vsxval[0] = gpr; |
| 900 | val.vsxval[1] = gpr; |
| 901 | VCPU_VSX_VR(vcpu, index - 32) = val.vval; |
| 902 | } else { |
| 903 | VCPU_VSX_FPR(vcpu, index, 0) = gpr; |
| 904 | VCPU_VSX_FPR(vcpu, index, 1) = gpr; |
| 905 | } |
| 906 | } |
| 907 | |
| 908 | static inline void kvmppc_set_vsr_word_dump(struct kvm_vcpu *vcpu, |
| 909 | u32 gpr) |
| 910 | { |
| 911 | union kvmppc_one_reg val; |
| 912 | int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; |
| 913 | |
| 914 | if (index >= 32) { |
| 915 | val.vsx32val[0] = gpr; |
| 916 | val.vsx32val[1] = gpr; |
| 917 | val.vsx32val[2] = gpr; |
| 918 | val.vsx32val[3] = gpr; |
| 919 | VCPU_VSX_VR(vcpu, index - 32) = val.vval; |
| 920 | } else { |
| 921 | val.vsx32val[0] = gpr; |
| 922 | val.vsx32val[1] = gpr; |
| 923 | VCPU_VSX_FPR(vcpu, index, 0) = val.vsxval[0]; |
| 924 | VCPU_VSX_FPR(vcpu, index, 1) = val.vsxval[0]; |
| 925 | } |
| 926 | } |
| 927 | |
| 928 | static inline void kvmppc_set_vsr_word(struct kvm_vcpu *vcpu, |
| 929 | u32 gpr32) |
| 930 | { |
| 931 | union kvmppc_one_reg val; |
| 932 | int offset = kvmppc_get_vsr_word_offset(vcpu->arch.mmio_vsx_offset); |
| 933 | int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; |
| 934 | int dword_offset, word_offset; |
| 935 | |
| 936 | if (offset == -1) |
| 937 | return; |
| 938 | |
| 939 | if (index >= 32) { |
| 940 | val.vval = VCPU_VSX_VR(vcpu, index - 32); |
| 941 | val.vsx32val[offset] = gpr32; |
| 942 | VCPU_VSX_VR(vcpu, index - 32) = val.vval; |
| 943 | } else { |
| 944 | dword_offset = offset / 2; |
| 945 | word_offset = offset % 2; |
| 946 | val.vsxval[0] = VCPU_VSX_FPR(vcpu, index, dword_offset); |
| 947 | val.vsx32val[word_offset] = gpr32; |
| 948 | VCPU_VSX_FPR(vcpu, index, dword_offset) = val.vsxval[0]; |
| 949 | } |
| 950 | } |
| 951 | #endif /* CONFIG_VSX */ |
| 952 | |
| 953 | #ifdef CONFIG_ALTIVEC |
| 954 | static inline int kvmppc_get_vmx_offset_generic(struct kvm_vcpu *vcpu, |
| 955 | int index, int element_size) |
| 956 | { |
| 957 | int offset; |
| 958 | int elts = sizeof(vector128)/element_size; |
| 959 | |
| 960 | if ((index < 0) || (index >= elts)) |
| 961 | return -1; |
| 962 | |
| 963 | if (kvmppc_need_byteswap(vcpu)) |
| 964 | offset = elts - index - 1; |
| 965 | else |
| 966 | offset = index; |
| 967 | |
| 968 | return offset; |
| 969 | } |
| 970 | |
| 971 | static inline int kvmppc_get_vmx_dword_offset(struct kvm_vcpu *vcpu, |
| 972 | int index) |
| 973 | { |
| 974 | return kvmppc_get_vmx_offset_generic(vcpu, index, 8); |
| 975 | } |
| 976 | |
| 977 | static inline int kvmppc_get_vmx_word_offset(struct kvm_vcpu *vcpu, |
| 978 | int index) |
| 979 | { |
| 980 | return kvmppc_get_vmx_offset_generic(vcpu, index, 4); |
| 981 | } |
| 982 | |
| 983 | static inline int kvmppc_get_vmx_hword_offset(struct kvm_vcpu *vcpu, |
| 984 | int index) |
| 985 | { |
| 986 | return kvmppc_get_vmx_offset_generic(vcpu, index, 2); |
| 987 | } |
| 988 | |
| 989 | static inline int kvmppc_get_vmx_byte_offset(struct kvm_vcpu *vcpu, |
| 990 | int index) |
| 991 | { |
| 992 | return kvmppc_get_vmx_offset_generic(vcpu, index, 1); |
| 993 | } |
| 994 | |
| 995 | |
| 996 | static inline void kvmppc_set_vmx_dword(struct kvm_vcpu *vcpu, |
| 997 | u64 gpr) |
| 998 | { |
| 999 | union kvmppc_one_reg val; |
| 1000 | int offset = kvmppc_get_vmx_dword_offset(vcpu, |
| 1001 | vcpu->arch.mmio_vmx_offset); |
| 1002 | int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; |
| 1003 | |
| 1004 | if (offset == -1) |
| 1005 | return; |
| 1006 | |
| 1007 | val.vval = VCPU_VSX_VR(vcpu, index); |
| 1008 | val.vsxval[offset] = gpr; |
| 1009 | VCPU_VSX_VR(vcpu, index) = val.vval; |
| 1010 | } |
| 1011 | |
| 1012 | static inline void kvmppc_set_vmx_word(struct kvm_vcpu *vcpu, |
| 1013 | u32 gpr32) |
| 1014 | { |
| 1015 | union kvmppc_one_reg val; |
| 1016 | int offset = kvmppc_get_vmx_word_offset(vcpu, |
| 1017 | vcpu->arch.mmio_vmx_offset); |
| 1018 | int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; |
| 1019 | |
| 1020 | if (offset == -1) |
| 1021 | return; |
| 1022 | |
| 1023 | val.vval = VCPU_VSX_VR(vcpu, index); |
| 1024 | val.vsx32val[offset] = gpr32; |
| 1025 | VCPU_VSX_VR(vcpu, index) = val.vval; |
| 1026 | } |
| 1027 | |
| 1028 | static inline void kvmppc_set_vmx_hword(struct kvm_vcpu *vcpu, |
| 1029 | u16 gpr16) |
| 1030 | { |
| 1031 | union kvmppc_one_reg val; |
| 1032 | int offset = kvmppc_get_vmx_hword_offset(vcpu, |
| 1033 | vcpu->arch.mmio_vmx_offset); |
| 1034 | int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; |
| 1035 | |
| 1036 | if (offset == -1) |
| 1037 | return; |
| 1038 | |
| 1039 | val.vval = VCPU_VSX_VR(vcpu, index); |
| 1040 | val.vsx16val[offset] = gpr16; |
| 1041 | VCPU_VSX_VR(vcpu, index) = val.vval; |
| 1042 | } |
| 1043 | |
| 1044 | static inline void kvmppc_set_vmx_byte(struct kvm_vcpu *vcpu, |
| 1045 | u8 gpr8) |
| 1046 | { |
| 1047 | union kvmppc_one_reg val; |
| 1048 | int offset = kvmppc_get_vmx_byte_offset(vcpu, |
| 1049 | vcpu->arch.mmio_vmx_offset); |
| 1050 | int index = vcpu->arch.io_gpr & KVM_MMIO_REG_MASK; |
| 1051 | |
| 1052 | if (offset == -1) |
| 1053 | return; |
| 1054 | |
| 1055 | val.vval = VCPU_VSX_VR(vcpu, index); |
| 1056 | val.vsx8val[offset] = gpr8; |
| 1057 | VCPU_VSX_VR(vcpu, index) = val.vval; |
| 1058 | } |
| 1059 | #endif /* CONFIG_ALTIVEC */ |
| 1060 | |
| 1061 | #ifdef CONFIG_PPC_FPU |
| 1062 | static inline u64 sp_to_dp(u32 fprs) |
| 1063 | { |
| 1064 | u64 fprd; |
| 1065 | |
| 1066 | preempt_disable(); |
| 1067 | enable_kernel_fp(); |
| 1068 | asm ("lfs%U1%X1 0,%1; stfd%U0%X0 0,%0" : "=m" (fprd) : "m" (fprs) |
| 1069 | : "fr0"); |
| 1070 | preempt_enable(); |
| 1071 | return fprd; |
| 1072 | } |
| 1073 | |
| 1074 | static inline u32 dp_to_sp(u64 fprd) |
| 1075 | { |
| 1076 | u32 fprs; |
| 1077 | |
| 1078 | preempt_disable(); |
| 1079 | enable_kernel_fp(); |
| 1080 | asm ("lfd%U1%X1 0,%1; stfs%U0%X0 0,%0" : "=m" (fprs) : "m" (fprd) |
| 1081 | : "fr0"); |
| 1082 | preempt_enable(); |
| 1083 | return fprs; |
| 1084 | } |
| 1085 | |
| 1086 | #else |
| 1087 | #define sp_to_dp(x) (x) |
| 1088 | #define dp_to_sp(x) (x) |
| 1089 | #endif /* CONFIG_PPC_FPU */ |
| 1090 | |
| 1091 | static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu, |
| 1092 | struct kvm_run *run) |
| 1093 | { |
| 1094 | u64 uninitialized_var(gpr); |
| 1095 | |
| 1096 | if (run->mmio.len > sizeof(gpr)) { |
| 1097 | printk(KERN_ERR "bad MMIO length: %d\n", run->mmio.len); |
| 1098 | return; |
| 1099 | } |
| 1100 | |
| 1101 | if (!vcpu->arch.mmio_host_swabbed) { |
| 1102 | switch (run->mmio.len) { |
| 1103 | case 8: gpr = *(u64 *)run->mmio.data; break; |
| 1104 | case 4: gpr = *(u32 *)run->mmio.data; break; |
| 1105 | case 2: gpr = *(u16 *)run->mmio.data; break; |
| 1106 | case 1: gpr = *(u8 *)run->mmio.data; break; |
| 1107 | } |
| 1108 | } else { |
| 1109 | switch (run->mmio.len) { |
| 1110 | case 8: gpr = swab64(*(u64 *)run->mmio.data); break; |
| 1111 | case 4: gpr = swab32(*(u32 *)run->mmio.data); break; |
| 1112 | case 2: gpr = swab16(*(u16 *)run->mmio.data); break; |
| 1113 | case 1: gpr = *(u8 *)run->mmio.data; break; |
| 1114 | } |
| 1115 | } |
| 1116 | |
| 1117 | /* conversion between single and double precision */ |
| 1118 | if ((vcpu->arch.mmio_sp64_extend) && (run->mmio.len == 4)) |
| 1119 | gpr = sp_to_dp(gpr); |
| 1120 | |
| 1121 | if (vcpu->arch.mmio_sign_extend) { |
| 1122 | switch (run->mmio.len) { |
| 1123 | #ifdef CONFIG_PPC64 |
| 1124 | case 4: |
| 1125 | gpr = (s64)(s32)gpr; |
| 1126 | break; |
| 1127 | #endif |
| 1128 | case 2: |
| 1129 | gpr = (s64)(s16)gpr; |
| 1130 | break; |
| 1131 | case 1: |
| 1132 | gpr = (s64)(s8)gpr; |
| 1133 | break; |
| 1134 | } |
| 1135 | } |
| 1136 | |
| 1137 | switch (vcpu->arch.io_gpr & KVM_MMIO_REG_EXT_MASK) { |
| 1138 | case KVM_MMIO_REG_GPR: |
| 1139 | kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr); |
| 1140 | break; |
| 1141 | case KVM_MMIO_REG_FPR: |
| 1142 | if (vcpu->kvm->arch.kvm_ops->giveup_ext) |
| 1143 | vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu, MSR_FP); |
| 1144 | |
| 1145 | VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr; |
| 1146 | break; |
| 1147 | #ifdef CONFIG_PPC_BOOK3S |
| 1148 | case KVM_MMIO_REG_QPR: |
| 1149 | vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr; |
| 1150 | break; |
| 1151 | case KVM_MMIO_REG_FQPR: |
| 1152 | VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr; |
| 1153 | vcpu->arch.qpr[vcpu->arch.io_gpr & KVM_MMIO_REG_MASK] = gpr; |
| 1154 | break; |
| 1155 | #endif |
| 1156 | #ifdef CONFIG_VSX |
| 1157 | case KVM_MMIO_REG_VSX: |
| 1158 | if (vcpu->kvm->arch.kvm_ops->giveup_ext) |
| 1159 | vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu, MSR_VSX); |
| 1160 | |
| 1161 | if (vcpu->arch.mmio_copy_type == KVMPPC_VSX_COPY_DWORD) |
| 1162 | kvmppc_set_vsr_dword(vcpu, gpr); |
| 1163 | else if (vcpu->arch.mmio_copy_type == KVMPPC_VSX_COPY_WORD) |
| 1164 | kvmppc_set_vsr_word(vcpu, gpr); |
| 1165 | else if (vcpu->arch.mmio_copy_type == |
| 1166 | KVMPPC_VSX_COPY_DWORD_LOAD_DUMP) |
| 1167 | kvmppc_set_vsr_dword_dump(vcpu, gpr); |
| 1168 | else if (vcpu->arch.mmio_copy_type == |
| 1169 | KVMPPC_VSX_COPY_WORD_LOAD_DUMP) |
| 1170 | kvmppc_set_vsr_word_dump(vcpu, gpr); |
| 1171 | break; |
| 1172 | #endif |
| 1173 | #ifdef CONFIG_ALTIVEC |
| 1174 | case KVM_MMIO_REG_VMX: |
| 1175 | if (vcpu->kvm->arch.kvm_ops->giveup_ext) |
| 1176 | vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu, MSR_VEC); |
| 1177 | |
| 1178 | if (vcpu->arch.mmio_copy_type == KVMPPC_VMX_COPY_DWORD) |
| 1179 | kvmppc_set_vmx_dword(vcpu, gpr); |
| 1180 | else if (vcpu->arch.mmio_copy_type == KVMPPC_VMX_COPY_WORD) |
| 1181 | kvmppc_set_vmx_word(vcpu, gpr); |
| 1182 | else if (vcpu->arch.mmio_copy_type == |
| 1183 | KVMPPC_VMX_COPY_HWORD) |
| 1184 | kvmppc_set_vmx_hword(vcpu, gpr); |
| 1185 | else if (vcpu->arch.mmio_copy_type == |
| 1186 | KVMPPC_VMX_COPY_BYTE) |
| 1187 | kvmppc_set_vmx_byte(vcpu, gpr); |
| 1188 | break; |
| 1189 | #endif |
| 1190 | default: |
| 1191 | BUG(); |
| 1192 | } |
| 1193 | } |
| 1194 | |
| 1195 | static int __kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu, |
| 1196 | unsigned int rt, unsigned int bytes, |
| 1197 | int is_default_endian, int sign_extend) |
| 1198 | { |
| 1199 | int idx, ret; |
| 1200 | bool host_swabbed; |
| 1201 | |
| 1202 | /* Pity C doesn't have a logical XOR operator */ |
| 1203 | if (kvmppc_need_byteswap(vcpu)) { |
| 1204 | host_swabbed = is_default_endian; |
| 1205 | } else { |
| 1206 | host_swabbed = !is_default_endian; |
| 1207 | } |
| 1208 | |
| 1209 | if (bytes > sizeof(run->mmio.data)) { |
| 1210 | printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__, |
| 1211 | run->mmio.len); |
| 1212 | } |
| 1213 | |
| 1214 | run->mmio.phys_addr = vcpu->arch.paddr_accessed; |
| 1215 | run->mmio.len = bytes; |
| 1216 | run->mmio.is_write = 0; |
| 1217 | |
| 1218 | vcpu->arch.io_gpr = rt; |
| 1219 | vcpu->arch.mmio_host_swabbed = host_swabbed; |
| 1220 | vcpu->mmio_needed = 1; |
| 1221 | vcpu->mmio_is_write = 0; |
| 1222 | vcpu->arch.mmio_sign_extend = sign_extend; |
| 1223 | |
| 1224 | idx = srcu_read_lock(&vcpu->kvm->srcu); |
| 1225 | |
| 1226 | ret = kvm_io_bus_read(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr, |
| 1227 | bytes, &run->mmio.data); |
| 1228 | |
| 1229 | srcu_read_unlock(&vcpu->kvm->srcu, idx); |
| 1230 | |
| 1231 | if (!ret) { |
| 1232 | kvmppc_complete_mmio_load(vcpu, run); |
| 1233 | vcpu->mmio_needed = 0; |
| 1234 | return EMULATE_DONE; |
| 1235 | } |
| 1236 | |
| 1237 | return EMULATE_DO_MMIO; |
| 1238 | } |
| 1239 | |
| 1240 | int kvmppc_handle_load(struct kvm_run *run, struct kvm_vcpu *vcpu, |
| 1241 | unsigned int rt, unsigned int bytes, |
| 1242 | int is_default_endian) |
| 1243 | { |
| 1244 | return __kvmppc_handle_load(run, vcpu, rt, bytes, is_default_endian, 0); |
| 1245 | } |
| 1246 | EXPORT_SYMBOL_GPL(kvmppc_handle_load); |
| 1247 | |
| 1248 | /* Same as above, but sign extends */ |
| 1249 | int kvmppc_handle_loads(struct kvm_run *run, struct kvm_vcpu *vcpu, |
| 1250 | unsigned int rt, unsigned int bytes, |
| 1251 | int is_default_endian) |
| 1252 | { |
| 1253 | return __kvmppc_handle_load(run, vcpu, rt, bytes, is_default_endian, 1); |
| 1254 | } |
| 1255 | |
| 1256 | #ifdef CONFIG_VSX |
| 1257 | int kvmppc_handle_vsx_load(struct kvm_run *run, struct kvm_vcpu *vcpu, |
| 1258 | unsigned int rt, unsigned int bytes, |
| 1259 | int is_default_endian, int mmio_sign_extend) |
| 1260 | { |
| 1261 | enum emulation_result emulated = EMULATE_DONE; |
| 1262 | |
| 1263 | /* Currently, mmio_vsx_copy_nums only allowed to be 4 or less */ |
| 1264 | if (vcpu->arch.mmio_vsx_copy_nums > 4) |
| 1265 | return EMULATE_FAIL; |
| 1266 | |
| 1267 | while (vcpu->arch.mmio_vsx_copy_nums) { |
| 1268 | emulated = __kvmppc_handle_load(run, vcpu, rt, bytes, |
| 1269 | is_default_endian, mmio_sign_extend); |
| 1270 | |
| 1271 | if (emulated != EMULATE_DONE) |
| 1272 | break; |
| 1273 | |
| 1274 | vcpu->arch.paddr_accessed += run->mmio.len; |
| 1275 | |
| 1276 | vcpu->arch.mmio_vsx_copy_nums--; |
| 1277 | vcpu->arch.mmio_vsx_offset++; |
| 1278 | } |
| 1279 | return emulated; |
| 1280 | } |
| 1281 | #endif /* CONFIG_VSX */ |
| 1282 | |
| 1283 | int kvmppc_handle_store(struct kvm_run *run, struct kvm_vcpu *vcpu, |
| 1284 | u64 val, unsigned int bytes, int is_default_endian) |
| 1285 | { |
| 1286 | void *data = run->mmio.data; |
| 1287 | int idx, ret; |
| 1288 | bool host_swabbed; |
| 1289 | |
| 1290 | /* Pity C doesn't have a logical XOR operator */ |
| 1291 | if (kvmppc_need_byteswap(vcpu)) { |
| 1292 | host_swabbed = is_default_endian; |
| 1293 | } else { |
| 1294 | host_swabbed = !is_default_endian; |
| 1295 | } |
| 1296 | |
| 1297 | if (bytes > sizeof(run->mmio.data)) { |
| 1298 | printk(KERN_ERR "%s: bad MMIO length: %d\n", __func__, |
| 1299 | run->mmio.len); |
| 1300 | } |
| 1301 | |
| 1302 | run->mmio.phys_addr = vcpu->arch.paddr_accessed; |
| 1303 | run->mmio.len = bytes; |
| 1304 | run->mmio.is_write = 1; |
| 1305 | vcpu->mmio_needed = 1; |
| 1306 | vcpu->mmio_is_write = 1; |
| 1307 | |
| 1308 | if ((vcpu->arch.mmio_sp64_extend) && (bytes == 4)) |
| 1309 | val = dp_to_sp(val); |
| 1310 | |
| 1311 | /* Store the value at the lowest bytes in 'data'. */ |
| 1312 | if (!host_swabbed) { |
| 1313 | switch (bytes) { |
| 1314 | case 8: *(u64 *)data = val; break; |
| 1315 | case 4: *(u32 *)data = val; break; |
| 1316 | case 2: *(u16 *)data = val; break; |
| 1317 | case 1: *(u8 *)data = val; break; |
| 1318 | } |
| 1319 | } else { |
| 1320 | switch (bytes) { |
| 1321 | case 8: *(u64 *)data = swab64(val); break; |
| 1322 | case 4: *(u32 *)data = swab32(val); break; |
| 1323 | case 2: *(u16 *)data = swab16(val); break; |
| 1324 | case 1: *(u8 *)data = val; break; |
| 1325 | } |
| 1326 | } |
| 1327 | |
| 1328 | idx = srcu_read_lock(&vcpu->kvm->srcu); |
| 1329 | |
| 1330 | ret = kvm_io_bus_write(vcpu, KVM_MMIO_BUS, run->mmio.phys_addr, |
| 1331 | bytes, &run->mmio.data); |
| 1332 | |
| 1333 | srcu_read_unlock(&vcpu->kvm->srcu, idx); |
| 1334 | |
| 1335 | if (!ret) { |
| 1336 | vcpu->mmio_needed = 0; |
| 1337 | return EMULATE_DONE; |
| 1338 | } |
| 1339 | |
| 1340 | return EMULATE_DO_MMIO; |
| 1341 | } |
| 1342 | EXPORT_SYMBOL_GPL(kvmppc_handle_store); |
| 1343 | |
| 1344 | #ifdef CONFIG_VSX |
| 1345 | static inline int kvmppc_get_vsr_data(struct kvm_vcpu *vcpu, int rs, u64 *val) |
| 1346 | { |
| 1347 | u32 dword_offset, word_offset; |
| 1348 | union kvmppc_one_reg reg; |
| 1349 | int vsx_offset = 0; |
| 1350 | int copy_type = vcpu->arch.mmio_copy_type; |
| 1351 | int result = 0; |
| 1352 | |
| 1353 | switch (copy_type) { |
| 1354 | case KVMPPC_VSX_COPY_DWORD: |
| 1355 | vsx_offset = |
| 1356 | kvmppc_get_vsr_dword_offset(vcpu->arch.mmio_vsx_offset); |
| 1357 | |
| 1358 | if (vsx_offset == -1) { |
| 1359 | result = -1; |
| 1360 | break; |
| 1361 | } |
| 1362 | |
| 1363 | if (rs < 32) { |
| 1364 | *val = VCPU_VSX_FPR(vcpu, rs, vsx_offset); |
| 1365 | } else { |
| 1366 | reg.vval = VCPU_VSX_VR(vcpu, rs - 32); |
| 1367 | *val = reg.vsxval[vsx_offset]; |
| 1368 | } |
| 1369 | break; |
| 1370 | |
| 1371 | case KVMPPC_VSX_COPY_WORD: |
| 1372 | vsx_offset = |
| 1373 | kvmppc_get_vsr_word_offset(vcpu->arch.mmio_vsx_offset); |
| 1374 | |
| 1375 | if (vsx_offset == -1) { |
| 1376 | result = -1; |
| 1377 | break; |
| 1378 | } |
| 1379 | |
| 1380 | if (rs < 32) { |
| 1381 | dword_offset = vsx_offset / 2; |
| 1382 | word_offset = vsx_offset % 2; |
| 1383 | reg.vsxval[0] = VCPU_VSX_FPR(vcpu, rs, dword_offset); |
| 1384 | *val = reg.vsx32val[word_offset]; |
| 1385 | } else { |
| 1386 | reg.vval = VCPU_VSX_VR(vcpu, rs - 32); |
| 1387 | *val = reg.vsx32val[vsx_offset]; |
| 1388 | } |
| 1389 | break; |
| 1390 | |
| 1391 | default: |
| 1392 | result = -1; |
| 1393 | break; |
| 1394 | } |
| 1395 | |
| 1396 | return result; |
| 1397 | } |
| 1398 | |
| 1399 | int kvmppc_handle_vsx_store(struct kvm_run *run, struct kvm_vcpu *vcpu, |
| 1400 | int rs, unsigned int bytes, int is_default_endian) |
| 1401 | { |
| 1402 | u64 val; |
| 1403 | enum emulation_result emulated = EMULATE_DONE; |
| 1404 | |
| 1405 | vcpu->arch.io_gpr = rs; |
| 1406 | |
| 1407 | /* Currently, mmio_vsx_copy_nums only allowed to be 4 or less */ |
| 1408 | if (vcpu->arch.mmio_vsx_copy_nums > 4) |
| 1409 | return EMULATE_FAIL; |
| 1410 | |
| 1411 | while (vcpu->arch.mmio_vsx_copy_nums) { |
| 1412 | if (kvmppc_get_vsr_data(vcpu, rs, &val) == -1) |
| 1413 | return EMULATE_FAIL; |
| 1414 | |
| 1415 | emulated = kvmppc_handle_store(run, vcpu, |
| 1416 | val, bytes, is_default_endian); |
| 1417 | |
| 1418 | if (emulated != EMULATE_DONE) |
| 1419 | break; |
| 1420 | |
| 1421 | vcpu->arch.paddr_accessed += run->mmio.len; |
| 1422 | |
| 1423 | vcpu->arch.mmio_vsx_copy_nums--; |
| 1424 | vcpu->arch.mmio_vsx_offset++; |
| 1425 | } |
| 1426 | |
| 1427 | return emulated; |
| 1428 | } |
| 1429 | |
| 1430 | static int kvmppc_emulate_mmio_vsx_loadstore(struct kvm_vcpu *vcpu, |
| 1431 | struct kvm_run *run) |
| 1432 | { |
| 1433 | enum emulation_result emulated = EMULATE_FAIL; |
| 1434 | int r; |
| 1435 | |
| 1436 | vcpu->arch.paddr_accessed += run->mmio.len; |
| 1437 | |
| 1438 | if (!vcpu->mmio_is_write) { |
| 1439 | emulated = kvmppc_handle_vsx_load(run, vcpu, vcpu->arch.io_gpr, |
| 1440 | run->mmio.len, 1, vcpu->arch.mmio_sign_extend); |
| 1441 | } else { |
| 1442 | emulated = kvmppc_handle_vsx_store(run, vcpu, |
| 1443 | vcpu->arch.io_gpr, run->mmio.len, 1); |
| 1444 | } |
| 1445 | |
| 1446 | switch (emulated) { |
| 1447 | case EMULATE_DO_MMIO: |
| 1448 | run->exit_reason = KVM_EXIT_MMIO; |
| 1449 | r = RESUME_HOST; |
| 1450 | break; |
| 1451 | case EMULATE_FAIL: |
| 1452 | pr_info("KVM: MMIO emulation failed (VSX repeat)\n"); |
| 1453 | run->exit_reason = KVM_EXIT_INTERNAL_ERROR; |
| 1454 | run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION; |
| 1455 | r = RESUME_HOST; |
| 1456 | break; |
| 1457 | default: |
| 1458 | r = RESUME_GUEST; |
| 1459 | break; |
| 1460 | } |
| 1461 | return r; |
| 1462 | } |
| 1463 | #endif /* CONFIG_VSX */ |
| 1464 | |
| 1465 | #ifdef CONFIG_ALTIVEC |
| 1466 | int kvmppc_handle_vmx_load(struct kvm_run *run, struct kvm_vcpu *vcpu, |
| 1467 | unsigned int rt, unsigned int bytes, int is_default_endian) |
| 1468 | { |
| 1469 | enum emulation_result emulated = EMULATE_DONE; |
| 1470 | |
| 1471 | if (vcpu->arch.mmio_vsx_copy_nums > 2) |
| 1472 | return EMULATE_FAIL; |
| 1473 | |
| 1474 | while (vcpu->arch.mmio_vmx_copy_nums) { |
| 1475 | emulated = __kvmppc_handle_load(run, vcpu, rt, bytes, |
| 1476 | is_default_endian, 0); |
| 1477 | |
| 1478 | if (emulated != EMULATE_DONE) |
| 1479 | break; |
| 1480 | |
| 1481 | vcpu->arch.paddr_accessed += run->mmio.len; |
| 1482 | vcpu->arch.mmio_vmx_copy_nums--; |
| 1483 | vcpu->arch.mmio_vmx_offset++; |
| 1484 | } |
| 1485 | |
| 1486 | return emulated; |
| 1487 | } |
| 1488 | |
| 1489 | int kvmppc_get_vmx_dword(struct kvm_vcpu *vcpu, int index, u64 *val) |
| 1490 | { |
| 1491 | union kvmppc_one_reg reg; |
| 1492 | int vmx_offset = 0; |
| 1493 | int result = 0; |
| 1494 | |
| 1495 | vmx_offset = |
| 1496 | kvmppc_get_vmx_dword_offset(vcpu, vcpu->arch.mmio_vmx_offset); |
| 1497 | |
| 1498 | if (vmx_offset == -1) |
| 1499 | return -1; |
| 1500 | |
| 1501 | reg.vval = VCPU_VSX_VR(vcpu, index); |
| 1502 | *val = reg.vsxval[vmx_offset]; |
| 1503 | |
| 1504 | return result; |
| 1505 | } |
| 1506 | |
| 1507 | int kvmppc_get_vmx_word(struct kvm_vcpu *vcpu, int index, u64 *val) |
| 1508 | { |
| 1509 | union kvmppc_one_reg reg; |
| 1510 | int vmx_offset = 0; |
| 1511 | int result = 0; |
| 1512 | |
| 1513 | vmx_offset = |
| 1514 | kvmppc_get_vmx_word_offset(vcpu, vcpu->arch.mmio_vmx_offset); |
| 1515 | |
| 1516 | if (vmx_offset == -1) |
| 1517 | return -1; |
| 1518 | |
| 1519 | reg.vval = VCPU_VSX_VR(vcpu, index); |
| 1520 | *val = reg.vsx32val[vmx_offset]; |
| 1521 | |
| 1522 | return result; |
| 1523 | } |
| 1524 | |
| 1525 | int kvmppc_get_vmx_hword(struct kvm_vcpu *vcpu, int index, u64 *val) |
| 1526 | { |
| 1527 | union kvmppc_one_reg reg; |
| 1528 | int vmx_offset = 0; |
| 1529 | int result = 0; |
| 1530 | |
| 1531 | vmx_offset = |
| 1532 | kvmppc_get_vmx_hword_offset(vcpu, vcpu->arch.mmio_vmx_offset); |
| 1533 | |
| 1534 | if (vmx_offset == -1) |
| 1535 | return -1; |
| 1536 | |
| 1537 | reg.vval = VCPU_VSX_VR(vcpu, index); |
| 1538 | *val = reg.vsx16val[vmx_offset]; |
| 1539 | |
| 1540 | return result; |
| 1541 | } |
| 1542 | |
| 1543 | int kvmppc_get_vmx_byte(struct kvm_vcpu *vcpu, int index, u64 *val) |
| 1544 | { |
| 1545 | union kvmppc_one_reg reg; |
| 1546 | int vmx_offset = 0; |
| 1547 | int result = 0; |
| 1548 | |
| 1549 | vmx_offset = |
| 1550 | kvmppc_get_vmx_byte_offset(vcpu, vcpu->arch.mmio_vmx_offset); |
| 1551 | |
| 1552 | if (vmx_offset == -1) |
| 1553 | return -1; |
| 1554 | |
| 1555 | reg.vval = VCPU_VSX_VR(vcpu, index); |
| 1556 | *val = reg.vsx8val[vmx_offset]; |
| 1557 | |
| 1558 | return result; |
| 1559 | } |
| 1560 | |
| 1561 | int kvmppc_handle_vmx_store(struct kvm_run *run, struct kvm_vcpu *vcpu, |
| 1562 | unsigned int rs, unsigned int bytes, int is_default_endian) |
| 1563 | { |
| 1564 | u64 val = 0; |
| 1565 | unsigned int index = rs & KVM_MMIO_REG_MASK; |
| 1566 | enum emulation_result emulated = EMULATE_DONE; |
| 1567 | |
| 1568 | if (vcpu->arch.mmio_vsx_copy_nums > 2) |
| 1569 | return EMULATE_FAIL; |
| 1570 | |
| 1571 | vcpu->arch.io_gpr = rs; |
| 1572 | |
| 1573 | while (vcpu->arch.mmio_vmx_copy_nums) { |
| 1574 | switch (vcpu->arch.mmio_copy_type) { |
| 1575 | case KVMPPC_VMX_COPY_DWORD: |
| 1576 | if (kvmppc_get_vmx_dword(vcpu, index, &val) == -1) |
| 1577 | return EMULATE_FAIL; |
| 1578 | |
| 1579 | break; |
| 1580 | case KVMPPC_VMX_COPY_WORD: |
| 1581 | if (kvmppc_get_vmx_word(vcpu, index, &val) == -1) |
| 1582 | return EMULATE_FAIL; |
| 1583 | break; |
| 1584 | case KVMPPC_VMX_COPY_HWORD: |
| 1585 | if (kvmppc_get_vmx_hword(vcpu, index, &val) == -1) |
| 1586 | return EMULATE_FAIL; |
| 1587 | break; |
| 1588 | case KVMPPC_VMX_COPY_BYTE: |
| 1589 | if (kvmppc_get_vmx_byte(vcpu, index, &val) == -1) |
| 1590 | return EMULATE_FAIL; |
| 1591 | break; |
| 1592 | default: |
| 1593 | return EMULATE_FAIL; |
| 1594 | } |
| 1595 | |
| 1596 | emulated = kvmppc_handle_store(run, vcpu, val, bytes, |
| 1597 | is_default_endian); |
| 1598 | if (emulated != EMULATE_DONE) |
| 1599 | break; |
| 1600 | |
| 1601 | vcpu->arch.paddr_accessed += run->mmio.len; |
| 1602 | vcpu->arch.mmio_vmx_copy_nums--; |
| 1603 | vcpu->arch.mmio_vmx_offset++; |
| 1604 | } |
| 1605 | |
| 1606 | return emulated; |
| 1607 | } |
| 1608 | |
| 1609 | static int kvmppc_emulate_mmio_vmx_loadstore(struct kvm_vcpu *vcpu, |
| 1610 | struct kvm_run *run) |
| 1611 | { |
| 1612 | enum emulation_result emulated = EMULATE_FAIL; |
| 1613 | int r; |
| 1614 | |
| 1615 | vcpu->arch.paddr_accessed += run->mmio.len; |
| 1616 | |
| 1617 | if (!vcpu->mmio_is_write) { |
| 1618 | emulated = kvmppc_handle_vmx_load(run, vcpu, |
| 1619 | vcpu->arch.io_gpr, run->mmio.len, 1); |
| 1620 | } else { |
| 1621 | emulated = kvmppc_handle_vmx_store(run, vcpu, |
| 1622 | vcpu->arch.io_gpr, run->mmio.len, 1); |
| 1623 | } |
| 1624 | |
| 1625 | switch (emulated) { |
| 1626 | case EMULATE_DO_MMIO: |
| 1627 | run->exit_reason = KVM_EXIT_MMIO; |
| 1628 | r = RESUME_HOST; |
| 1629 | break; |
| 1630 | case EMULATE_FAIL: |
| 1631 | pr_info("KVM: MMIO emulation failed (VMX repeat)\n"); |
| 1632 | run->exit_reason = KVM_EXIT_INTERNAL_ERROR; |
| 1633 | run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION; |
| 1634 | r = RESUME_HOST; |
| 1635 | break; |
| 1636 | default: |
| 1637 | r = RESUME_GUEST; |
| 1638 | break; |
| 1639 | } |
| 1640 | return r; |
| 1641 | } |
| 1642 | #endif /* CONFIG_ALTIVEC */ |
| 1643 | |
| 1644 | int kvm_vcpu_ioctl_get_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) |
| 1645 | { |
| 1646 | int r = 0; |
| 1647 | union kvmppc_one_reg val; |
| 1648 | int size; |
| 1649 | |
| 1650 | size = one_reg_size(reg->id); |
| 1651 | if (size > sizeof(val)) |
| 1652 | return -EINVAL; |
| 1653 | |
| 1654 | r = kvmppc_get_one_reg(vcpu, reg->id, &val); |
| 1655 | if (r == -EINVAL) { |
| 1656 | r = 0; |
| 1657 | switch (reg->id) { |
| 1658 | #ifdef CONFIG_ALTIVEC |
| 1659 | case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31: |
| 1660 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { |
| 1661 | r = -ENXIO; |
| 1662 | break; |
| 1663 | } |
| 1664 | val.vval = vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0]; |
| 1665 | break; |
| 1666 | case KVM_REG_PPC_VSCR: |
| 1667 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { |
| 1668 | r = -ENXIO; |
| 1669 | break; |
| 1670 | } |
| 1671 | val = get_reg_val(reg->id, vcpu->arch.vr.vscr.u[3]); |
| 1672 | break; |
| 1673 | case KVM_REG_PPC_VRSAVE: |
| 1674 | val = get_reg_val(reg->id, vcpu->arch.vrsave); |
| 1675 | break; |
| 1676 | #endif /* CONFIG_ALTIVEC */ |
| 1677 | default: |
| 1678 | r = -EINVAL; |
| 1679 | break; |
| 1680 | } |
| 1681 | } |
| 1682 | |
| 1683 | if (r) |
| 1684 | return r; |
| 1685 | |
| 1686 | if (copy_to_user((char __user *)(unsigned long)reg->addr, &val, size)) |
| 1687 | r = -EFAULT; |
| 1688 | |
| 1689 | return r; |
| 1690 | } |
| 1691 | |
| 1692 | int kvm_vcpu_ioctl_set_one_reg(struct kvm_vcpu *vcpu, struct kvm_one_reg *reg) |
| 1693 | { |
| 1694 | int r; |
| 1695 | union kvmppc_one_reg val; |
| 1696 | int size; |
| 1697 | |
| 1698 | size = one_reg_size(reg->id); |
| 1699 | if (size > sizeof(val)) |
| 1700 | return -EINVAL; |
| 1701 | |
| 1702 | if (copy_from_user(&val, (char __user *)(unsigned long)reg->addr, size)) |
| 1703 | return -EFAULT; |
| 1704 | |
| 1705 | r = kvmppc_set_one_reg(vcpu, reg->id, &val); |
| 1706 | if (r == -EINVAL) { |
| 1707 | r = 0; |
| 1708 | switch (reg->id) { |
| 1709 | #ifdef CONFIG_ALTIVEC |
| 1710 | case KVM_REG_PPC_VR0 ... KVM_REG_PPC_VR31: |
| 1711 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { |
| 1712 | r = -ENXIO; |
| 1713 | break; |
| 1714 | } |
| 1715 | vcpu->arch.vr.vr[reg->id - KVM_REG_PPC_VR0] = val.vval; |
| 1716 | break; |
| 1717 | case KVM_REG_PPC_VSCR: |
| 1718 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { |
| 1719 | r = -ENXIO; |
| 1720 | break; |
| 1721 | } |
| 1722 | vcpu->arch.vr.vscr.u[3] = set_reg_val(reg->id, val); |
| 1723 | break; |
| 1724 | case KVM_REG_PPC_VRSAVE: |
| 1725 | if (!cpu_has_feature(CPU_FTR_ALTIVEC)) { |
| 1726 | r = -ENXIO; |
| 1727 | break; |
| 1728 | } |
| 1729 | vcpu->arch.vrsave = set_reg_val(reg->id, val); |
| 1730 | break; |
| 1731 | #endif /* CONFIG_ALTIVEC */ |
| 1732 | default: |
| 1733 | r = -EINVAL; |
| 1734 | break; |
| 1735 | } |
| 1736 | } |
| 1737 | |
| 1738 | return r; |
| 1739 | } |
| 1740 | |
| 1741 | int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run) |
| 1742 | { |
| 1743 | int r; |
| 1744 | |
| 1745 | vcpu_load(vcpu); |
| 1746 | |
| 1747 | if (vcpu->mmio_needed) { |
| 1748 | vcpu->mmio_needed = 0; |
| 1749 | if (!vcpu->mmio_is_write) |
| 1750 | kvmppc_complete_mmio_load(vcpu, run); |
| 1751 | #ifdef CONFIG_VSX |
| 1752 | if (vcpu->arch.mmio_vsx_copy_nums > 0) { |
| 1753 | vcpu->arch.mmio_vsx_copy_nums--; |
| 1754 | vcpu->arch.mmio_vsx_offset++; |
| 1755 | } |
| 1756 | |
| 1757 | if (vcpu->arch.mmio_vsx_copy_nums > 0) { |
| 1758 | r = kvmppc_emulate_mmio_vsx_loadstore(vcpu, run); |
| 1759 | if (r == RESUME_HOST) { |
| 1760 | vcpu->mmio_needed = 1; |
| 1761 | goto out; |
| 1762 | } |
| 1763 | } |
| 1764 | #endif |
| 1765 | #ifdef CONFIG_ALTIVEC |
| 1766 | if (vcpu->arch.mmio_vmx_copy_nums > 0) { |
| 1767 | vcpu->arch.mmio_vmx_copy_nums--; |
| 1768 | vcpu->arch.mmio_vmx_offset++; |
| 1769 | } |
| 1770 | |
| 1771 | if (vcpu->arch.mmio_vmx_copy_nums > 0) { |
| 1772 | r = kvmppc_emulate_mmio_vmx_loadstore(vcpu, run); |
| 1773 | if (r == RESUME_HOST) { |
| 1774 | vcpu->mmio_needed = 1; |
| 1775 | goto out; |
| 1776 | } |
| 1777 | } |
| 1778 | #endif |
| 1779 | } else if (vcpu->arch.osi_needed) { |
| 1780 | u64 *gprs = run->osi.gprs; |
| 1781 | int i; |
| 1782 | |
| 1783 | for (i = 0; i < 32; i++) |
| 1784 | kvmppc_set_gpr(vcpu, i, gprs[i]); |
| 1785 | vcpu->arch.osi_needed = 0; |
| 1786 | } else if (vcpu->arch.hcall_needed) { |
| 1787 | int i; |
| 1788 | |
| 1789 | kvmppc_set_gpr(vcpu, 3, run->papr_hcall.ret); |
| 1790 | for (i = 0; i < 9; ++i) |
| 1791 | kvmppc_set_gpr(vcpu, 4 + i, run->papr_hcall.args[i]); |
| 1792 | vcpu->arch.hcall_needed = 0; |
| 1793 | #ifdef CONFIG_BOOKE |
| 1794 | } else if (vcpu->arch.epr_needed) { |
| 1795 | kvmppc_set_epr(vcpu, run->epr.epr); |
| 1796 | vcpu->arch.epr_needed = 0; |
| 1797 | #endif |
| 1798 | } |
| 1799 | |
| 1800 | kvm_sigset_activate(vcpu); |
| 1801 | |
| 1802 | if (run->immediate_exit) |
| 1803 | r = -EINTR; |
| 1804 | else |
| 1805 | r = kvmppc_vcpu_run(run, vcpu); |
| 1806 | |
| 1807 | kvm_sigset_deactivate(vcpu); |
| 1808 | |
| 1809 | #ifdef CONFIG_ALTIVEC |
| 1810 | out: |
| 1811 | #endif |
| 1812 | vcpu_put(vcpu); |
| 1813 | return r; |
| 1814 | } |
| 1815 | |
| 1816 | int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu, struct kvm_interrupt *irq) |
| 1817 | { |
| 1818 | if (irq->irq == KVM_INTERRUPT_UNSET) { |
| 1819 | kvmppc_core_dequeue_external(vcpu); |
| 1820 | return 0; |
| 1821 | } |
| 1822 | |
| 1823 | kvmppc_core_queue_external(vcpu, irq); |
| 1824 | |
| 1825 | kvm_vcpu_kick(vcpu); |
| 1826 | |
| 1827 | return 0; |
| 1828 | } |
| 1829 | |
| 1830 | static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu, |
| 1831 | struct kvm_enable_cap *cap) |
| 1832 | { |
| 1833 | int r; |
| 1834 | |
| 1835 | if (cap->flags) |
| 1836 | return -EINVAL; |
| 1837 | |
| 1838 | switch (cap->cap) { |
| 1839 | case KVM_CAP_PPC_OSI: |
| 1840 | r = 0; |
| 1841 | vcpu->arch.osi_enabled = true; |
| 1842 | break; |
| 1843 | case KVM_CAP_PPC_PAPR: |
| 1844 | r = 0; |
| 1845 | vcpu->arch.papr_enabled = true; |
| 1846 | break; |
| 1847 | case KVM_CAP_PPC_EPR: |
| 1848 | r = 0; |
| 1849 | if (cap->args[0]) |
| 1850 | vcpu->arch.epr_flags |= KVMPPC_EPR_USER; |
| 1851 | else |
| 1852 | vcpu->arch.epr_flags &= ~KVMPPC_EPR_USER; |
| 1853 | break; |
| 1854 | #ifdef CONFIG_BOOKE |
| 1855 | case KVM_CAP_PPC_BOOKE_WATCHDOG: |
| 1856 | r = 0; |
| 1857 | vcpu->arch.watchdog_enabled = true; |
| 1858 | break; |
| 1859 | #endif |
| 1860 | #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) |
| 1861 | case KVM_CAP_SW_TLB: { |
| 1862 | struct kvm_config_tlb cfg; |
| 1863 | void __user *user_ptr = (void __user *)(uintptr_t)cap->args[0]; |
| 1864 | |
| 1865 | r = -EFAULT; |
| 1866 | if (copy_from_user(&cfg, user_ptr, sizeof(cfg))) |
| 1867 | break; |
| 1868 | |
| 1869 | r = kvm_vcpu_ioctl_config_tlb(vcpu, &cfg); |
| 1870 | break; |
| 1871 | } |
| 1872 | #endif |
| 1873 | #ifdef CONFIG_KVM_MPIC |
| 1874 | case KVM_CAP_IRQ_MPIC: { |
| 1875 | struct fd f; |
| 1876 | struct kvm_device *dev; |
| 1877 | |
| 1878 | r = -EBADF; |
| 1879 | f = fdget(cap->args[0]); |
| 1880 | if (!f.file) |
| 1881 | break; |
| 1882 | |
| 1883 | r = -EPERM; |
| 1884 | dev = kvm_device_from_filp(f.file); |
| 1885 | if (dev) |
| 1886 | r = kvmppc_mpic_connect_vcpu(dev, vcpu, cap->args[1]); |
| 1887 | |
| 1888 | fdput(f); |
| 1889 | break; |
| 1890 | } |
| 1891 | #endif |
| 1892 | #ifdef CONFIG_KVM_XICS |
| 1893 | case KVM_CAP_IRQ_XICS: { |
| 1894 | struct fd f; |
| 1895 | struct kvm_device *dev; |
| 1896 | |
| 1897 | r = -EBADF; |
| 1898 | f = fdget(cap->args[0]); |
| 1899 | if (!f.file) |
| 1900 | break; |
| 1901 | |
| 1902 | r = -EPERM; |
| 1903 | dev = kvm_device_from_filp(f.file); |
| 1904 | if (dev) { |
| 1905 | if (xive_enabled()) |
| 1906 | r = kvmppc_xive_connect_vcpu(dev, vcpu, cap->args[1]); |
| 1907 | else |
| 1908 | r = kvmppc_xics_connect_vcpu(dev, vcpu, cap->args[1]); |
| 1909 | } |
| 1910 | |
| 1911 | fdput(f); |
| 1912 | break; |
| 1913 | } |
| 1914 | #endif /* CONFIG_KVM_XICS */ |
| 1915 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
| 1916 | case KVM_CAP_PPC_FWNMI: |
| 1917 | r = -EINVAL; |
| 1918 | if (!is_kvmppc_hv_enabled(vcpu->kvm)) |
| 1919 | break; |
| 1920 | r = 0; |
| 1921 | vcpu->kvm->arch.fwnmi_enabled = true; |
| 1922 | break; |
| 1923 | #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */ |
| 1924 | default: |
| 1925 | r = -EINVAL; |
| 1926 | break; |
| 1927 | } |
| 1928 | |
| 1929 | if (!r) |
| 1930 | r = kvmppc_sanity_check(vcpu); |
| 1931 | |
| 1932 | return r; |
| 1933 | } |
| 1934 | |
| 1935 | bool kvm_arch_intc_initialized(struct kvm *kvm) |
| 1936 | { |
| 1937 | #ifdef CONFIG_KVM_MPIC |
| 1938 | if (kvm->arch.mpic) |
| 1939 | return true; |
| 1940 | #endif |
| 1941 | #ifdef CONFIG_KVM_XICS |
| 1942 | if (kvm->arch.xics || kvm->arch.xive) |
| 1943 | return true; |
| 1944 | #endif |
| 1945 | return false; |
| 1946 | } |
| 1947 | |
| 1948 | int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu, |
| 1949 | struct kvm_mp_state *mp_state) |
| 1950 | { |
| 1951 | return -EINVAL; |
| 1952 | } |
| 1953 | |
| 1954 | int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu, |
| 1955 | struct kvm_mp_state *mp_state) |
| 1956 | { |
| 1957 | return -EINVAL; |
| 1958 | } |
| 1959 | |
| 1960 | long kvm_arch_vcpu_async_ioctl(struct file *filp, |
| 1961 | unsigned int ioctl, unsigned long arg) |
| 1962 | { |
| 1963 | struct kvm_vcpu *vcpu = filp->private_data; |
| 1964 | void __user *argp = (void __user *)arg; |
| 1965 | |
| 1966 | if (ioctl == KVM_INTERRUPT) { |
| 1967 | struct kvm_interrupt irq; |
| 1968 | if (copy_from_user(&irq, argp, sizeof(irq))) |
| 1969 | return -EFAULT; |
| 1970 | return kvm_vcpu_ioctl_interrupt(vcpu, &irq); |
| 1971 | } |
| 1972 | return -ENOIOCTLCMD; |
| 1973 | } |
| 1974 | |
| 1975 | long kvm_arch_vcpu_ioctl(struct file *filp, |
| 1976 | unsigned int ioctl, unsigned long arg) |
| 1977 | { |
| 1978 | struct kvm_vcpu *vcpu = filp->private_data; |
| 1979 | void __user *argp = (void __user *)arg; |
| 1980 | long r; |
| 1981 | |
| 1982 | switch (ioctl) { |
| 1983 | case KVM_ENABLE_CAP: |
| 1984 | { |
| 1985 | struct kvm_enable_cap cap; |
| 1986 | r = -EFAULT; |
| 1987 | vcpu_load(vcpu); |
| 1988 | if (copy_from_user(&cap, argp, sizeof(cap))) |
| 1989 | goto out; |
| 1990 | r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap); |
| 1991 | vcpu_put(vcpu); |
| 1992 | break; |
| 1993 | } |
| 1994 | |
| 1995 | case KVM_SET_ONE_REG: |
| 1996 | case KVM_GET_ONE_REG: |
| 1997 | { |
| 1998 | struct kvm_one_reg reg; |
| 1999 | r = -EFAULT; |
| 2000 | if (copy_from_user(®, argp, sizeof(reg))) |
| 2001 | goto out; |
| 2002 | if (ioctl == KVM_SET_ONE_REG) |
| 2003 | r = kvm_vcpu_ioctl_set_one_reg(vcpu, ®); |
| 2004 | else |
| 2005 | r = kvm_vcpu_ioctl_get_one_reg(vcpu, ®); |
| 2006 | break; |
| 2007 | } |
| 2008 | |
| 2009 | #if defined(CONFIG_KVM_E500V2) || defined(CONFIG_KVM_E500MC) |
| 2010 | case KVM_DIRTY_TLB: { |
| 2011 | struct kvm_dirty_tlb dirty; |
| 2012 | r = -EFAULT; |
| 2013 | vcpu_load(vcpu); |
| 2014 | if (copy_from_user(&dirty, argp, sizeof(dirty))) |
| 2015 | goto out; |
| 2016 | r = kvm_vcpu_ioctl_dirty_tlb(vcpu, &dirty); |
| 2017 | vcpu_put(vcpu); |
| 2018 | break; |
| 2019 | } |
| 2020 | #endif |
| 2021 | default: |
| 2022 | r = -EINVAL; |
| 2023 | } |
| 2024 | |
| 2025 | out: |
| 2026 | return r; |
| 2027 | } |
| 2028 | |
| 2029 | vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf) |
| 2030 | { |
| 2031 | return VM_FAULT_SIGBUS; |
| 2032 | } |
| 2033 | |
| 2034 | static int kvm_vm_ioctl_get_pvinfo(struct kvm_ppc_pvinfo *pvinfo) |
| 2035 | { |
| 2036 | u32 inst_nop = 0x60000000; |
| 2037 | #ifdef CONFIG_KVM_BOOKE_HV |
| 2038 | u32 inst_sc1 = 0x44000022; |
| 2039 | pvinfo->hcall[0] = cpu_to_be32(inst_sc1); |
| 2040 | pvinfo->hcall[1] = cpu_to_be32(inst_nop); |
| 2041 | pvinfo->hcall[2] = cpu_to_be32(inst_nop); |
| 2042 | pvinfo->hcall[3] = cpu_to_be32(inst_nop); |
| 2043 | #else |
| 2044 | u32 inst_lis = 0x3c000000; |
| 2045 | u32 inst_ori = 0x60000000; |
| 2046 | u32 inst_sc = 0x44000002; |
| 2047 | u32 inst_imm_mask = 0xffff; |
| 2048 | |
| 2049 | /* |
| 2050 | * The hypercall to get into KVM from within guest context is as |
| 2051 | * follows: |
| 2052 | * |
| 2053 | * lis r0, r0, KVM_SC_MAGIC_R0@h |
| 2054 | * ori r0, KVM_SC_MAGIC_R0@l |
| 2055 | * sc |
| 2056 | * nop |
| 2057 | */ |
| 2058 | pvinfo->hcall[0] = cpu_to_be32(inst_lis | ((KVM_SC_MAGIC_R0 >> 16) & inst_imm_mask)); |
| 2059 | pvinfo->hcall[1] = cpu_to_be32(inst_ori | (KVM_SC_MAGIC_R0 & inst_imm_mask)); |
| 2060 | pvinfo->hcall[2] = cpu_to_be32(inst_sc); |
| 2061 | pvinfo->hcall[3] = cpu_to_be32(inst_nop); |
| 2062 | #endif |
| 2063 | |
| 2064 | pvinfo->flags = KVM_PPC_PVINFO_FLAGS_EV_IDLE; |
| 2065 | |
| 2066 | return 0; |
| 2067 | } |
| 2068 | |
| 2069 | int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event, |
| 2070 | bool line_status) |
| 2071 | { |
| 2072 | if (!irqchip_in_kernel(kvm)) |
| 2073 | return -ENXIO; |
| 2074 | |
| 2075 | irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID, |
| 2076 | irq_event->irq, irq_event->level, |
| 2077 | line_status); |
| 2078 | return 0; |
| 2079 | } |
| 2080 | |
| 2081 | |
| 2082 | static int kvm_vm_ioctl_enable_cap(struct kvm *kvm, |
| 2083 | struct kvm_enable_cap *cap) |
| 2084 | { |
| 2085 | int r; |
| 2086 | |
| 2087 | if (cap->flags) |
| 2088 | return -EINVAL; |
| 2089 | |
| 2090 | switch (cap->cap) { |
| 2091 | #ifdef CONFIG_KVM_BOOK3S_64_HANDLER |
| 2092 | case KVM_CAP_PPC_ENABLE_HCALL: { |
| 2093 | unsigned long hcall = cap->args[0]; |
| 2094 | |
| 2095 | r = -EINVAL; |
| 2096 | if (hcall > MAX_HCALL_OPCODE || (hcall & 3) || |
| 2097 | cap->args[1] > 1) |
| 2098 | break; |
| 2099 | if (!kvmppc_book3s_hcall_implemented(kvm, hcall)) |
| 2100 | break; |
| 2101 | if (cap->args[1]) |
| 2102 | set_bit(hcall / 4, kvm->arch.enabled_hcalls); |
| 2103 | else |
| 2104 | clear_bit(hcall / 4, kvm->arch.enabled_hcalls); |
| 2105 | r = 0; |
| 2106 | break; |
| 2107 | } |
| 2108 | case KVM_CAP_PPC_SMT: { |
| 2109 | unsigned long mode = cap->args[0]; |
| 2110 | unsigned long flags = cap->args[1]; |
| 2111 | |
| 2112 | r = -EINVAL; |
| 2113 | if (kvm->arch.kvm_ops->set_smt_mode) |
| 2114 | r = kvm->arch.kvm_ops->set_smt_mode(kvm, mode, flags); |
| 2115 | break; |
| 2116 | } |
| 2117 | #endif |
| 2118 | default: |
| 2119 | r = -EINVAL; |
| 2120 | break; |
| 2121 | } |
| 2122 | |
| 2123 | return r; |
| 2124 | } |
| 2125 | |
| 2126 | #ifdef CONFIG_PPC_BOOK3S_64 |
| 2127 | /* |
| 2128 | * These functions check whether the underlying hardware is safe |
| 2129 | * against attacks based on observing the effects of speculatively |
| 2130 | * executed instructions, and whether it supplies instructions for |
| 2131 | * use in workarounds. The information comes from firmware, either |
| 2132 | * via the device tree on powernv platforms or from an hcall on |
| 2133 | * pseries platforms. |
| 2134 | */ |
| 2135 | #ifdef CONFIG_PPC_PSERIES |
| 2136 | static int pseries_get_cpu_char(struct kvm_ppc_cpu_char *cp) |
| 2137 | { |
| 2138 | struct h_cpu_char_result c; |
| 2139 | unsigned long rc; |
| 2140 | |
| 2141 | if (!machine_is(pseries)) |
| 2142 | return -ENOTTY; |
| 2143 | |
| 2144 | rc = plpar_get_cpu_characteristics(&c); |
| 2145 | if (rc == H_SUCCESS) { |
| 2146 | cp->character = c.character; |
| 2147 | cp->behaviour = c.behaviour; |
| 2148 | cp->character_mask = KVM_PPC_CPU_CHAR_SPEC_BAR_ORI31 | |
| 2149 | KVM_PPC_CPU_CHAR_BCCTRL_SERIALISED | |
| 2150 | KVM_PPC_CPU_CHAR_L1D_FLUSH_ORI30 | |
| 2151 | KVM_PPC_CPU_CHAR_L1D_FLUSH_TRIG2 | |
| 2152 | KVM_PPC_CPU_CHAR_L1D_THREAD_PRIV | |
| 2153 | KVM_PPC_CPU_CHAR_BR_HINT_HONOURED | |
| 2154 | KVM_PPC_CPU_CHAR_MTTRIG_THR_RECONF | |
| 2155 | KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS; |
| 2156 | cp->behaviour_mask = KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY | |
| 2157 | KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR | |
| 2158 | KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR; |
| 2159 | } |
| 2160 | return 0; |
| 2161 | } |
| 2162 | #else |
| 2163 | static int pseries_get_cpu_char(struct kvm_ppc_cpu_char *cp) |
| 2164 | { |
| 2165 | return -ENOTTY; |
| 2166 | } |
| 2167 | #endif |
| 2168 | |
| 2169 | static inline bool have_fw_feat(struct device_node *fw_features, |
| 2170 | const char *state, const char *name) |
| 2171 | { |
| 2172 | struct device_node *np; |
| 2173 | bool r = false; |
| 2174 | |
| 2175 | np = of_get_child_by_name(fw_features, name); |
| 2176 | if (np) { |
| 2177 | r = of_property_read_bool(np, state); |
| 2178 | of_node_put(np); |
| 2179 | } |
| 2180 | return r; |
| 2181 | } |
| 2182 | |
| 2183 | static int kvmppc_get_cpu_char(struct kvm_ppc_cpu_char *cp) |
| 2184 | { |
| 2185 | struct device_node *np, *fw_features; |
| 2186 | int r; |
| 2187 | |
| 2188 | memset(cp, 0, sizeof(*cp)); |
| 2189 | r = pseries_get_cpu_char(cp); |
| 2190 | if (r != -ENOTTY) |
| 2191 | return r; |
| 2192 | |
| 2193 | np = of_find_node_by_name(NULL, "ibm,opal"); |
| 2194 | if (np) { |
| 2195 | fw_features = of_get_child_by_name(np, "fw-features"); |
| 2196 | of_node_put(np); |
| 2197 | if (!fw_features) |
| 2198 | return 0; |
| 2199 | if (have_fw_feat(fw_features, "enabled", |
| 2200 | "inst-spec-barrier-ori31,31,0")) |
| 2201 | cp->character |= KVM_PPC_CPU_CHAR_SPEC_BAR_ORI31; |
| 2202 | if (have_fw_feat(fw_features, "enabled", |
| 2203 | "fw-bcctrl-serialized")) |
| 2204 | cp->character |= KVM_PPC_CPU_CHAR_BCCTRL_SERIALISED; |
| 2205 | if (have_fw_feat(fw_features, "enabled", |
| 2206 | "inst-l1d-flush-ori30,30,0")) |
| 2207 | cp->character |= KVM_PPC_CPU_CHAR_L1D_FLUSH_ORI30; |
| 2208 | if (have_fw_feat(fw_features, "enabled", |
| 2209 | "inst-l1d-flush-trig2")) |
| 2210 | cp->character |= KVM_PPC_CPU_CHAR_L1D_FLUSH_TRIG2; |
| 2211 | if (have_fw_feat(fw_features, "enabled", |
| 2212 | "fw-l1d-thread-split")) |
| 2213 | cp->character |= KVM_PPC_CPU_CHAR_L1D_THREAD_PRIV; |
| 2214 | if (have_fw_feat(fw_features, "enabled", |
| 2215 | "fw-count-cache-disabled")) |
| 2216 | cp->character |= KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS; |
| 2217 | cp->character_mask = KVM_PPC_CPU_CHAR_SPEC_BAR_ORI31 | |
| 2218 | KVM_PPC_CPU_CHAR_BCCTRL_SERIALISED | |
| 2219 | KVM_PPC_CPU_CHAR_L1D_FLUSH_ORI30 | |
| 2220 | KVM_PPC_CPU_CHAR_L1D_FLUSH_TRIG2 | |
| 2221 | KVM_PPC_CPU_CHAR_L1D_THREAD_PRIV | |
| 2222 | KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS; |
| 2223 | |
| 2224 | if (have_fw_feat(fw_features, "enabled", |
| 2225 | "speculation-policy-favor-security")) |
| 2226 | cp->behaviour |= KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY; |
| 2227 | if (!have_fw_feat(fw_features, "disabled", |
| 2228 | "needs-l1d-flush-msr-pr-0-to-1")) |
| 2229 | cp->behaviour |= KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR; |
| 2230 | if (!have_fw_feat(fw_features, "disabled", |
| 2231 | "needs-spec-barrier-for-bound-checks")) |
| 2232 | cp->behaviour |= KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR; |
| 2233 | cp->behaviour_mask = KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY | |
| 2234 | KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR | |
| 2235 | KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR; |
| 2236 | |
| 2237 | of_node_put(fw_features); |
| 2238 | } |
| 2239 | |
| 2240 | return 0; |
| 2241 | } |
| 2242 | #endif |
| 2243 | |
| 2244 | long kvm_arch_vm_ioctl(struct file *filp, |
| 2245 | unsigned int ioctl, unsigned long arg) |
| 2246 | { |
| 2247 | struct kvm *kvm __maybe_unused = filp->private_data; |
| 2248 | void __user *argp = (void __user *)arg; |
| 2249 | long r; |
| 2250 | |
| 2251 | switch (ioctl) { |
| 2252 | case KVM_PPC_GET_PVINFO: { |
| 2253 | struct kvm_ppc_pvinfo pvinfo; |
| 2254 | memset(&pvinfo, 0, sizeof(pvinfo)); |
| 2255 | r = kvm_vm_ioctl_get_pvinfo(&pvinfo); |
| 2256 | if (copy_to_user(argp, &pvinfo, sizeof(pvinfo))) { |
| 2257 | r = -EFAULT; |
| 2258 | goto out; |
| 2259 | } |
| 2260 | |
| 2261 | break; |
| 2262 | } |
| 2263 | case KVM_ENABLE_CAP: |
| 2264 | { |
| 2265 | struct kvm_enable_cap cap; |
| 2266 | r = -EFAULT; |
| 2267 | if (copy_from_user(&cap, argp, sizeof(cap))) |
| 2268 | goto out; |
| 2269 | r = kvm_vm_ioctl_enable_cap(kvm, &cap); |
| 2270 | break; |
| 2271 | } |
| 2272 | #ifdef CONFIG_SPAPR_TCE_IOMMU |
| 2273 | case KVM_CREATE_SPAPR_TCE_64: { |
| 2274 | struct kvm_create_spapr_tce_64 create_tce_64; |
| 2275 | |
| 2276 | r = -EFAULT; |
| 2277 | if (copy_from_user(&create_tce_64, argp, sizeof(create_tce_64))) |
| 2278 | goto out; |
| 2279 | if (create_tce_64.flags) { |
| 2280 | r = -EINVAL; |
| 2281 | goto out; |
| 2282 | } |
| 2283 | r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce_64); |
| 2284 | goto out; |
| 2285 | } |
| 2286 | case KVM_CREATE_SPAPR_TCE: { |
| 2287 | struct kvm_create_spapr_tce create_tce; |
| 2288 | struct kvm_create_spapr_tce_64 create_tce_64; |
| 2289 | |
| 2290 | r = -EFAULT; |
| 2291 | if (copy_from_user(&create_tce, argp, sizeof(create_tce))) |
| 2292 | goto out; |
| 2293 | |
| 2294 | create_tce_64.liobn = create_tce.liobn; |
| 2295 | create_tce_64.page_shift = IOMMU_PAGE_SHIFT_4K; |
| 2296 | create_tce_64.offset = 0; |
| 2297 | create_tce_64.size = create_tce.window_size >> |
| 2298 | IOMMU_PAGE_SHIFT_4K; |
| 2299 | create_tce_64.flags = 0; |
| 2300 | r = kvm_vm_ioctl_create_spapr_tce(kvm, &create_tce_64); |
| 2301 | goto out; |
| 2302 | } |
| 2303 | #endif |
| 2304 | #ifdef CONFIG_PPC_BOOK3S_64 |
| 2305 | case KVM_PPC_GET_SMMU_INFO: { |
| 2306 | struct kvm_ppc_smmu_info info; |
| 2307 | struct kvm *kvm = filp->private_data; |
| 2308 | |
| 2309 | memset(&info, 0, sizeof(info)); |
| 2310 | r = kvm->arch.kvm_ops->get_smmu_info(kvm, &info); |
| 2311 | if (r >= 0 && copy_to_user(argp, &info, sizeof(info))) |
| 2312 | r = -EFAULT; |
| 2313 | break; |
| 2314 | } |
| 2315 | case KVM_PPC_RTAS_DEFINE_TOKEN: { |
| 2316 | struct kvm *kvm = filp->private_data; |
| 2317 | |
| 2318 | r = kvm_vm_ioctl_rtas_define_token(kvm, argp); |
| 2319 | break; |
| 2320 | } |
| 2321 | case KVM_PPC_CONFIGURE_V3_MMU: { |
| 2322 | struct kvm *kvm = filp->private_data; |
| 2323 | struct kvm_ppc_mmuv3_cfg cfg; |
| 2324 | |
| 2325 | r = -EINVAL; |
| 2326 | if (!kvm->arch.kvm_ops->configure_mmu) |
| 2327 | goto out; |
| 2328 | r = -EFAULT; |
| 2329 | if (copy_from_user(&cfg, argp, sizeof(cfg))) |
| 2330 | goto out; |
| 2331 | r = kvm->arch.kvm_ops->configure_mmu(kvm, &cfg); |
| 2332 | break; |
| 2333 | } |
| 2334 | case KVM_PPC_GET_RMMU_INFO: { |
| 2335 | struct kvm *kvm = filp->private_data; |
| 2336 | struct kvm_ppc_rmmu_info info; |
| 2337 | |
| 2338 | r = -EINVAL; |
| 2339 | if (!kvm->arch.kvm_ops->get_rmmu_info) |
| 2340 | goto out; |
| 2341 | r = kvm->arch.kvm_ops->get_rmmu_info(kvm, &info); |
| 2342 | if (r >= 0 && copy_to_user(argp, &info, sizeof(info))) |
| 2343 | r = -EFAULT; |
| 2344 | break; |
| 2345 | } |
| 2346 | case KVM_PPC_GET_CPU_CHAR: { |
| 2347 | struct kvm_ppc_cpu_char cpuchar; |
| 2348 | |
| 2349 | r = kvmppc_get_cpu_char(&cpuchar); |
| 2350 | if (r >= 0 && copy_to_user(argp, &cpuchar, sizeof(cpuchar))) |
| 2351 | r = -EFAULT; |
| 2352 | break; |
| 2353 | } |
| 2354 | default: { |
| 2355 | struct kvm *kvm = filp->private_data; |
| 2356 | r = kvm->arch.kvm_ops->arch_vm_ioctl(filp, ioctl, arg); |
| 2357 | } |
| 2358 | #else /* CONFIG_PPC_BOOK3S_64 */ |
| 2359 | default: |
| 2360 | r = -ENOTTY; |
| 2361 | #endif |
| 2362 | } |
| 2363 | out: |
| 2364 | return r; |
| 2365 | } |
| 2366 | |
| 2367 | static unsigned long lpid_inuse[BITS_TO_LONGS(KVMPPC_NR_LPIDS)]; |
| 2368 | static unsigned long nr_lpids; |
| 2369 | |
| 2370 | long kvmppc_alloc_lpid(void) |
| 2371 | { |
| 2372 | long lpid; |
| 2373 | |
| 2374 | do { |
| 2375 | lpid = find_first_zero_bit(lpid_inuse, KVMPPC_NR_LPIDS); |
| 2376 | if (lpid >= nr_lpids) { |
| 2377 | pr_err("%s: No LPIDs free\n", __func__); |
| 2378 | return -ENOMEM; |
| 2379 | } |
| 2380 | } while (test_and_set_bit(lpid, lpid_inuse)); |
| 2381 | |
| 2382 | return lpid; |
| 2383 | } |
| 2384 | EXPORT_SYMBOL_GPL(kvmppc_alloc_lpid); |
| 2385 | |
| 2386 | void kvmppc_claim_lpid(long lpid) |
| 2387 | { |
| 2388 | set_bit(lpid, lpid_inuse); |
| 2389 | } |
| 2390 | EXPORT_SYMBOL_GPL(kvmppc_claim_lpid); |
| 2391 | |
| 2392 | void kvmppc_free_lpid(long lpid) |
| 2393 | { |
| 2394 | clear_bit(lpid, lpid_inuse); |
| 2395 | } |
| 2396 | EXPORT_SYMBOL_GPL(kvmppc_free_lpid); |
| 2397 | |
| 2398 | void kvmppc_init_lpid(unsigned long nr_lpids_param) |
| 2399 | { |
| 2400 | nr_lpids = min_t(unsigned long, KVMPPC_NR_LPIDS, nr_lpids_param); |
| 2401 | memset(lpid_inuse, 0, sizeof(lpid_inuse)); |
| 2402 | } |
| 2403 | EXPORT_SYMBOL_GPL(kvmppc_init_lpid); |
| 2404 | |
| 2405 | int kvm_arch_init(void *opaque) |
| 2406 | { |
| 2407 | return 0; |
| 2408 | } |
| 2409 | |
| 2410 | EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ppc_instr); |