| Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | /* |
| 2 | * MPC7448HPC2 (Taiga) board Device Tree Source |
| 3 | * |
| 4 | * Copyright 2006, 2008 Freescale Semiconductor Inc. |
| 5 | * 2006 Roy Zang <Roy Zang at freescale.com>. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify it |
| 8 | * under the terms of the GNU General Public License as published by the |
| 9 | * Free Software Foundation; either version 2 of the License, or (at your |
| 10 | * option) any later version. |
| 11 | */ |
| 12 | |
| 13 | /dts-v1/; |
| 14 | |
| 15 | / { |
| 16 | model = "mpc7448hpc2"; |
| 17 | compatible = "mpc74xx"; |
| 18 | #address-cells = <1>; |
| 19 | #size-cells = <1>; |
| 20 | |
| 21 | aliases { |
| 22 | ethernet0 = &enet0; |
| 23 | ethernet1 = &enet1; |
| 24 | |
| 25 | serial0 = &serial0; |
| 26 | serial1 = &serial1; |
| 27 | |
| 28 | pci0 = &pci0; |
| 29 | }; |
| 30 | |
| 31 | cpus { |
| 32 | #address-cells = <1>; |
| 33 | #size-cells =<0>; |
| 34 | |
| 35 | PowerPC,7448@0 { |
| 36 | device_type = "cpu"; |
| 37 | reg = <0x0>; |
| 38 | d-cache-line-size = <32>; // 32 bytes |
| 39 | i-cache-line-size = <32>; // 32 bytes |
| 40 | d-cache-size = <0x8000>; // L1, 32K bytes |
| 41 | i-cache-size = <0x8000>; // L1, 32K bytes |
| 42 | timebase-frequency = <0>; // 33 MHz, from uboot |
| 43 | clock-frequency = <0>; // From U-Boot |
| 44 | bus-frequency = <0>; // From U-Boot |
| 45 | }; |
| 46 | }; |
| 47 | |
| 48 | memory { |
| 49 | device_type = "memory"; |
| 50 | reg = <0x0 0x20000000 // DDR2 512M at 0 |
| 51 | >; |
| 52 | }; |
| 53 | |
| 54 | tsi108@c0000000 { |
| 55 | #address-cells = <1>; |
| 56 | #size-cells = <1>; |
| 57 | device_type = "tsi-bridge"; |
| 58 | ranges = <0x0 0xc0000000 0x10000>; |
| 59 | reg = <0xc0000000 0x10000>; |
| 60 | bus-frequency = <0>; |
| 61 | |
| 62 | i2c@7000 { |
| 63 | interrupt-parent = <&mpic>; |
| 64 | interrupts = <14 0>; |
| 65 | reg = <0x7000 0x400>; |
| 66 | device_type = "i2c"; |
| 67 | compatible = "tsi108-i2c"; |
| 68 | }; |
| 69 | |
| 70 | MDIO: mdio@6000 { |
| 71 | compatible = "tsi108-mdio"; |
| 72 | reg = <0x6000 0x50>; |
| 73 | #address-cells = <1>; |
| 74 | #size-cells = <0>; |
| 75 | |
| 76 | phy8: ethernet-phy@8 { |
| 77 | interrupt-parent = <&mpic>; |
| 78 | interrupts = <2 1>; |
| 79 | reg = <0x8>; |
| 80 | }; |
| 81 | |
| 82 | phy9: ethernet-phy@9 { |
| 83 | interrupt-parent = <&mpic>; |
| 84 | interrupts = <2 1>; |
| 85 | reg = <0x9>; |
| 86 | }; |
| 87 | |
| 88 | }; |
| 89 | |
| 90 | enet0: ethernet@6200 { |
| 91 | linux,network-index = <0>; |
| 92 | #size-cells = <0>; |
| 93 | device_type = "network"; |
| 94 | compatible = "tsi108-ethernet"; |
| 95 | reg = <0x6000 0x200>; |
| 96 | address = [ 00 06 D2 00 00 01 ]; |
| 97 | interrupts = <16 2>; |
| 98 | interrupt-parent = <&mpic>; |
| 99 | mdio-handle = <&MDIO>; |
| 100 | phy-handle = <&phy8>; |
| 101 | }; |
| 102 | |
| 103 | enet1: ethernet@6600 { |
| 104 | linux,network-index = <1>; |
| 105 | #address-cells = <1>; |
| 106 | #size-cells = <0>; |
| 107 | device_type = "network"; |
| 108 | compatible = "tsi108-ethernet"; |
| 109 | reg = <0x6400 0x200>; |
| 110 | address = [ 00 06 D2 00 00 02 ]; |
| 111 | interrupts = <17 2>; |
| 112 | interrupt-parent = <&mpic>; |
| 113 | mdio-handle = <&MDIO>; |
| 114 | phy-handle = <&phy9>; |
| 115 | }; |
| 116 | |
| 117 | serial0: serial@7808 { |
| 118 | device_type = "serial"; |
| 119 | compatible = "ns16550"; |
| 120 | reg = <0x7808 0x200>; |
| 121 | clock-frequency = <1064000000>; |
| 122 | interrupts = <12 0>; |
| 123 | interrupt-parent = <&mpic>; |
| 124 | }; |
| 125 | |
| 126 | serial1: serial@7c08 { |
| 127 | device_type = "serial"; |
| 128 | compatible = "ns16550"; |
| 129 | reg = <0x7c08 0x200>; |
| 130 | clock-frequency = <1064000000>; |
| 131 | interrupts = <13 0>; |
| 132 | interrupt-parent = <&mpic>; |
| 133 | }; |
| 134 | |
| 135 | mpic: pic@7400 { |
| 136 | interrupt-controller; |
| 137 | #address-cells = <0>; |
| 138 | #interrupt-cells = <2>; |
| 139 | reg = <0x7400 0x400>; |
| 140 | compatible = "chrp,open-pic"; |
| 141 | device_type = "open-pic"; |
| 142 | }; |
| 143 | pci0: pci@1000 { |
| 144 | compatible = "tsi108-pci"; |
| 145 | device_type = "pci"; |
| 146 | #interrupt-cells = <1>; |
| 147 | #size-cells = <2>; |
| 148 | #address-cells = <3>; |
| 149 | reg = <0x1000 0x1000>; |
| 150 | bus-range = <0 0>; |
| 151 | ranges = <0x2000000 0x0 0xe0000000 0xe0000000 0x0 0x1a000000 |
| 152 | 0x1000000 0x0 0x0 0xfa000000 0x0 0x10000>; |
| 153 | clock-frequency = <133333332>; |
| 154 | interrupt-parent = <&mpic>; |
| 155 | interrupts = <23 2>; |
| 156 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
| 157 | interrupt-map = < |
| 158 | |
| 159 | /* IDSEL 0x11 */ |
| 160 | 0x800 0x0 0x0 0x1 &RT0 0x24 0x0 |
| 161 | 0x800 0x0 0x0 0x2 &RT0 0x25 0x0 |
| 162 | 0x800 0x0 0x0 0x3 &RT0 0x26 0x0 |
| 163 | 0x800 0x0 0x0 0x4 &RT0 0x27 0x0 |
| 164 | |
| 165 | /* IDSEL 0x12 */ |
| 166 | 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0 |
| 167 | 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0 |
| 168 | 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0 |
| 169 | 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0 |
| 170 | |
| 171 | /* IDSEL 0x13 */ |
| 172 | 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0 |
| 173 | 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0 |
| 174 | 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0 |
| 175 | 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0 |
| 176 | |
| 177 | /* IDSEL 0x14 */ |
| 178 | 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0 |
| 179 | 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0 |
| 180 | 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0 |
| 181 | 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0 |
| 182 | >; |
| 183 | |
| 184 | RT0: router@1180 { |
| 185 | clock-frequency = <0>; |
| 186 | interrupt-controller; |
| 187 | device_type = "pic-router"; |
| 188 | #address-cells = <0>; |
| 189 | #interrupt-cells = <2>; |
| 190 | big-endian; |
| 191 | interrupts = <23 2>; |
| 192 | interrupt-parent = <&mpic>; |
| 193 | }; |
| 194 | }; |
| 195 | }; |
| 196 | }; |