Andrew Scull | b4b6d4a | 2019-01-02 15:54:55 +0000 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 2 | /* |
| 3 | * DBAu1300 init and platform device setup. |
| 4 | * |
| 5 | * (c) 2009 Manuel Lauss <manuel.lauss@googlemail.com> |
| 6 | */ |
| 7 | |
| 8 | #include <linux/clk.h> |
| 9 | #include <linux/dma-mapping.h> |
| 10 | #include <linux/gpio.h> |
| 11 | #include <linux/gpio_keys.h> |
| 12 | #include <linux/init.h> |
| 13 | #include <linux/input.h> /* KEY_* codes */ |
| 14 | #include <linux/i2c.h> |
| 15 | #include <linux/io.h> |
| 16 | #include <linux/leds.h> |
| 17 | #include <linux/interrupt.h> |
| 18 | #include <linux/ata_platform.h> |
| 19 | #include <linux/mmc/host.h> |
| 20 | #include <linux/module.h> |
| 21 | #include <linux/mtd/mtd.h> |
| 22 | #include <linux/mtd/rawnand.h> |
| 23 | #include <linux/mtd/partitions.h> |
| 24 | #include <linux/platform_device.h> |
| 25 | #include <linux/smsc911x.h> |
| 26 | #include <linux/wm97xx.h> |
| 27 | |
| 28 | #include <asm/mach-au1x00/au1000.h> |
| 29 | #include <asm/mach-au1x00/gpio-au1300.h> |
| 30 | #include <asm/mach-au1x00/au1100_mmc.h> |
| 31 | #include <asm/mach-au1x00/au1200fb.h> |
| 32 | #include <asm/mach-au1x00/au1xxx_dbdma.h> |
| 33 | #include <asm/mach-au1x00/au1xxx_psc.h> |
| 34 | #include <asm/mach-db1x00/bcsr.h> |
| 35 | #include <asm/mach-au1x00/prom.h> |
| 36 | |
| 37 | #include "platform.h" |
| 38 | |
| 39 | /* FPGA (external mux) interrupt sources */ |
| 40 | #define DB1300_FIRST_INT (ALCHEMY_GPIC_INT_LAST + 1) |
| 41 | #define DB1300_IDE_INT (DB1300_FIRST_INT + 0) |
| 42 | #define DB1300_ETH_INT (DB1300_FIRST_INT + 1) |
| 43 | #define DB1300_CF_INT (DB1300_FIRST_INT + 2) |
| 44 | #define DB1300_VIDEO_INT (DB1300_FIRST_INT + 4) |
| 45 | #define DB1300_HDMI_INT (DB1300_FIRST_INT + 5) |
| 46 | #define DB1300_DC_INT (DB1300_FIRST_INT + 6) |
| 47 | #define DB1300_FLASH_INT (DB1300_FIRST_INT + 7) |
| 48 | #define DB1300_CF_INSERT_INT (DB1300_FIRST_INT + 8) |
| 49 | #define DB1300_CF_EJECT_INT (DB1300_FIRST_INT + 9) |
| 50 | #define DB1300_AC97_INT (DB1300_FIRST_INT + 10) |
| 51 | #define DB1300_AC97_PEN_INT (DB1300_FIRST_INT + 11) |
| 52 | #define DB1300_SD1_INSERT_INT (DB1300_FIRST_INT + 12) |
| 53 | #define DB1300_SD1_EJECT_INT (DB1300_FIRST_INT + 13) |
| 54 | #define DB1300_OTG_VBUS_OC_INT (DB1300_FIRST_INT + 14) |
| 55 | #define DB1300_HOST_VBUS_OC_INT (DB1300_FIRST_INT + 15) |
| 56 | #define DB1300_LAST_INT (DB1300_FIRST_INT + 15) |
| 57 | |
| 58 | /* SMSC9210 CS */ |
| 59 | #define DB1300_ETH_PHYS_ADDR 0x19000000 |
| 60 | #define DB1300_ETH_PHYS_END 0x197fffff |
| 61 | |
| 62 | /* ATA CS */ |
| 63 | #define DB1300_IDE_PHYS_ADDR 0x18800000 |
| 64 | #define DB1300_IDE_REG_SHIFT 5 |
| 65 | #define DB1300_IDE_PHYS_LEN (16 << DB1300_IDE_REG_SHIFT) |
| 66 | |
| 67 | /* NAND CS */ |
| 68 | #define DB1300_NAND_PHYS_ADDR 0x20000000 |
| 69 | #define DB1300_NAND_PHYS_END 0x20000fff |
| 70 | |
| 71 | |
| 72 | static struct i2c_board_info db1300_i2c_devs[] __initdata = { |
| 73 | { I2C_BOARD_INFO("wm8731", 0x1b), }, /* I2S audio codec */ |
| 74 | { I2C_BOARD_INFO("ne1619", 0x2d), }, /* adm1025-compat hwmon */ |
| 75 | }; |
| 76 | |
| 77 | /* multifunction pins to assign to GPIO controller */ |
| 78 | static int db1300_gpio_pins[] __initdata = { |
| 79 | AU1300_PIN_LCDPWM0, AU1300_PIN_PSC2SYNC1, AU1300_PIN_WAKE1, |
| 80 | AU1300_PIN_WAKE2, AU1300_PIN_WAKE3, AU1300_PIN_FG3AUX, |
| 81 | AU1300_PIN_EXTCLK1, |
| 82 | -1, /* terminator */ |
| 83 | }; |
| 84 | |
| 85 | /* multifunction pins to assign to device functions */ |
| 86 | static int db1300_dev_pins[] __initdata = { |
| 87 | /* wake-from-str pins 0-3 */ |
| 88 | AU1300_PIN_WAKE0, |
| 89 | /* external clock sources for PSC0 */ |
| 90 | AU1300_PIN_EXTCLK0, |
| 91 | /* 8bit MMC interface on SD0: 6-9 */ |
| 92 | AU1300_PIN_SD0DAT4, AU1300_PIN_SD0DAT5, AU1300_PIN_SD0DAT6, |
| 93 | AU1300_PIN_SD0DAT7, |
| 94 | /* UART1 pins: 11-18 */ |
| 95 | AU1300_PIN_U1RI, AU1300_PIN_U1DCD, AU1300_PIN_U1DSR, |
| 96 | AU1300_PIN_U1CTS, AU1300_PIN_U1RTS, AU1300_PIN_U1DTR, |
| 97 | AU1300_PIN_U1RX, AU1300_PIN_U1TX, |
| 98 | /* UART0 pins: 19-24 */ |
| 99 | AU1300_PIN_U0RI, AU1300_PIN_U0DCD, AU1300_PIN_U0DSR, |
| 100 | AU1300_PIN_U0CTS, AU1300_PIN_U0RTS, AU1300_PIN_U0DTR, |
| 101 | /* UART2: 25-26 */ |
| 102 | AU1300_PIN_U2RX, AU1300_PIN_U2TX, |
| 103 | /* UART3: 27-28 */ |
| 104 | AU1300_PIN_U3RX, AU1300_PIN_U3TX, |
| 105 | /* LCD controller PWMs, ext pixclock: 30-31 */ |
| 106 | AU1300_PIN_LCDPWM1, AU1300_PIN_LCDCLKIN, |
| 107 | /* SD1 interface: 32-37 */ |
| 108 | AU1300_PIN_SD1DAT0, AU1300_PIN_SD1DAT1, AU1300_PIN_SD1DAT2, |
| 109 | AU1300_PIN_SD1DAT3, AU1300_PIN_SD1CMD, AU1300_PIN_SD1CLK, |
| 110 | /* SD2 interface: 38-43 */ |
| 111 | AU1300_PIN_SD2DAT0, AU1300_PIN_SD2DAT1, AU1300_PIN_SD2DAT2, |
| 112 | AU1300_PIN_SD2DAT3, AU1300_PIN_SD2CMD, AU1300_PIN_SD2CLK, |
| 113 | /* PSC0/1 clocks: 44-45 */ |
| 114 | AU1300_PIN_PSC0CLK, AU1300_PIN_PSC1CLK, |
| 115 | /* PSCs: 46-49/50-53/54-57/58-61 */ |
| 116 | AU1300_PIN_PSC0SYNC0, AU1300_PIN_PSC0SYNC1, AU1300_PIN_PSC0D0, |
| 117 | AU1300_PIN_PSC0D1, |
| 118 | AU1300_PIN_PSC1SYNC0, AU1300_PIN_PSC1SYNC1, AU1300_PIN_PSC1D0, |
| 119 | AU1300_PIN_PSC1D1, |
| 120 | AU1300_PIN_PSC2SYNC0, AU1300_PIN_PSC2D0, |
| 121 | AU1300_PIN_PSC2D1, |
| 122 | AU1300_PIN_PSC3SYNC0, AU1300_PIN_PSC3SYNC1, AU1300_PIN_PSC3D0, |
| 123 | AU1300_PIN_PSC3D1, |
| 124 | /* PCMCIA interface: 62-70 */ |
| 125 | AU1300_PIN_PCE2, AU1300_PIN_PCE1, AU1300_PIN_PIOS16, |
| 126 | AU1300_PIN_PIOR, AU1300_PIN_PWE, AU1300_PIN_PWAIT, |
| 127 | AU1300_PIN_PREG, AU1300_PIN_POE, AU1300_PIN_PIOW, |
| 128 | /* camera interface H/V sync inputs: 71-72 */ |
| 129 | AU1300_PIN_CIMLS, AU1300_PIN_CIMFS, |
| 130 | /* PSC2/3 clocks: 73-74 */ |
| 131 | AU1300_PIN_PSC2CLK, AU1300_PIN_PSC3CLK, |
| 132 | -1, /* terminator */ |
| 133 | }; |
| 134 | |
| 135 | static void __init db1300_gpio_config(void) |
| 136 | { |
| 137 | int *i; |
| 138 | |
| 139 | i = &db1300_dev_pins[0]; |
| 140 | while (*i != -1) |
| 141 | au1300_pinfunc_to_dev(*i++); |
| 142 | |
| 143 | i = &db1300_gpio_pins[0]; |
| 144 | while (*i != -1) |
| 145 | au1300_gpio_direction_input(*i++);/* implies pin_to_gpio */ |
| 146 | |
| 147 | au1300_set_dbdma_gpio(1, AU1300_PIN_FG3AUX); |
| 148 | } |
| 149 | |
| 150 | /**********************************************************************/ |
| 151 | |
| 152 | static void au1300_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, |
| 153 | unsigned int ctrl) |
| 154 | { |
| 155 | struct nand_chip *this = mtd_to_nand(mtd); |
| 156 | unsigned long ioaddr = (unsigned long)this->IO_ADDR_W; |
| 157 | |
| 158 | ioaddr &= 0xffffff00; |
| 159 | |
| 160 | if (ctrl & NAND_CLE) { |
| 161 | ioaddr += MEM_STNAND_CMD; |
| 162 | } else if (ctrl & NAND_ALE) { |
| 163 | ioaddr += MEM_STNAND_ADDR; |
| 164 | } else { |
| 165 | /* assume we want to r/w real data by default */ |
| 166 | ioaddr += MEM_STNAND_DATA; |
| 167 | } |
| 168 | this->IO_ADDR_R = this->IO_ADDR_W = (void __iomem *)ioaddr; |
| 169 | if (cmd != NAND_CMD_NONE) { |
| 170 | __raw_writeb(cmd, this->IO_ADDR_W); |
| 171 | wmb(); |
| 172 | } |
| 173 | } |
| 174 | |
| 175 | static int au1300_nand_device_ready(struct mtd_info *mtd) |
| 176 | { |
| 177 | return alchemy_rdsmem(AU1000_MEM_STSTAT) & 1; |
| 178 | } |
| 179 | |
| 180 | static struct mtd_partition db1300_nand_parts[] = { |
| 181 | { |
| 182 | .name = "NAND FS 0", |
| 183 | .offset = 0, |
| 184 | .size = 8 * 1024 * 1024, |
| 185 | }, |
| 186 | { |
| 187 | .name = "NAND FS 1", |
| 188 | .offset = MTDPART_OFS_APPEND, |
| 189 | .size = MTDPART_SIZ_FULL |
| 190 | }, |
| 191 | }; |
| 192 | |
| 193 | struct platform_nand_data db1300_nand_platdata = { |
| 194 | .chip = { |
| 195 | .nr_chips = 1, |
| 196 | .chip_offset = 0, |
| 197 | .nr_partitions = ARRAY_SIZE(db1300_nand_parts), |
| 198 | .partitions = db1300_nand_parts, |
| 199 | .chip_delay = 20, |
| 200 | }, |
| 201 | .ctrl = { |
| 202 | .dev_ready = au1300_nand_device_ready, |
| 203 | .cmd_ctrl = au1300_nand_cmd_ctrl, |
| 204 | }, |
| 205 | }; |
| 206 | |
| 207 | static struct resource db1300_nand_res[] = { |
| 208 | [0] = { |
| 209 | .start = DB1300_NAND_PHYS_ADDR, |
| 210 | .end = DB1300_NAND_PHYS_ADDR + 0xff, |
| 211 | .flags = IORESOURCE_MEM, |
| 212 | }, |
| 213 | }; |
| 214 | |
| 215 | static struct platform_device db1300_nand_dev = { |
| 216 | .name = "gen_nand", |
| 217 | .num_resources = ARRAY_SIZE(db1300_nand_res), |
| 218 | .resource = db1300_nand_res, |
| 219 | .id = -1, |
| 220 | .dev = { |
| 221 | .platform_data = &db1300_nand_platdata, |
| 222 | } |
| 223 | }; |
| 224 | |
| 225 | /**********************************************************************/ |
| 226 | |
| 227 | static struct resource db1300_eth_res[] = { |
| 228 | [0] = { |
| 229 | .start = DB1300_ETH_PHYS_ADDR, |
| 230 | .end = DB1300_ETH_PHYS_END, |
| 231 | .flags = IORESOURCE_MEM, |
| 232 | }, |
| 233 | [1] = { |
| 234 | .start = DB1300_ETH_INT, |
| 235 | .end = DB1300_ETH_INT, |
| 236 | .flags = IORESOURCE_IRQ, |
| 237 | }, |
| 238 | }; |
| 239 | |
| 240 | static struct smsc911x_platform_config db1300_eth_config = { |
| 241 | .phy_interface = PHY_INTERFACE_MODE_MII, |
| 242 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, |
| 243 | .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL, |
| 244 | .flags = SMSC911X_USE_32BIT, |
| 245 | }; |
| 246 | |
| 247 | static struct platform_device db1300_eth_dev = { |
| 248 | .name = "smsc911x", |
| 249 | .id = -1, |
| 250 | .num_resources = ARRAY_SIZE(db1300_eth_res), |
| 251 | .resource = db1300_eth_res, |
| 252 | .dev = { |
| 253 | .platform_data = &db1300_eth_config, |
| 254 | }, |
| 255 | }; |
| 256 | |
| 257 | /**********************************************************************/ |
| 258 | |
| 259 | static struct resource au1300_psc1_res[] = { |
| 260 | [0] = { |
| 261 | .start = AU1300_PSC1_PHYS_ADDR, |
| 262 | .end = AU1300_PSC1_PHYS_ADDR + 0x0fff, |
| 263 | .flags = IORESOURCE_MEM, |
| 264 | }, |
| 265 | [1] = { |
| 266 | .start = AU1300_PSC1_INT, |
| 267 | .end = AU1300_PSC1_INT, |
| 268 | .flags = IORESOURCE_IRQ, |
| 269 | }, |
| 270 | [2] = { |
| 271 | .start = AU1300_DSCR_CMD0_PSC1_TX, |
| 272 | .end = AU1300_DSCR_CMD0_PSC1_TX, |
| 273 | .flags = IORESOURCE_DMA, |
| 274 | }, |
| 275 | [3] = { |
| 276 | .start = AU1300_DSCR_CMD0_PSC1_RX, |
| 277 | .end = AU1300_DSCR_CMD0_PSC1_RX, |
| 278 | .flags = IORESOURCE_DMA, |
| 279 | }, |
| 280 | }; |
| 281 | |
| 282 | static struct platform_device db1300_ac97_dev = { |
| 283 | .name = "au1xpsc_ac97", |
| 284 | .id = 1, /* PSC ID. match with AC97 codec ID! */ |
| 285 | .num_resources = ARRAY_SIZE(au1300_psc1_res), |
| 286 | .resource = au1300_psc1_res, |
| 287 | }; |
| 288 | |
| 289 | /**********************************************************************/ |
| 290 | |
| 291 | static struct resource au1300_psc2_res[] = { |
| 292 | [0] = { |
| 293 | .start = AU1300_PSC2_PHYS_ADDR, |
| 294 | .end = AU1300_PSC2_PHYS_ADDR + 0x0fff, |
| 295 | .flags = IORESOURCE_MEM, |
| 296 | }, |
| 297 | [1] = { |
| 298 | .start = AU1300_PSC2_INT, |
| 299 | .end = AU1300_PSC2_INT, |
| 300 | .flags = IORESOURCE_IRQ, |
| 301 | }, |
| 302 | [2] = { |
| 303 | .start = AU1300_DSCR_CMD0_PSC2_TX, |
| 304 | .end = AU1300_DSCR_CMD0_PSC2_TX, |
| 305 | .flags = IORESOURCE_DMA, |
| 306 | }, |
| 307 | [3] = { |
| 308 | .start = AU1300_DSCR_CMD0_PSC2_RX, |
| 309 | .end = AU1300_DSCR_CMD0_PSC2_RX, |
| 310 | .flags = IORESOURCE_DMA, |
| 311 | }, |
| 312 | }; |
| 313 | |
| 314 | static struct platform_device db1300_i2s_dev = { |
| 315 | .name = "au1xpsc_i2s", |
| 316 | .id = 2, /* PSC ID */ |
| 317 | .num_resources = ARRAY_SIZE(au1300_psc2_res), |
| 318 | .resource = au1300_psc2_res, |
| 319 | }; |
| 320 | |
| 321 | /**********************************************************************/ |
| 322 | |
| 323 | static struct resource au1300_psc3_res[] = { |
| 324 | [0] = { |
| 325 | .start = AU1300_PSC3_PHYS_ADDR, |
| 326 | .end = AU1300_PSC3_PHYS_ADDR + 0x0fff, |
| 327 | .flags = IORESOURCE_MEM, |
| 328 | }, |
| 329 | [1] = { |
| 330 | .start = AU1300_PSC3_INT, |
| 331 | .end = AU1300_PSC3_INT, |
| 332 | .flags = IORESOURCE_IRQ, |
| 333 | }, |
| 334 | [2] = { |
| 335 | .start = AU1300_DSCR_CMD0_PSC3_TX, |
| 336 | .end = AU1300_DSCR_CMD0_PSC3_TX, |
| 337 | .flags = IORESOURCE_DMA, |
| 338 | }, |
| 339 | [3] = { |
| 340 | .start = AU1300_DSCR_CMD0_PSC3_RX, |
| 341 | .end = AU1300_DSCR_CMD0_PSC3_RX, |
| 342 | .flags = IORESOURCE_DMA, |
| 343 | }, |
| 344 | }; |
| 345 | |
| 346 | static struct platform_device db1300_i2c_dev = { |
| 347 | .name = "au1xpsc_smbus", |
| 348 | .id = 0, /* bus number */ |
| 349 | .num_resources = ARRAY_SIZE(au1300_psc3_res), |
| 350 | .resource = au1300_psc3_res, |
| 351 | }; |
| 352 | |
| 353 | /**********************************************************************/ |
| 354 | |
| 355 | /* proper key assignments when facing the LCD panel. For key assignments |
| 356 | * according to the schematics swap up with down and left with right. |
| 357 | * I chose to use it to emulate the arrow keys of a keyboard. |
| 358 | */ |
| 359 | static struct gpio_keys_button db1300_5waysw_arrowkeys[] = { |
| 360 | { |
| 361 | .code = KEY_DOWN, |
| 362 | .gpio = AU1300_PIN_LCDPWM0, |
| 363 | .type = EV_KEY, |
| 364 | .debounce_interval = 1, |
| 365 | .active_low = 1, |
| 366 | .desc = "5waysw-down", |
| 367 | }, |
| 368 | { |
| 369 | .code = KEY_UP, |
| 370 | .gpio = AU1300_PIN_PSC2SYNC1, |
| 371 | .type = EV_KEY, |
| 372 | .debounce_interval = 1, |
| 373 | .active_low = 1, |
| 374 | .desc = "5waysw-up", |
| 375 | }, |
| 376 | { |
| 377 | .code = KEY_RIGHT, |
| 378 | .gpio = AU1300_PIN_WAKE3, |
| 379 | .type = EV_KEY, |
| 380 | .debounce_interval = 1, |
| 381 | .active_low = 1, |
| 382 | .desc = "5waysw-right", |
| 383 | }, |
| 384 | { |
| 385 | .code = KEY_LEFT, |
| 386 | .gpio = AU1300_PIN_WAKE2, |
| 387 | .type = EV_KEY, |
| 388 | .debounce_interval = 1, |
| 389 | .active_low = 1, |
| 390 | .desc = "5waysw-left", |
| 391 | }, |
| 392 | { |
| 393 | .code = KEY_ENTER, |
| 394 | .gpio = AU1300_PIN_WAKE1, |
| 395 | .type = EV_KEY, |
| 396 | .debounce_interval = 1, |
| 397 | .active_low = 1, |
| 398 | .desc = "5waysw-push", |
| 399 | }, |
| 400 | }; |
| 401 | |
| 402 | static struct gpio_keys_platform_data db1300_5waysw_data = { |
| 403 | .buttons = db1300_5waysw_arrowkeys, |
| 404 | .nbuttons = ARRAY_SIZE(db1300_5waysw_arrowkeys), |
| 405 | .rep = 1, |
| 406 | .name = "db1300-5wayswitch", |
| 407 | }; |
| 408 | |
| 409 | static struct platform_device db1300_5waysw_dev = { |
| 410 | .name = "gpio-keys", |
| 411 | .dev = { |
| 412 | .platform_data = &db1300_5waysw_data, |
| 413 | }, |
| 414 | }; |
| 415 | |
| 416 | /**********************************************************************/ |
| 417 | |
| 418 | static struct pata_platform_info db1300_ide_info = { |
| 419 | .ioport_shift = DB1300_IDE_REG_SHIFT, |
| 420 | }; |
| 421 | |
| 422 | #define IDE_ALT_START (14 << DB1300_IDE_REG_SHIFT) |
| 423 | static struct resource db1300_ide_res[] = { |
| 424 | [0] = { |
| 425 | .start = DB1300_IDE_PHYS_ADDR, |
| 426 | .end = DB1300_IDE_PHYS_ADDR + IDE_ALT_START - 1, |
| 427 | .flags = IORESOURCE_MEM, |
| 428 | }, |
| 429 | [1] = { |
| 430 | .start = DB1300_IDE_PHYS_ADDR + IDE_ALT_START, |
| 431 | .end = DB1300_IDE_PHYS_ADDR + DB1300_IDE_PHYS_LEN - 1, |
| 432 | .flags = IORESOURCE_MEM, |
| 433 | }, |
| 434 | [2] = { |
| 435 | .start = DB1300_IDE_INT, |
| 436 | .end = DB1300_IDE_INT, |
| 437 | .flags = IORESOURCE_IRQ, |
| 438 | }, |
| 439 | }; |
| 440 | |
| 441 | static struct platform_device db1300_ide_dev = { |
| 442 | .dev = { |
| 443 | .platform_data = &db1300_ide_info, |
| 444 | }, |
| 445 | .name = "pata_platform", |
| 446 | .resource = db1300_ide_res, |
| 447 | .num_resources = ARRAY_SIZE(db1300_ide_res), |
| 448 | }; |
| 449 | |
| 450 | /**********************************************************************/ |
| 451 | |
| 452 | static irqreturn_t db1300_mmc_cd(int irq, void *ptr) |
| 453 | { |
| 454 | disable_irq_nosync(irq); |
| 455 | return IRQ_WAKE_THREAD; |
| 456 | } |
| 457 | |
| 458 | static irqreturn_t db1300_mmc_cdfn(int irq, void *ptr) |
| 459 | { |
| 460 | void (*mmc_cd)(struct mmc_host *, unsigned long); |
| 461 | |
| 462 | /* link against CONFIG_MMC=m. We can only be called once MMC core has |
| 463 | * initialized the controller, so symbol_get() should always succeed. |
| 464 | */ |
| 465 | mmc_cd = symbol_get(mmc_detect_change); |
| 466 | mmc_cd(ptr, msecs_to_jiffies(200)); |
| 467 | symbol_put(mmc_detect_change); |
| 468 | |
| 469 | msleep(100); /* debounce */ |
| 470 | if (irq == DB1300_SD1_INSERT_INT) |
| 471 | enable_irq(DB1300_SD1_EJECT_INT); |
| 472 | else |
| 473 | enable_irq(DB1300_SD1_INSERT_INT); |
| 474 | |
| 475 | return IRQ_HANDLED; |
| 476 | } |
| 477 | |
| 478 | static int db1300_mmc_card_readonly(void *mmc_host) |
| 479 | { |
| 480 | /* it uses SD1 interface, but the DB1200's SD0 bit in the CPLD */ |
| 481 | return bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP; |
| 482 | } |
| 483 | |
| 484 | static int db1300_mmc_card_inserted(void *mmc_host) |
| 485 | { |
| 486 | return bcsr_read(BCSR_SIGSTAT) & (1 << 12); /* insertion irq signal */ |
| 487 | } |
| 488 | |
| 489 | static int db1300_mmc_cd_setup(void *mmc_host, int en) |
| 490 | { |
| 491 | int ret; |
| 492 | |
| 493 | if (en) { |
| 494 | ret = request_threaded_irq(DB1300_SD1_INSERT_INT, db1300_mmc_cd, |
| 495 | db1300_mmc_cdfn, 0, "sd_insert", mmc_host); |
| 496 | if (ret) |
| 497 | goto out; |
| 498 | |
| 499 | ret = request_threaded_irq(DB1300_SD1_EJECT_INT, db1300_mmc_cd, |
| 500 | db1300_mmc_cdfn, 0, "sd_eject", mmc_host); |
| 501 | if (ret) { |
| 502 | free_irq(DB1300_SD1_INSERT_INT, mmc_host); |
| 503 | goto out; |
| 504 | } |
| 505 | |
| 506 | if (db1300_mmc_card_inserted(mmc_host)) |
| 507 | enable_irq(DB1300_SD1_EJECT_INT); |
| 508 | else |
| 509 | enable_irq(DB1300_SD1_INSERT_INT); |
| 510 | |
| 511 | } else { |
| 512 | free_irq(DB1300_SD1_INSERT_INT, mmc_host); |
| 513 | free_irq(DB1300_SD1_EJECT_INT, mmc_host); |
| 514 | } |
| 515 | ret = 0; |
| 516 | out: |
| 517 | return ret; |
| 518 | } |
| 519 | |
| 520 | static void db1300_mmcled_set(struct led_classdev *led, |
| 521 | enum led_brightness brightness) |
| 522 | { |
| 523 | if (brightness != LED_OFF) |
| 524 | bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0); |
| 525 | else |
| 526 | bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0); |
| 527 | } |
| 528 | |
| 529 | static struct led_classdev db1300_mmc_led = { |
| 530 | .brightness_set = db1300_mmcled_set, |
| 531 | }; |
| 532 | |
| 533 | struct au1xmmc_platform_data db1300_sd1_platdata = { |
| 534 | .cd_setup = db1300_mmc_cd_setup, |
| 535 | .card_inserted = db1300_mmc_card_inserted, |
| 536 | .card_readonly = db1300_mmc_card_readonly, |
| 537 | .led = &db1300_mmc_led, |
| 538 | }; |
| 539 | |
| 540 | static struct resource au1300_sd1_res[] = { |
| 541 | [0] = { |
| 542 | .start = AU1300_SD1_PHYS_ADDR, |
| 543 | .end = AU1300_SD1_PHYS_ADDR, |
| 544 | .flags = IORESOURCE_MEM, |
| 545 | }, |
| 546 | [1] = { |
| 547 | .start = AU1300_SD1_INT, |
| 548 | .end = AU1300_SD1_INT, |
| 549 | .flags = IORESOURCE_IRQ, |
| 550 | }, |
| 551 | [2] = { |
| 552 | .start = AU1300_DSCR_CMD0_SDMS_TX1, |
| 553 | .end = AU1300_DSCR_CMD0_SDMS_TX1, |
| 554 | .flags = IORESOURCE_DMA, |
| 555 | }, |
| 556 | [3] = { |
| 557 | .start = AU1300_DSCR_CMD0_SDMS_RX1, |
| 558 | .end = AU1300_DSCR_CMD0_SDMS_RX1, |
| 559 | .flags = IORESOURCE_DMA, |
| 560 | }, |
| 561 | }; |
| 562 | |
| 563 | static struct platform_device db1300_sd1_dev = { |
| 564 | .dev = { |
| 565 | .platform_data = &db1300_sd1_platdata, |
| 566 | }, |
| 567 | .name = "au1xxx-mmc", |
| 568 | .id = 1, |
| 569 | .resource = au1300_sd1_res, |
| 570 | .num_resources = ARRAY_SIZE(au1300_sd1_res), |
| 571 | }; |
| 572 | |
| 573 | /**********************************************************************/ |
| 574 | |
| 575 | static int db1300_movinand_inserted(void *mmc_host) |
| 576 | { |
| 577 | return 0; /* disable for now, it doesn't work yet */ |
| 578 | } |
| 579 | |
| 580 | static int db1300_movinand_readonly(void *mmc_host) |
| 581 | { |
| 582 | return 0; |
| 583 | } |
| 584 | |
| 585 | static void db1300_movinand_led_set(struct led_classdev *led, |
| 586 | enum led_brightness brightness) |
| 587 | { |
| 588 | if (brightness != LED_OFF) |
| 589 | bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0); |
| 590 | else |
| 591 | bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1); |
| 592 | } |
| 593 | |
| 594 | static struct led_classdev db1300_movinand_led = { |
| 595 | .brightness_set = db1300_movinand_led_set, |
| 596 | }; |
| 597 | |
| 598 | struct au1xmmc_platform_data db1300_sd0_platdata = { |
| 599 | .card_inserted = db1300_movinand_inserted, |
| 600 | .card_readonly = db1300_movinand_readonly, |
| 601 | .led = &db1300_movinand_led, |
| 602 | .mask_host_caps = MMC_CAP_NEEDS_POLL, |
| 603 | }; |
| 604 | |
| 605 | static struct resource au1300_sd0_res[] = { |
| 606 | [0] = { |
| 607 | .start = AU1100_SD0_PHYS_ADDR, |
| 608 | .end = AU1100_SD0_PHYS_ADDR, |
| 609 | .flags = IORESOURCE_MEM, |
| 610 | }, |
| 611 | [1] = { |
| 612 | .start = AU1300_SD0_INT, |
| 613 | .end = AU1300_SD0_INT, |
| 614 | .flags = IORESOURCE_IRQ, |
| 615 | }, |
| 616 | [2] = { |
| 617 | .start = AU1300_DSCR_CMD0_SDMS_TX0, |
| 618 | .end = AU1300_DSCR_CMD0_SDMS_TX0, |
| 619 | .flags = IORESOURCE_DMA, |
| 620 | }, |
| 621 | [3] = { |
| 622 | .start = AU1300_DSCR_CMD0_SDMS_RX0, |
| 623 | .end = AU1300_DSCR_CMD0_SDMS_RX0, |
| 624 | .flags = IORESOURCE_DMA, |
| 625 | }, |
| 626 | }; |
| 627 | |
| 628 | static struct platform_device db1300_sd0_dev = { |
| 629 | .dev = { |
| 630 | .platform_data = &db1300_sd0_platdata, |
| 631 | }, |
| 632 | .name = "au1xxx-mmc", |
| 633 | .id = 0, |
| 634 | .resource = au1300_sd0_res, |
| 635 | .num_resources = ARRAY_SIZE(au1300_sd0_res), |
| 636 | }; |
| 637 | |
| 638 | /**********************************************************************/ |
| 639 | |
| 640 | static struct platform_device db1300_wm9715_dev = { |
| 641 | .name = "wm9712-codec", |
| 642 | .id = 1, /* ID of PSC for AC97 audio, see asoc glue! */ |
| 643 | }; |
| 644 | |
| 645 | static struct platform_device db1300_ac97dma_dev = { |
| 646 | .name = "au1xpsc-pcm", |
| 647 | .id = 1, /* PSC ID */ |
| 648 | }; |
| 649 | |
| 650 | static struct platform_device db1300_i2sdma_dev = { |
| 651 | .name = "au1xpsc-pcm", |
| 652 | .id = 2, /* PSC ID */ |
| 653 | }; |
| 654 | |
| 655 | static struct platform_device db1300_sndac97_dev = { |
| 656 | .name = "db1300-ac97", |
| 657 | }; |
| 658 | |
| 659 | static struct platform_device db1300_sndi2s_dev = { |
| 660 | .name = "db1300-i2s", |
| 661 | }; |
| 662 | |
| 663 | /**********************************************************************/ |
| 664 | |
| 665 | static int db1300fb_panel_index(void) |
| 666 | { |
| 667 | return 9; /* DB1300_800x480 */ |
| 668 | } |
| 669 | |
| 670 | static int db1300fb_panel_init(void) |
| 671 | { |
| 672 | /* Apply power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */ |
| 673 | bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD, |
| 674 | BCSR_BOARD_LCDBL); |
| 675 | return 0; |
| 676 | } |
| 677 | |
| 678 | static int db1300fb_panel_shutdown(void) |
| 679 | { |
| 680 | /* Remove power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */ |
| 681 | bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDBL, |
| 682 | BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD); |
| 683 | return 0; |
| 684 | } |
| 685 | |
| 686 | static struct au1200fb_platdata db1300fb_pd = { |
| 687 | .panel_index = db1300fb_panel_index, |
| 688 | .panel_init = db1300fb_panel_init, |
| 689 | .panel_shutdown = db1300fb_panel_shutdown, |
| 690 | }; |
| 691 | |
| 692 | static struct resource au1300_lcd_res[] = { |
| 693 | [0] = { |
| 694 | .start = AU1200_LCD_PHYS_ADDR, |
| 695 | .end = AU1200_LCD_PHYS_ADDR + 0x800 - 1, |
| 696 | .flags = IORESOURCE_MEM, |
| 697 | }, |
| 698 | [1] = { |
| 699 | .start = AU1300_LCD_INT, |
| 700 | .end = AU1300_LCD_INT, |
| 701 | .flags = IORESOURCE_IRQ, |
| 702 | } |
| 703 | }; |
| 704 | |
| 705 | static u64 au1300_lcd_dmamask = DMA_BIT_MASK(32); |
| 706 | |
| 707 | static struct platform_device db1300_lcd_dev = { |
| 708 | .name = "au1200-lcd", |
| 709 | .id = 0, |
| 710 | .dev = { |
| 711 | .dma_mask = &au1300_lcd_dmamask, |
| 712 | .coherent_dma_mask = DMA_BIT_MASK(32), |
| 713 | .platform_data = &db1300fb_pd, |
| 714 | }, |
| 715 | .num_resources = ARRAY_SIZE(au1300_lcd_res), |
| 716 | .resource = au1300_lcd_res, |
| 717 | }; |
| 718 | |
| 719 | /**********************************************************************/ |
| 720 | |
| 721 | static void db1300_wm97xx_irqen(struct wm97xx *wm, int enable) |
| 722 | { |
| 723 | if (enable) |
| 724 | enable_irq(DB1300_AC97_PEN_INT); |
| 725 | else |
| 726 | disable_irq_nosync(DB1300_AC97_PEN_INT); |
| 727 | } |
| 728 | |
| 729 | static struct wm97xx_mach_ops db1300_wm97xx_ops = { |
| 730 | .irq_enable = db1300_wm97xx_irqen, |
| 731 | .irq_gpio = WM97XX_GPIO_3, |
| 732 | }; |
| 733 | |
| 734 | static int db1300_wm97xx_probe(struct platform_device *pdev) |
| 735 | { |
| 736 | struct wm97xx *wm = platform_get_drvdata(pdev); |
| 737 | |
| 738 | /* external pendown indicator */ |
| 739 | wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN, |
| 740 | WM97XX_GPIO_POL_LOW, WM97XX_GPIO_STICKY, |
| 741 | WM97XX_GPIO_WAKE); |
| 742 | |
| 743 | /* internal "virtual" pendown gpio */ |
| 744 | wm97xx_config_gpio(wm, WM97XX_GPIO_3, WM97XX_GPIO_OUT, |
| 745 | WM97XX_GPIO_POL_LOW, WM97XX_GPIO_NOTSTICKY, |
| 746 | WM97XX_GPIO_NOWAKE); |
| 747 | |
| 748 | wm->pen_irq = DB1300_AC97_PEN_INT; |
| 749 | |
| 750 | return wm97xx_register_mach_ops(wm, &db1300_wm97xx_ops); |
| 751 | } |
| 752 | |
| 753 | static struct platform_driver db1300_wm97xx_driver = { |
| 754 | .driver.name = "wm97xx-touch", |
| 755 | .driver.owner = THIS_MODULE, |
| 756 | .probe = db1300_wm97xx_probe, |
| 757 | }; |
| 758 | |
| 759 | /**********************************************************************/ |
| 760 | |
| 761 | static struct platform_device *db1300_dev[] __initdata = { |
| 762 | &db1300_eth_dev, |
| 763 | &db1300_i2c_dev, |
| 764 | &db1300_5waysw_dev, |
| 765 | &db1300_nand_dev, |
| 766 | &db1300_ide_dev, |
| 767 | &db1300_sd0_dev, |
| 768 | &db1300_sd1_dev, |
| 769 | &db1300_lcd_dev, |
| 770 | &db1300_ac97_dev, |
| 771 | &db1300_i2s_dev, |
| 772 | &db1300_wm9715_dev, |
| 773 | &db1300_ac97dma_dev, |
| 774 | &db1300_i2sdma_dev, |
| 775 | &db1300_sndac97_dev, |
| 776 | &db1300_sndi2s_dev, |
| 777 | }; |
| 778 | |
| 779 | int __init db1300_dev_setup(void) |
| 780 | { |
| 781 | int swapped, cpldirq; |
| 782 | struct clk *c; |
| 783 | |
| 784 | /* setup CPLD IRQ muxer */ |
| 785 | cpldirq = au1300_gpio_to_irq(AU1300_PIN_EXTCLK1); |
| 786 | irq_set_irq_type(cpldirq, IRQ_TYPE_LEVEL_HIGH); |
| 787 | bcsr_init_irq(DB1300_FIRST_INT, DB1300_LAST_INT, cpldirq); |
| 788 | |
| 789 | /* insert/eject IRQs: one always triggers so don't enable them |
| 790 | * when doing request_irq() on them. DB1200 has this bug too. |
| 791 | */ |
| 792 | irq_set_status_flags(DB1300_SD1_INSERT_INT, IRQ_NOAUTOEN); |
| 793 | irq_set_status_flags(DB1300_SD1_EJECT_INT, IRQ_NOAUTOEN); |
| 794 | irq_set_status_flags(DB1300_CF_INSERT_INT, IRQ_NOAUTOEN); |
| 795 | irq_set_status_flags(DB1300_CF_EJECT_INT, IRQ_NOAUTOEN); |
| 796 | |
| 797 | /* |
| 798 | * setup board |
| 799 | */ |
| 800 | prom_get_ethernet_addr(&db1300_eth_config.mac[0]); |
| 801 | |
| 802 | i2c_register_board_info(0, db1300_i2c_devs, |
| 803 | ARRAY_SIZE(db1300_i2c_devs)); |
| 804 | |
| 805 | if (platform_driver_register(&db1300_wm97xx_driver)) |
| 806 | pr_warn("DB1300: failed to init touch pen irq support!\n"); |
| 807 | |
| 808 | /* Audio PSC clock is supplied by codecs (PSC1, 2) */ |
| 809 | __raw_writel(PSC_SEL_CLK_SERCLK, |
| 810 | (void __iomem *)KSEG1ADDR(AU1300_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET); |
| 811 | wmb(); |
| 812 | __raw_writel(PSC_SEL_CLK_SERCLK, |
| 813 | (void __iomem *)KSEG1ADDR(AU1300_PSC2_PHYS_ADDR) + PSC_SEL_OFFSET); |
| 814 | wmb(); |
| 815 | /* I2C driver wants 50MHz, get as close as possible */ |
| 816 | c = clk_get(NULL, "psc3_intclk"); |
| 817 | if (!IS_ERR(c)) { |
| 818 | clk_set_rate(c, 50000000); |
| 819 | clk_prepare_enable(c); |
| 820 | clk_put(c); |
| 821 | } |
| 822 | __raw_writel(PSC_SEL_CLK_INTCLK, |
| 823 | (void __iomem *)KSEG1ADDR(AU1300_PSC3_PHYS_ADDR) + PSC_SEL_OFFSET); |
| 824 | wmb(); |
| 825 | |
| 826 | /* enable power to USB ports */ |
| 827 | bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_USBHPWR | BCSR_RESETS_OTGPWR); |
| 828 | |
| 829 | /* although it is socket #0, it uses the CPLD bits which previous boards |
| 830 | * have used for socket #1. |
| 831 | */ |
| 832 | db1x_register_pcmcia_socket( |
| 833 | AU1000_PCMCIA_ATTR_PHYS_ADDR, |
| 834 | AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x00400000 - 1, |
| 835 | AU1000_PCMCIA_MEM_PHYS_ADDR, |
| 836 | AU1000_PCMCIA_MEM_PHYS_ADDR + 0x00400000 - 1, |
| 837 | AU1000_PCMCIA_IO_PHYS_ADDR, |
| 838 | AU1000_PCMCIA_IO_PHYS_ADDR + 0x00010000 - 1, |
| 839 | DB1300_CF_INT, DB1300_CF_INSERT_INT, 0, DB1300_CF_EJECT_INT, 1); |
| 840 | |
| 841 | swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT; |
| 842 | db1x_register_norflash(64 << 20, 2, swapped); |
| 843 | |
| 844 | return platform_add_devices(db1300_dev, ARRAY_SIZE(db1300_dev)); |
| 845 | } |
| 846 | |
| 847 | |
| 848 | int __init db1300_board_setup(void) |
| 849 | { |
| 850 | unsigned short whoami; |
| 851 | |
| 852 | bcsr_init(DB1300_BCSR_PHYS_ADDR, |
| 853 | DB1300_BCSR_PHYS_ADDR + DB1300_BCSR_HEXLED_OFS); |
| 854 | |
| 855 | whoami = bcsr_read(BCSR_WHOAMI); |
| 856 | if (BCSR_WHOAMI_BOARD(whoami) != BCSR_WHOAMI_DB1300) |
| 857 | return -ENODEV; |
| 858 | |
| 859 | db1300_gpio_config(); |
| 860 | |
| 861 | printk(KERN_INFO "NetLogic DBAu1300 Development Platform.\n\t" |
| 862 | "BoardID %d CPLD Rev %d DaughtercardID %d\n", |
| 863 | BCSR_WHOAMI_BOARD(whoami), BCSR_WHOAMI_CPLD(whoami), |
| 864 | BCSR_WHOAMI_DCID(whoami)); |
| 865 | |
| 866 | /* enable UARTs, YAMON only enables #2 */ |
| 867 | alchemy_uart_enable(AU1300_UART0_PHYS_ADDR); |
| 868 | alchemy_uart_enable(AU1300_UART1_PHYS_ADDR); |
| 869 | alchemy_uart_enable(AU1300_UART3_PHYS_ADDR); |
| 870 | |
| 871 | return 0; |
| 872 | } |