blob: cd1776a7015ac0dc6d10630eb45bc93f816b0aae [file] [log] [blame]
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00001// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2//
3// Copyright 2016 Freescale Semiconductor, Inc.
4
5#include "imx6ul.dtsi"
6#include "imx6ull-pinfunc.h"
7#include "imx6ull-pinfunc-snvs.h"
8
9/* Delete UART8 in AIPS-1 (i.MX6UL specific) */
10/delete-node/ &uart8;
11/* Delete CAAM node in AIPS-2 (i.MX6UL specific) */
12/delete-node/ &crypto;
13
14&cpu0 {
15 operating-points = <
16 /* kHz uV */
17 900000 1275000
18 792000 1225000
19 528000 1175000
20 396000 1025000
21 198000 950000
22 >;
23 fsl,soc-operating-points = <
24 /* KHz uV */
25 900000 1175000
26 792000 1175000
27 528000 1175000
28 396000 1175000
29 198000 1175000
30 >;
31};
32
33/ {
34 soc {
35 aips3: aips-bus@2200000 {
36 compatible = "fsl,aips-bus", "simple-bus";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 reg = <0x02200000 0x100000>;
40 ranges;
41
42 iomuxc_snvs: iomuxc-snvs@2290000 {
43 compatible = "fsl,imx6ull-iomuxc-snvs";
44 reg = <0x02290000 0x4000>;
45 };
46
47 uart8: serial@2288000 {
48 compatible = "fsl,imx6ul-uart",
49 "fsl,imx6q-uart";
50 reg = <0x02288000 0x4000>;
51 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
52 clocks = <&clks IMX6UL_CLK_UART8_IPG>,
53 <&clks IMX6UL_CLK_UART8_SERIAL>;
54 clock-names = "ipg", "per";
55 status = "disabled";
56 };
57 };
58 };
59};