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David Brazdil0f672f62019-12-10 10:32:29 +00001/* SPDX-License-Identifier: GPL-2.0-only */
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00002/*
3 * Copyright 2006 PathScale, Inc. All Rights Reserved.
Andrew Scullb4b6d4a2019-01-02 15:54:55 +00004 */
5
6#ifndef _LINUX_IO_H
7#define _LINUX_IO_H
8
9#include <linux/types.h>
10#include <linux/init.h>
11#include <linux/bug.h>
12#include <linux/err.h>
13#include <asm/io.h>
14#include <asm/page.h>
15
16struct device;
17struct resource;
18
19__visible void __iowrite32_copy(void __iomem *to, const void *from, size_t count);
20void __ioread32_copy(void *to, const void __iomem *from, size_t count);
21void __iowrite64_copy(void __iomem *to, const void *from, size_t count);
22
23#ifdef CONFIG_MMU
24int ioremap_page_range(unsigned long addr, unsigned long end,
25 phys_addr_t phys_addr, pgprot_t prot);
26#else
27static inline int ioremap_page_range(unsigned long addr, unsigned long end,
28 phys_addr_t phys_addr, pgprot_t prot)
29{
30 return 0;
31}
32#endif
33
34#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
35void __init ioremap_huge_init(void);
David Brazdil0f672f62019-12-10 10:32:29 +000036int arch_ioremap_p4d_supported(void);
Andrew Scullb4b6d4a2019-01-02 15:54:55 +000037int arch_ioremap_pud_supported(void);
38int arch_ioremap_pmd_supported(void);
39#else
40static inline void ioremap_huge_init(void) { }
41#endif
42
43/*
44 * Managed iomap interface
45 */
46#ifdef CONFIG_HAS_IOPORT_MAP
47void __iomem * devm_ioport_map(struct device *dev, unsigned long port,
48 unsigned int nr);
49void devm_ioport_unmap(struct device *dev, void __iomem *addr);
50#else
51static inline void __iomem *devm_ioport_map(struct device *dev,
52 unsigned long port,
53 unsigned int nr)
54{
55 return NULL;
56}
57
58static inline void devm_ioport_unmap(struct device *dev, void __iomem *addr)
59{
60}
61#endif
62
63#define IOMEM_ERR_PTR(err) (__force void __iomem *)ERR_PTR(err)
64
65void __iomem *devm_ioremap(struct device *dev, resource_size_t offset,
66 resource_size_t size);
67void __iomem *devm_ioremap_nocache(struct device *dev, resource_size_t offset,
68 resource_size_t size);
69void __iomem *devm_ioremap_wc(struct device *dev, resource_size_t offset,
70 resource_size_t size);
71void devm_iounmap(struct device *dev, void __iomem *addr);
72int check_signature(const volatile void __iomem *io_addr,
73 const unsigned char *signature, int length);
74void devm_ioremap_release(struct device *dev, void *res);
75
76void *devm_memremap(struct device *dev, resource_size_t offset,
77 size_t size, unsigned long flags);
78void devm_memunmap(struct device *dev, void *addr);
79
80void *__devm_memremap_pages(struct device *dev, struct resource *res);
81
82#ifdef CONFIG_PCI
83/*
84 * The PCI specifications (Rev 3.0, 3.2.5 "Transaction Ordering and
85 * Posting") mandate non-posted configuration transactions. There is
86 * no ioremap API in the kernel that can guarantee non-posted write
87 * semantics across arches so provide a default implementation for
88 * mapping PCI config space that defaults to ioremap_nocache(); arches
89 * should override it if they have memory mapping implementations that
90 * guarantee non-posted writes semantics to make the memory mapping
91 * compliant with the PCI specification.
92 */
93#ifndef pci_remap_cfgspace
94#define pci_remap_cfgspace pci_remap_cfgspace
95static inline void __iomem *pci_remap_cfgspace(phys_addr_t offset,
96 size_t size)
97{
98 return ioremap_nocache(offset, size);
99}
100#endif
101#endif
102
103/*
104 * Some systems do not have legacy ISA devices.
105 * /dev/port is not a valid interface on these systems.
106 * So for those archs, <asm/io.h> should define the following symbol.
107 */
108#ifndef arch_has_dev_port
109#define arch_has_dev_port() (1)
110#endif
111
112/*
113 * Some systems (x86 without PAT) have a somewhat reliable way to mark a
114 * physical address range such that uncached mappings will actually
115 * end up write-combining. This facility should be used in conjunction
116 * with pgprot_writecombine, ioremap-wc, or set_memory_wc, since it has
117 * no effect if the per-page mechanisms are functional.
118 * (On x86 without PAT, these functions manipulate MTRRs.)
119 *
120 * arch_phys_del_wc(0) or arch_phys_del_wc(any error code) is guaranteed
121 * to have no effect.
122 */
123#ifndef arch_phys_wc_add
124static inline int __must_check arch_phys_wc_add(unsigned long base,
125 unsigned long size)
126{
127 return 0; /* It worked (i.e. did nothing). */
128}
129
130static inline void arch_phys_wc_del(int handle)
131{
132}
133
134#define arch_phys_wc_add arch_phys_wc_add
135#ifndef arch_phys_wc_index
136static inline int arch_phys_wc_index(int handle)
137{
138 return -1;
139}
140#define arch_phys_wc_index arch_phys_wc_index
141#endif
142#endif
143
144enum {
145 /* See memremap() kernel-doc for usage description... */
146 MEMREMAP_WB = 1 << 0,
147 MEMREMAP_WT = 1 << 1,
148 MEMREMAP_WC = 1 << 2,
149 MEMREMAP_ENC = 1 << 3,
150 MEMREMAP_DEC = 1 << 4,
151};
152
153void *memremap(resource_size_t offset, size_t size, unsigned long flags);
154void memunmap(void *addr);
155
156/*
157 * On x86 PAT systems we have memory tracking that keeps track of
158 * the allowed mappings on memory ranges. This tracking works for
159 * all the in-kernel mapping APIs (ioremap*), but where the user
160 * wishes to map a range from a physical device into user memory
161 * the tracking won't be updated. This API is to be used by
162 * drivers which remap physical device pages into userspace,
163 * and wants to make sure they are mapped WC and not UC.
164 */
165#ifndef arch_io_reserve_memtype_wc
166static inline int arch_io_reserve_memtype_wc(resource_size_t base,
167 resource_size_t size)
168{
169 return 0;
170}
171
172static inline void arch_io_free_memtype_wc(resource_size_t base,
173 resource_size_t size)
174{
175}
176#endif
177
178#endif /* _LINUX_IO_H */