v4.19.13 snapshot.
diff --git a/drivers/usb/chipidea/host.c b/drivers/usb/chipidea/host.c
new file mode 100644
index 0000000..4638d9b
--- /dev/null
+++ b/drivers/usb/chipidea/host.c
@@ -0,0 +1,275 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * host.c - ChipIdea USB host controller driver
+ *
+ * Copyright (c) 2012 Intel Corporation
+ *
+ * Author: Alexander Shishkin
+ */
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/usb.h>
+#include <linux/usb/hcd.h>
+#include <linux/usb/chipidea.h>
+#include <linux/regulator/consumer.h>
+
+#include "../host/ehci.h"
+
+#include "ci.h"
+#include "bits.h"
+#include "host.h"
+
+static struct hc_driver __read_mostly ci_ehci_hc_driver;
+static int (*orig_bus_suspend)(struct usb_hcd *hcd);
+
+struct ehci_ci_priv {
+ struct regulator *reg_vbus;
+};
+
+static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
+{
+ struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+ struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv;
+ struct device *dev = hcd->self.controller;
+ struct ci_hdrc *ci = dev_get_drvdata(dev);
+ int ret = 0;
+ int port = HCS_N_PORTS(ehci->hcs_params);
+
+ if (priv->reg_vbus) {
+ if (port > 1) {
+ dev_warn(dev,
+ "Not support multi-port regulator control\n");
+ return 0;
+ }
+ if (enable)
+ ret = regulator_enable(priv->reg_vbus);
+ else
+ ret = regulator_disable(priv->reg_vbus);
+ if (ret) {
+ dev_err(dev,
+ "Failed to %s vbus regulator, ret=%d\n",
+ enable ? "enable" : "disable", ret);
+ return ret;
+ }
+ }
+
+ if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
+ /*
+ * Marvell 28nm HSIC PHY requires forcing the port to HS mode.
+ * As HSIC is always HS, this should be safe for others.
+ */
+ hw_port_test_set(ci, 5);
+ hw_port_test_set(ci, 0);
+ }
+ return 0;
+};
+
+static int ehci_ci_reset(struct usb_hcd *hcd)
+{
+ struct device *dev = hcd->self.controller;
+ struct ci_hdrc *ci = dev_get_drvdata(dev);
+ struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+ int ret;
+
+ ret = ehci_setup(hcd);
+ if (ret)
+ return ret;
+
+ ehci->need_io_watchdog = 0;
+
+ if (ci->platdata->notify_event) {
+ ret = ci->platdata->notify_event(ci,
+ CI_HDRC_CONTROLLER_RESET_EVENT);
+ if (ret)
+ return ret;
+ }
+
+ ci_platform_configure(ci);
+
+ return ret;
+}
+
+static const struct ehci_driver_overrides ehci_ci_overrides = {
+ .extra_priv_size = sizeof(struct ehci_ci_priv),
+ .port_power = ehci_ci_portpower,
+ .reset = ehci_ci_reset,
+};
+
+static irqreturn_t host_irq(struct ci_hdrc *ci)
+{
+ return usb_hcd_irq(ci->irq, ci->hcd);
+}
+
+static int host_start(struct ci_hdrc *ci)
+{
+ struct usb_hcd *hcd;
+ struct ehci_hcd *ehci;
+ struct ehci_ci_priv *priv;
+ int ret;
+
+ if (usb_disabled())
+ return -ENODEV;
+
+ hcd = __usb_create_hcd(&ci_ehci_hc_driver, ci->dev->parent,
+ ci->dev, dev_name(ci->dev), NULL);
+ if (!hcd)
+ return -ENOMEM;
+
+ dev_set_drvdata(ci->dev, ci);
+ hcd->rsrc_start = ci->hw_bank.phys;
+ hcd->rsrc_len = ci->hw_bank.size;
+ hcd->regs = ci->hw_bank.abs;
+ hcd->has_tt = 1;
+
+ hcd->power_budget = ci->platdata->power_budget;
+ hcd->tpl_support = ci->platdata->tpl_support;
+ if (ci->phy || ci->usb_phy) {
+ hcd->skip_phy_initialization = 1;
+ if (ci->usb_phy)
+ hcd->usb_phy = ci->usb_phy;
+ }
+
+ ehci = hcd_to_ehci(hcd);
+ ehci->caps = ci->hw_bank.cap;
+ ehci->has_hostpc = ci->hw_bank.lpm;
+ ehci->has_tdi_phy_lpm = ci->hw_bank.lpm;
+ ehci->imx28_write_fix = ci->imx28_write_fix;
+
+ priv = (struct ehci_ci_priv *)ehci->priv;
+ priv->reg_vbus = NULL;
+
+ if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci)) {
+ if (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON) {
+ ret = regulator_enable(ci->platdata->reg_vbus);
+ if (ret) {
+ dev_err(ci->dev,
+ "Failed to enable vbus regulator, ret=%d\n",
+ ret);
+ goto put_hcd;
+ }
+ } else {
+ priv->reg_vbus = ci->platdata->reg_vbus;
+ }
+ }
+
+ ret = usb_add_hcd(hcd, 0, 0);
+ if (ret) {
+ goto disable_reg;
+ } else {
+ struct usb_otg *otg = &ci->otg;
+
+ ci->hcd = hcd;
+
+ if (ci_otg_is_fsm_mode(ci)) {
+ otg->host = &hcd->self;
+ hcd->self.otg_port = 1;
+ }
+ }
+
+ return ret;
+
+disable_reg:
+ if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
+ (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
+ regulator_disable(ci->platdata->reg_vbus);
+put_hcd:
+ usb_put_hcd(hcd);
+
+ return ret;
+}
+
+static void host_stop(struct ci_hdrc *ci)
+{
+ struct usb_hcd *hcd = ci->hcd;
+
+ if (hcd) {
+ if (ci->platdata->notify_event)
+ ci->platdata->notify_event(ci,
+ CI_HDRC_CONTROLLER_STOPPED_EVENT);
+ usb_remove_hcd(hcd);
+ ci->role = CI_ROLE_END;
+ synchronize_irq(ci->irq);
+ usb_put_hcd(hcd);
+ if (ci->platdata->reg_vbus && !ci_otg_is_fsm_mode(ci) &&
+ (ci->platdata->flags & CI_HDRC_TURN_VBUS_EARLY_ON))
+ regulator_disable(ci->platdata->reg_vbus);
+ }
+ ci->hcd = NULL;
+ ci->otg.host = NULL;
+}
+
+
+void ci_hdrc_host_destroy(struct ci_hdrc *ci)
+{
+ if (ci->role == CI_ROLE_HOST && ci->hcd)
+ host_stop(ci);
+}
+
+static int ci_ehci_bus_suspend(struct usb_hcd *hcd)
+{
+ struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+ int port;
+ u32 tmp;
+
+ int ret = orig_bus_suspend(hcd);
+
+ if (ret)
+ return ret;
+
+ port = HCS_N_PORTS(ehci->hcs_params);
+ while (port--) {
+ u32 __iomem *reg = &ehci->regs->port_status[port];
+ u32 portsc = ehci_readl(ehci, reg);
+
+ if (portsc & PORT_CONNECT) {
+ /*
+ * For chipidea, the resume signal will be ended
+ * automatically, so for remote wakeup case, the
+ * usbcmd.rs may not be set before the resume has
+ * ended if other resume paths consumes too much
+ * time (~24ms), in that case, the SOF will not
+ * send out within 3ms after resume ends, then the
+ * high speed device will enter full speed mode.
+ */
+
+ tmp = ehci_readl(ehci, &ehci->regs->command);
+ tmp |= CMD_RUN;
+ ehci_writel(ehci, tmp, &ehci->regs->command);
+ /*
+ * It needs a short delay between set RS bit and PHCD.
+ */
+ usleep_range(150, 200);
+ break;
+ }
+ }
+
+ return 0;
+}
+
+int ci_hdrc_host_init(struct ci_hdrc *ci)
+{
+ struct ci_role_driver *rdrv;
+
+ if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_HC))
+ return -ENXIO;
+
+ rdrv = devm_kzalloc(ci->dev, sizeof(struct ci_role_driver), GFP_KERNEL);
+ if (!rdrv)
+ return -ENOMEM;
+
+ rdrv->start = host_start;
+ rdrv->stop = host_stop;
+ rdrv->irq = host_irq;
+ rdrv->name = "host";
+ ci->roles[CI_ROLE_HOST] = rdrv;
+
+ return 0;
+}
+
+void ci_hdrc_host_driver_init(void)
+{
+ ehci_init_driver(&ci_ehci_hc_driver, &ehci_ci_overrides);
+ orig_bus_suspend = ci_ehci_hc_driver.bus_suspend;
+ ci_ehci_hc_driver.bus_suspend = ci_ehci_bus_suspend;
+}