Update Linux to v5.4.2
Change-Id: Idf6911045d9d382da2cfe01b1edff026404ac8fd
diff --git a/drivers/pinctrl/stm32/Kconfig b/drivers/pinctrl/stm32/Kconfig
index cd3936e..f36f291 100644
--- a/drivers/pinctrl/stm32/Kconfig
+++ b/drivers/pinctrl/stm32/Kconfig
@@ -1,3 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0-only
if ARCH_STM32 || COMPILE_TEST
config PINCTRL_STM32
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c
index a9bec6e..2d5e043 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32.c
+++ b/drivers/pinctrl/stm32/pinctrl-stm32.c
@@ -8,6 +8,7 @@
*/
#include <linux/clk.h>
#include <linux/gpio/driver.h>
+#include <linux/hwspinlock.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/mfd/syscon.h>
@@ -43,6 +44,18 @@
#define STM32_GPIO_AFRL 0x20
#define STM32_GPIO_AFRH 0x24
+/* custom bitfield to backup pin status */
+#define STM32_GPIO_BKP_MODE_SHIFT 0
+#define STM32_GPIO_BKP_MODE_MASK GENMASK(1, 0)
+#define STM32_GPIO_BKP_ALT_SHIFT 2
+#define STM32_GPIO_BKP_ALT_MASK GENMASK(5, 2)
+#define STM32_GPIO_BKP_SPEED_SHIFT 6
+#define STM32_GPIO_BKP_SPEED_MASK GENMASK(7, 6)
+#define STM32_GPIO_BKP_PUPD_SHIFT 8
+#define STM32_GPIO_BKP_PUPD_MASK GENMASK(9, 8)
+#define STM32_GPIO_BKP_TYPE 10
+#define STM32_GPIO_BKP_VAL 11
+
#define STM32_GPIO_PINS_PER_BANK 16
#define STM32_GPIO_IRQ_LINE 16
@@ -51,6 +64,8 @@
#define gpio_range_to_bank(chip) \
container_of(chip, struct stm32_gpio_bank, range)
+#define HWSPINLOCK_TIMEOUT 5 /* msec */
+
static const char * const stm32_gpio_functions[] = {
"gpio", "af0", "af1",
"af2", "af3", "af4",
@@ -76,6 +91,7 @@
struct irq_domain *domain;
u32 bank_nr;
u32 bank_ioport_nr;
+ u32 pin_backup[STM32_GPIO_PINS_PER_BANK];
};
struct stm32_pinctrl {
@@ -91,6 +107,12 @@
struct irq_domain *domain;
struct regmap *regmap;
struct regmap_field *irqmux[STM32_GPIO_PINS_PER_BANK];
+ struct hwspinlock *hwlock;
+ struct stm32_desc_pin *pins;
+ u32 npins;
+ u32 pkg;
+ u16 irqmux_map;
+ spinlock_t irqmux_lock;
};
static inline int stm32_gpio_pin(int gpio)
@@ -126,11 +148,50 @@
return 0;
}
+static void stm32_gpio_backup_value(struct stm32_gpio_bank *bank,
+ u32 offset, u32 value)
+{
+ bank->pin_backup[offset] &= ~BIT(STM32_GPIO_BKP_VAL);
+ bank->pin_backup[offset] |= value << STM32_GPIO_BKP_VAL;
+}
+
+static void stm32_gpio_backup_mode(struct stm32_gpio_bank *bank, u32 offset,
+ u32 mode, u32 alt)
+{
+ bank->pin_backup[offset] &= ~(STM32_GPIO_BKP_MODE_MASK |
+ STM32_GPIO_BKP_ALT_MASK);
+ bank->pin_backup[offset] |= mode << STM32_GPIO_BKP_MODE_SHIFT;
+ bank->pin_backup[offset] |= alt << STM32_GPIO_BKP_ALT_SHIFT;
+}
+
+static void stm32_gpio_backup_driving(struct stm32_gpio_bank *bank, u32 offset,
+ u32 drive)
+{
+ bank->pin_backup[offset] &= ~BIT(STM32_GPIO_BKP_TYPE);
+ bank->pin_backup[offset] |= drive << STM32_GPIO_BKP_TYPE;
+}
+
+static void stm32_gpio_backup_speed(struct stm32_gpio_bank *bank, u32 offset,
+ u32 speed)
+{
+ bank->pin_backup[offset] &= ~STM32_GPIO_BKP_SPEED_MASK;
+ bank->pin_backup[offset] |= speed << STM32_GPIO_BKP_SPEED_SHIFT;
+}
+
+static void stm32_gpio_backup_bias(struct stm32_gpio_bank *bank, u32 offset,
+ u32 bias)
+{
+ bank->pin_backup[offset] &= ~STM32_GPIO_BKP_PUPD_MASK;
+ bank->pin_backup[offset] |= bias << STM32_GPIO_BKP_PUPD_SHIFT;
+}
+
/* GPIO functions */
static inline void __stm32_gpio_set(struct stm32_gpio_bank *bank,
unsigned offset, int value)
{
+ stm32_gpio_backup_value(bank, offset, value);
+
if (!value)
offset += STM32_GPIO_PINS_PER_BANK;
@@ -300,9 +361,53 @@
{
struct stm32_gpio_bank *bank = d->host_data;
struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);
+ unsigned long flags;
+ int ret = 0;
+
+ /*
+ * gpio irq mux is shared between several banks, a lock has to be done
+ * to avoid overriding.
+ */
+ spin_lock_irqsave(&pctl->irqmux_lock, flags);
+ if (pctl->hwlock)
+ ret = hwspin_lock_timeout(pctl->hwlock, HWSPINLOCK_TIMEOUT);
+
+ if (ret) {
+ dev_err(pctl->dev, "Can't get hwspinlock\n");
+ goto unlock;
+ }
+
+ if (pctl->irqmux_map & BIT(irq_data->hwirq)) {
+ dev_err(pctl->dev, "irq line %ld already requested.\n",
+ irq_data->hwirq);
+ ret = -EBUSY;
+ if (pctl->hwlock)
+ hwspin_unlock(pctl->hwlock);
+ goto unlock;
+ } else {
+ pctl->irqmux_map |= BIT(irq_data->hwirq);
+ }
regmap_field_write(pctl->irqmux[irq_data->hwirq], bank->bank_ioport_nr);
- return 0;
+
+ if (pctl->hwlock)
+ hwspin_unlock(pctl->hwlock);
+
+unlock:
+ spin_unlock_irqrestore(&pctl->irqmux_lock, flags);
+ return ret;
+}
+
+static void stm32_gpio_domain_deactivate(struct irq_domain *d,
+ struct irq_data *irq_data)
+{
+ struct stm32_gpio_bank *bank = d->host_data;
+ struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);
+ unsigned long flags;
+
+ spin_lock_irqsave(&pctl->irqmux_lock, flags);
+ pctl->irqmux_map &= ~BIT(irq_data->hwirq);
+ spin_unlock_irqrestore(&pctl->irqmux_lock, flags);
}
static int stm32_gpio_domain_alloc(struct irq_domain *d,
@@ -331,6 +436,7 @@
.alloc = stm32_gpio_domain_alloc,
.free = irq_domain_free_irqs_common,
.activate = stm32_gpio_domain_activate,
+ .deactivate = stm32_gpio_domain_deactivate,
};
/* Pinctrl functions */
@@ -354,8 +460,8 @@
{
int i;
- for (i = 0; i < pctl->match_data->npins; i++) {
- const struct stm32_desc_pin *pin = pctl->match_data->pins + i;
+ for (i = 0; i < pctl->npins; i++) {
+ const struct stm32_desc_pin *pin = pctl->pins + i;
const struct stm32_desc_function *func = pin->functions;
if (pin->pin.number != pin_num)
@@ -410,14 +516,14 @@
unsigned int num_configs;
bool has_config = 0;
unsigned reserve = 0;
- int num_pins, num_funcs, maps_per_pin, i, err;
+ int num_pins, num_funcs, maps_per_pin, i, err = 0;
pctl = pinctrl_dev_get_drvdata(pctldev);
pins = of_find_property(node, "pinmux", NULL);
if (!pins) {
- dev_err(pctl->dev, "missing pins property in node %s .\n",
- node->name);
+ dev_err(pctl->dev, "missing pins property in node %pOFn .\n",
+ node);
return -EINVAL;
}
@@ -437,41 +543,45 @@
if (has_config && num_pins >= 1)
maps_per_pin++;
- if (!num_pins || !maps_per_pin)
- return -EINVAL;
+ if (!num_pins || !maps_per_pin) {
+ err = -EINVAL;
+ goto exit;
+ }
reserve = num_pins * maps_per_pin;
err = pinctrl_utils_reserve_map(pctldev, map,
reserved_maps, num_maps, reserve);
if (err)
- return err;
+ goto exit;
for (i = 0; i < num_pins; i++) {
err = of_property_read_u32_index(node, "pinmux",
i, &pinfunc);
if (err)
- return err;
+ goto exit;
pin = STM32_GET_PIN_NO(pinfunc);
func = STM32_GET_PIN_FUNC(pinfunc);
if (!stm32_pctrl_is_function_valid(pctl, pin, func)) {
dev_err(pctl->dev, "invalid function.\n");
- return -EINVAL;
+ err = -EINVAL;
+ goto exit;
}
grp = stm32_pctrl_find_group_by_pin(pctl, pin);
if (!grp) {
dev_err(pctl->dev, "unable to match pin %d to group\n",
pin);
- return -EINVAL;
+ err = -EINVAL;
+ goto exit;
}
err = stm32_pctrl_dt_node_to_map_func(pctl, pin, func, grp, map,
reserved_maps, num_maps);
if (err)
- return err;
+ goto exit;
if (has_config) {
err = pinctrl_utils_add_map_configs(pctldev, map,
@@ -479,11 +589,13 @@
configs, num_configs,
PIN_MAP_TYPE_CONFIGS_GROUP);
if (err)
- return err;
+ goto exit;
}
}
- return 0;
+exit:
+ kfree(configs);
+ return err;
}
static int stm32_pctrl_dt_node_to_map(struct pinctrl_dev *pctldev,
@@ -503,6 +615,7 @@
&reserved_maps, num_maps);
if (ret < 0) {
pinctrl_utils_free_map(pctldev, *map, *num_maps);
+ of_node_put(np);
return ret;
}
}
@@ -573,17 +686,27 @@
return 0;
}
-static void stm32_pmx_set_mode(struct stm32_gpio_bank *bank,
- int pin, u32 mode, u32 alt)
+static int stm32_pmx_set_mode(struct stm32_gpio_bank *bank,
+ int pin, u32 mode, u32 alt)
{
+ struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);
u32 val;
int alt_shift = (pin % 8) * 4;
int alt_offset = STM32_GPIO_AFRL + (pin / 8) * 4;
unsigned long flags;
+ int err = 0;
clk_enable(bank->clk);
spin_lock_irqsave(&bank->lock, flags);
+ if (pctl->hwlock)
+ err = hwspin_lock_timeout(pctl->hwlock, HWSPINLOCK_TIMEOUT);
+
+ if (err) {
+ dev_err(pctl->dev, "Can't get hwspinlock\n");
+ goto unlock;
+ }
+
val = readl_relaxed(bank->base + alt_offset);
val &= ~GENMASK(alt_shift + 3, alt_shift);
val |= (alt << alt_shift);
@@ -594,8 +717,16 @@
val |= mode << (pin * 2);
writel_relaxed(val, bank->base + STM32_GPIO_MODER);
+ if (pctl->hwlock)
+ hwspin_unlock(pctl->hwlock);
+
+ stm32_gpio_backup_mode(bank, pin, mode, alt);
+
+unlock:
spin_unlock_irqrestore(&bank->lock, flags);
clk_disable(bank->clk);
+
+ return err;
}
void stm32_pmx_get_mode(struct stm32_gpio_bank *bank, int pin, u32 *mode,
@@ -652,9 +783,7 @@
mode = stm32_gpio_get_mode(function);
alt = stm32_gpio_get_alt(function);
- stm32_pmx_set_mode(bank, pin, mode, alt);
-
- return 0;
+ return stm32_pmx_set_mode(bank, pin, mode, alt);
}
static int stm32_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
@@ -664,9 +793,7 @@
struct stm32_gpio_bank *bank = gpiochip_get_data(range->gc);
int pin = stm32_gpio_pin(gpio);
- stm32_pmx_set_mode(bank, pin, !input, 0);
-
- return 0;
+ return stm32_pmx_set_mode(bank, pin, !input, 0);
}
static const struct pinmux_ops stm32_pmx_ops = {
@@ -680,22 +807,40 @@
/* Pinconf functions */
-static void stm32_pconf_set_driving(struct stm32_gpio_bank *bank,
- unsigned offset, u32 drive)
+static int stm32_pconf_set_driving(struct stm32_gpio_bank *bank,
+ unsigned offset, u32 drive)
{
+ struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);
unsigned long flags;
u32 val;
+ int err = 0;
clk_enable(bank->clk);
spin_lock_irqsave(&bank->lock, flags);
+ if (pctl->hwlock)
+ err = hwspin_lock_timeout(pctl->hwlock, HWSPINLOCK_TIMEOUT);
+
+ if (err) {
+ dev_err(pctl->dev, "Can't get hwspinlock\n");
+ goto unlock;
+ }
+
val = readl_relaxed(bank->base + STM32_GPIO_TYPER);
val &= ~BIT(offset);
val |= drive << offset;
writel_relaxed(val, bank->base + STM32_GPIO_TYPER);
+ if (pctl->hwlock)
+ hwspin_unlock(pctl->hwlock);
+
+ stm32_gpio_backup_driving(bank, offset, drive);
+
+unlock:
spin_unlock_irqrestore(&bank->lock, flags);
clk_disable(bank->clk);
+
+ return err;
}
static u32 stm32_pconf_get_driving(struct stm32_gpio_bank *bank,
@@ -716,22 +861,40 @@
return (val >> offset);
}
-static void stm32_pconf_set_speed(struct stm32_gpio_bank *bank,
- unsigned offset, u32 speed)
+static int stm32_pconf_set_speed(struct stm32_gpio_bank *bank,
+ unsigned offset, u32 speed)
{
+ struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);
unsigned long flags;
u32 val;
+ int err = 0;
clk_enable(bank->clk);
spin_lock_irqsave(&bank->lock, flags);
+ if (pctl->hwlock)
+ err = hwspin_lock_timeout(pctl->hwlock, HWSPINLOCK_TIMEOUT);
+
+ if (err) {
+ dev_err(pctl->dev, "Can't get hwspinlock\n");
+ goto unlock;
+ }
+
val = readl_relaxed(bank->base + STM32_GPIO_SPEEDR);
val &= ~GENMASK(offset * 2 + 1, offset * 2);
val |= speed << (offset * 2);
writel_relaxed(val, bank->base + STM32_GPIO_SPEEDR);
+ if (pctl->hwlock)
+ hwspin_unlock(pctl->hwlock);
+
+ stm32_gpio_backup_speed(bank, offset, speed);
+
+unlock:
spin_unlock_irqrestore(&bank->lock, flags);
clk_disable(bank->clk);
+
+ return err;
}
static u32 stm32_pconf_get_speed(struct stm32_gpio_bank *bank,
@@ -752,22 +915,40 @@
return (val >> (offset * 2));
}
-static void stm32_pconf_set_bias(struct stm32_gpio_bank *bank,
- unsigned offset, u32 bias)
+static int stm32_pconf_set_bias(struct stm32_gpio_bank *bank,
+ unsigned offset, u32 bias)
{
+ struct stm32_pinctrl *pctl = dev_get_drvdata(bank->gpio_chip.parent);
unsigned long flags;
u32 val;
+ int err = 0;
clk_enable(bank->clk);
spin_lock_irqsave(&bank->lock, flags);
+ if (pctl->hwlock)
+ err = hwspin_lock_timeout(pctl->hwlock, HWSPINLOCK_TIMEOUT);
+
+ if (err) {
+ dev_err(pctl->dev, "Can't get hwspinlock\n");
+ goto unlock;
+ }
+
val = readl_relaxed(bank->base + STM32_GPIO_PUPDR);
val &= ~GENMASK(offset * 2 + 1, offset * 2);
val |= bias << (offset * 2);
writel_relaxed(val, bank->base + STM32_GPIO_PUPDR);
+ if (pctl->hwlock)
+ hwspin_unlock(pctl->hwlock);
+
+ stm32_gpio_backup_bias(bank, offset, bias);
+
+unlock:
spin_unlock_irqrestore(&bank->lock, flags);
clk_disable(bank->clk);
+
+ return err;
}
static u32 stm32_pconf_get_bias(struct stm32_gpio_bank *bank,
@@ -830,22 +1011,22 @@
switch (param) {
case PIN_CONFIG_DRIVE_PUSH_PULL:
- stm32_pconf_set_driving(bank, offset, 0);
+ ret = stm32_pconf_set_driving(bank, offset, 0);
break;
case PIN_CONFIG_DRIVE_OPEN_DRAIN:
- stm32_pconf_set_driving(bank, offset, 1);
+ ret = stm32_pconf_set_driving(bank, offset, 1);
break;
case PIN_CONFIG_SLEW_RATE:
- stm32_pconf_set_speed(bank, offset, arg);
+ ret = stm32_pconf_set_speed(bank, offset, arg);
break;
case PIN_CONFIG_BIAS_DISABLE:
- stm32_pconf_set_bias(bank, offset, 0);
+ ret = stm32_pconf_set_bias(bank, offset, 0);
break;
case PIN_CONFIG_BIAS_PULL_UP:
- stm32_pconf_set_bias(bank, offset, 1);
+ ret = stm32_pconf_set_bias(bank, offset, 1);
break;
case PIN_CONFIG_BIAS_PULL_DOWN:
- stm32_pconf_set_bias(bank, offset, 2);
+ ret = stm32_pconf_set_bias(bank, offset, 2);
break;
case PIN_CONFIG_OUTPUT:
__stm32_gpio_set(bank, offset, arg);
@@ -1049,23 +1230,35 @@
return 0;
}
+static struct irq_domain *stm32_pctrl_get_irq_domain(struct device_node *np)
+{
+ struct device_node *parent;
+ struct irq_domain *domain;
+
+ if (!of_find_property(np, "interrupt-parent", NULL))
+ return NULL;
+
+ parent = of_irq_find_parent(np);
+ if (!parent)
+ return ERR_PTR(-ENXIO);
+
+ domain = irq_find_host(parent);
+ if (!domain)
+ /* domain not registered yet */
+ return ERR_PTR(-EPROBE_DEFER);
+
+ return domain;
+}
+
static int stm32_pctrl_dt_setup_irq(struct platform_device *pdev,
struct stm32_pinctrl *pctl)
{
- struct device_node *np = pdev->dev.of_node, *parent;
+ struct device_node *np = pdev->dev.of_node;
struct device *dev = &pdev->dev;
struct regmap *rm;
int offset, ret, i;
int mask, mask_width;
- parent = of_irq_find_parent(np);
- if (!parent)
- return -ENXIO;
-
- pctl->domain = irq_find_host(parent);
- if (!pctl->domain)
- return -ENXIO;
-
pctl->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg");
if (IS_ERR(pctl->regmap))
return PTR_ERR(pctl->regmap);
@@ -1105,7 +1298,7 @@
struct stm32_pinctrl *pctl = platform_get_drvdata(pdev);
int i;
- pctl->ngroups = pctl->match_data->npins;
+ pctl->ngroups = pctl->npins;
/* Allocate groups */
pctl->groups = devm_kcalloc(&pdev->dev, pctl->ngroups,
@@ -1119,19 +1312,50 @@
if (!pctl->grp_names)
return -ENOMEM;
- for (i = 0; i < pctl->match_data->npins; i++) {
- const struct stm32_desc_pin *pin = pctl->match_data->pins + i;
+ for (i = 0; i < pctl->npins; i++) {
+ const struct stm32_desc_pin *pin = pctl->pins + i;
struct stm32_pinctrl_group *group = pctl->groups + i;
group->name = pin->pin.name;
group->pin = pin->pin.number;
-
pctl->grp_names[i] = pin->pin.name;
}
return 0;
}
+static int stm32_pctrl_create_pins_tab(struct stm32_pinctrl *pctl,
+ struct stm32_desc_pin *pins)
+{
+ const struct stm32_desc_pin *p;
+ int i, nb_pins_available = 0;
+
+ for (i = 0; i < pctl->match_data->npins; i++) {
+ p = pctl->match_data->pins + i;
+ if (pctl->pkg && !(pctl->pkg & p->pkg))
+ continue;
+ pins->pin = p->pin;
+ pins->functions = p->functions;
+ pins++;
+ nb_pins_available++;
+ }
+
+ pctl->npins = nb_pins_available;
+
+ return 0;
+}
+
+static void stm32_pctl_get_package(struct device_node *np,
+ struct stm32_pinctrl *pctl)
+{
+ if (of_property_read_u32(np, "st,package", &pctl->pkg)) {
+ pctl->pkg = 0;
+ dev_warn(pctl->dev, "No package detected, use default one\n");
+ } else {
+ dev_dbg(pctl->dev, "package detected: %x\n", pctl->pkg);
+ }
+}
+
int stm32_pctl_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
@@ -1140,7 +1364,7 @@
struct device *dev = &pdev->dev;
struct stm32_pinctrl *pctl;
struct pinctrl_pin_desc *pins;
- int i, ret, banks = 0;
+ int i, ret, hwlock_id, banks = 0;
if (!np)
return -EINVAL;
@@ -1160,32 +1384,62 @@
platform_set_drvdata(pdev, pctl);
+ /* check for IRQ controller (may require deferred probe) */
+ pctl->domain = stm32_pctrl_get_irq_domain(np);
+ if (IS_ERR(pctl->domain))
+ return PTR_ERR(pctl->domain);
+
+ /* hwspinlock is optional */
+ hwlock_id = of_hwspin_lock_get_id(pdev->dev.of_node, 0);
+ if (hwlock_id < 0) {
+ if (hwlock_id == -EPROBE_DEFER)
+ return hwlock_id;
+ } else {
+ pctl->hwlock = hwspin_lock_request_specific(hwlock_id);
+ }
+
+ spin_lock_init(&pctl->irqmux_lock);
+
pctl->dev = dev;
pctl->match_data = match->data;
+
+ /* get package information */
+ stm32_pctl_get_package(np, pctl);
+
+ pctl->pins = devm_kcalloc(pctl->dev, pctl->match_data->npins,
+ sizeof(*pctl->pins), GFP_KERNEL);
+ if (!pctl->pins)
+ return -ENOMEM;
+
+ ret = stm32_pctrl_create_pins_tab(pctl, pctl->pins);
+ if (ret)
+ return ret;
+
ret = stm32_pctrl_build_state(pdev);
if (ret) {
dev_err(dev, "build state failed: %d\n", ret);
return -EINVAL;
}
- if (of_find_property(np, "interrupt-parent", NULL)) {
+ if (pctl->domain) {
ret = stm32_pctrl_dt_setup_irq(pdev, pctl);
if (ret)
return ret;
}
- pins = devm_kcalloc(&pdev->dev, pctl->match_data->npins, sizeof(*pins),
+ pins = devm_kcalloc(&pdev->dev, pctl->npins, sizeof(*pins),
GFP_KERNEL);
if (!pins)
return -ENOMEM;
- for (i = 0; i < pctl->match_data->npins; i++)
- pins[i] = pctl->match_data->pins[i].pin;
+ for (i = 0; i < pctl->npins; i++)
+ pins[i] = pctl->pins[i].pin;
pctl->pctl_desc.name = dev_name(&pdev->dev);
pctl->pctl_desc.owner = THIS_MODULE;
pctl->pctl_desc.pins = pins;
- pctl->pctl_desc.npins = pctl->match_data->npins;
+ pctl->pctl_desc.npins = pctl->npins;
+ pctl->pctl_desc.link_consumers = true;
pctl->pctl_desc.confops = &stm32_pconf_ops;
pctl->pctl_desc.pctlops = &stm32_pctrl_ops;
pctl->pctl_desc.pmxops = &stm32_pmx_ops;
@@ -1215,8 +1469,10 @@
for_each_available_child_of_node(np, child) {
if (of_property_read_bool(child, "gpio-controller")) {
ret = stm32_gpiolib_register_bank(pctl, child);
- if (ret)
+ if (ret) {
+ of_node_put(child);
return ret;
+ }
pctl->nbanks++;
}
@@ -1227,3 +1483,74 @@
return 0;
}
+static int __maybe_unused stm32_pinctrl_restore_gpio_regs(
+ struct stm32_pinctrl *pctl, u32 pin)
+{
+ const struct pin_desc *desc = pin_desc_get(pctl->pctl_dev, pin);
+ u32 val, alt, mode, offset = stm32_gpio_pin(pin);
+ struct pinctrl_gpio_range *range;
+ struct stm32_gpio_bank *bank;
+ bool pin_is_irq;
+ int ret;
+
+ range = pinctrl_find_gpio_range_from_pin(pctl->pctl_dev, pin);
+ if (!range)
+ return 0;
+
+ pin_is_irq = gpiochip_line_is_irq(range->gc, offset);
+
+ if (!desc || (!pin_is_irq && !desc->gpio_owner))
+ return 0;
+
+ bank = gpiochip_get_data(range->gc);
+
+ alt = bank->pin_backup[offset] & STM32_GPIO_BKP_ALT_MASK;
+ alt >>= STM32_GPIO_BKP_ALT_SHIFT;
+ mode = bank->pin_backup[offset] & STM32_GPIO_BKP_MODE_MASK;
+ mode >>= STM32_GPIO_BKP_MODE_SHIFT;
+
+ ret = stm32_pmx_set_mode(bank, offset, mode, alt);
+ if (ret)
+ return ret;
+
+ if (mode == 1) {
+ val = bank->pin_backup[offset] & BIT(STM32_GPIO_BKP_VAL);
+ val = val >> STM32_GPIO_BKP_VAL;
+ __stm32_gpio_set(bank, offset, val);
+ }
+
+ val = bank->pin_backup[offset] & BIT(STM32_GPIO_BKP_TYPE);
+ val >>= STM32_GPIO_BKP_TYPE;
+ ret = stm32_pconf_set_driving(bank, offset, val);
+ if (ret)
+ return ret;
+
+ val = bank->pin_backup[offset] & STM32_GPIO_BKP_SPEED_MASK;
+ val >>= STM32_GPIO_BKP_SPEED_SHIFT;
+ ret = stm32_pconf_set_speed(bank, offset, val);
+ if (ret)
+ return ret;
+
+ val = bank->pin_backup[offset] & STM32_GPIO_BKP_PUPD_MASK;
+ val >>= STM32_GPIO_BKP_PUPD_SHIFT;
+ ret = stm32_pconf_set_bias(bank, offset, val);
+ if (ret)
+ return ret;
+
+ if (pin_is_irq)
+ regmap_field_write(pctl->irqmux[offset], bank->bank_ioport_nr);
+
+ return 0;
+}
+
+int __maybe_unused stm32_pinctrl_resume(struct device *dev)
+{
+ struct stm32_pinctrl *pctl = dev_get_drvdata(dev);
+ struct stm32_pinctrl_group *g = pctl->groups;
+ int i;
+
+ for (i = g->pin; i < g->pin + pctl->ngroups; i++)
+ stm32_pinctrl_restore_gpio_regs(pctl, i);
+
+ return 0;
+}
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.h b/drivers/pinctrl/stm32/pinctrl-stm32.h
index 473a623..ec0d34c 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32.h
+++ b/drivers/pinctrl/stm32/pinctrl-stm32.h
@@ -18,6 +18,12 @@
#define STM32_PIN_AF(x) ((x) + 1)
#define STM32_PIN_ANALOG (STM32_PIN_AF(15) + 1)
+/* package information */
+#define STM32MP_PKG_AA BIT(0)
+#define STM32MP_PKG_AB BIT(1)
+#define STM32MP_PKG_AC BIT(2)
+#define STM32MP_PKG_AD BIT(3)
+
struct stm32_desc_function {
const char *name;
const unsigned char num;
@@ -26,6 +32,7 @@
struct stm32_desc_pin {
struct pinctrl_pin_desc pin;
const struct stm32_desc_function *functions;
+ const unsigned int pkg;
};
#define STM32_PIN(_pin, ...) \
@@ -35,6 +42,13 @@
__VA_ARGS__, { } }, \
}
+#define STM32_PIN_PKG(_pin, _pkg, ...) \
+ { \
+ .pin = _pin, \
+ .pkg = _pkg, \
+ .functions = (struct stm32_desc_function[]){ \
+ __VA_ARGS__, { } }, \
+ }
#define STM32_FUNCTION(_num, _name) \
{ \
.num = _num, \
@@ -51,5 +65,7 @@
int stm32_pctl_probe(struct platform_device *pdev);
void stm32_pmx_get_mode(struct stm32_gpio_bank *bank,
int pin, u32 *mode, u32 *alt);
+int stm32_pinctrl_resume(struct device *dev);
+
#endif /* __PINCTRL_STM32_H */
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32mp157.c b/drivers/pinctrl/stm32/pinctrl-stm32mp157.c
index 7c7d628..2ccb99d 100644
--- a/drivers/pinctrl/stm32/pinctrl-stm32mp157.c
+++ b/drivers/pinctrl/stm32/pinctrl-stm32mp157.c
@@ -10,77 +10,82 @@
#include "pinctrl-stm32.h"
static const struct stm32_desc_pin stm32mp157_pins[] = {
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(0, "PA0"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOA0"),
STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"),
STM32_FUNCTION(3, "TIM5_CH1"),
STM32_FUNCTION(4, "TIM8_ETR"),
STM32_FUNCTION(5, "TIM15_BKIN"),
- STM32_FUNCTION(8, "USART2_CTS_NSS USART_BOOT2_CTS_NSS"),
+ STM32_FUNCTION(8, "USART2_CTS USART2_NSS"),
STM32_FUNCTION(9, "UART4_TX"),
STM32_FUNCTION(10, "SDMMC2_CMD"),
STM32_FUNCTION(11, "SAI2_SD_B"),
- STM32_FUNCTION(12, "ETH_GMII_CRS ETH_MII_CRS"),
+ STM32_FUNCTION(12, "ETH1_GMII_CRS ETH1_MII_CRS"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(1, "PA1"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOA1"),
STM32_FUNCTION(1, "ETH_CLK"),
STM32_FUNCTION(2, "TIM2_CH2"),
STM32_FUNCTION(3, "TIM5_CH2"),
STM32_FUNCTION(4, "LPTIM3_OUT"),
STM32_FUNCTION(5, "TIM15_CH1N"),
- STM32_FUNCTION(8, "USART2_RTS USART_BOOT2_RTS"),
+ STM32_FUNCTION(8, "USART2_RTS USART2_DE"),
STM32_FUNCTION(9, "UART4_RX"),
- STM32_FUNCTION(10, "QUADSPI_BK1_IO3 QUADSPI_BOOTBK1_IO3"),
+ STM32_FUNCTION(10, "QUADSPI_BK1_IO3"),
STM32_FUNCTION(11, "SAI2_MCLK_B"),
- STM32_FUNCTION(12, "ETH_GMII_RX_CLK ETH_MII_RX_CLK ETH_RGMII_RX_CLK ETH_RMII_REF_CLK"),
+ STM32_FUNCTION(12, "ETH1_GMII_RX_CLK ETH1_MII_RX_CLK ETH1_RGMII_RX_CLK ETH1_RMII_REF_CLK"),
STM32_FUNCTION(15, "LCD_R2"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(2, "PA2"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOA2"),
STM32_FUNCTION(2, "TIM2_CH3"),
STM32_FUNCTION(3, "TIM5_CH3"),
STM32_FUNCTION(4, "LPTIM4_OUT"),
STM32_FUNCTION(5, "TIM15_CH1"),
- STM32_FUNCTION(8, "USART2_TX USART_BOOT2_TX"),
+ STM32_FUNCTION(8, "USART2_TX"),
STM32_FUNCTION(9, "SAI2_SCK_B"),
- STM32_FUNCTION(11, "SDMMC2_D0DIR SDMMC_BOOT2_D0DIR"),
- STM32_FUNCTION(12, "ETH_MDIO"),
+ STM32_FUNCTION(11, "SDMMC2_D0DIR"),
+ STM32_FUNCTION(12, "ETH1_MDIO"),
STM32_FUNCTION(13, "MDIOS_MDIO"),
STM32_FUNCTION(15, "LCD_R1"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(3, "PA3"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOA3"),
STM32_FUNCTION(2, "TIM2_CH4"),
STM32_FUNCTION(3, "TIM5_CH4"),
STM32_FUNCTION(4, "LPTIM5_OUT"),
STM32_FUNCTION(5, "TIM15_CH2"),
- STM32_FUNCTION(8, "USART2_RX USART_BOOT2_RX"),
+ STM32_FUNCTION(8, "USART2_RX"),
STM32_FUNCTION(10, "LCD_B2"),
- STM32_FUNCTION(12, "ETH_GMII_COL ETH_MII_COL"),
+ STM32_FUNCTION(12, "ETH1_GMII_COL ETH1_MII_COL"),
STM32_FUNCTION(15, "LCD_B5"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(4, "PA4"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOA4"),
STM32_FUNCTION(1, "HDP0"),
STM32_FUNCTION(3, "TIM5_ETR"),
STM32_FUNCTION(5, "SAI4_D2"),
STM32_FUNCTION(6, "SPI1_NSS I2S1_WS"),
STM32_FUNCTION(7, "SPI3_NSS I2S3_WS"),
- STM32_FUNCTION(8, "USART2_CK USART_BOOT2_CK"),
+ STM32_FUNCTION(8, "USART2_CK"),
STM32_FUNCTION(9, "SPI6_NSS"),
STM32_FUNCTION(13, "SAI4_FS_A"),
STM32_FUNCTION(14, "DCMI_HSYNC"),
@@ -88,8 +93,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(5, "PA5"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOA5"),
STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"),
STM32_FUNCTION(4, "TIM8_CH1N"),
@@ -101,8 +107,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(6, "PA6"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOA6"),
STM32_FUNCTION(2, "TIM1_BKIN"),
STM32_FUNCTION(3, "TIM3_CH1"),
@@ -118,8 +125,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(7, "PA7"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOA7"),
STM32_FUNCTION(2, "TIM1_CH1N"),
STM32_FUNCTION(3, "TIM3_CH2"),
@@ -129,13 +137,14 @@
STM32_FUNCTION(9, "SPI6_MOSI"),
STM32_FUNCTION(10, "TIM14_CH1"),
STM32_FUNCTION(11, "QUADSPI_CLK"),
- STM32_FUNCTION(12, "ETH_GMII_RX_DV ETH_MII_RX_DV ETH_RGMII_RX_CTL ETH_RMII_CRS_DV"),
+ STM32_FUNCTION(12, "ETH1_GMII_RX_DV ETH1_MII_RX_DV ETH1_RGMII_RX_CTL ETH1_RMII_CRS_DV"),
STM32_FUNCTION(13, "SAI4_SD_A"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(8, "PA8"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOA8"),
STM32_FUNCTION(1, "MCO1"),
STM32_FUNCTION(2, "TIM1_CH1"),
@@ -143,37 +152,37 @@
STM32_FUNCTION(5, "I2C3_SCL"),
STM32_FUNCTION(6, "SPI3_MOSI I2S3_SDO"),
STM32_FUNCTION(8, "USART1_CK"),
- STM32_FUNCTION(9, "SDMMC2_CKIN SDMMC_BOOT2_CKIN"),
- STM32_FUNCTION(10, "SDMMC2_D4 SDMMC_BOOT2_D4"),
- STM32_FUNCTION(11, "USBO_SOF"),
+ STM32_FUNCTION(9, "SDMMC2_CKIN"),
+ STM32_FUNCTION(10, "SDMMC2_D4"),
+ STM32_FUNCTION(11, "OTG_FS_SOF OTG_HS_SOF"),
STM32_FUNCTION(13, "SAI4_SD_B"),
STM32_FUNCTION(14, "UART7_RX"),
STM32_FUNCTION(15, "LCD_R6"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(9, "PA9"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOA9"),
STM32_FUNCTION(2, "TIM1_CH2"),
STM32_FUNCTION(5, "I2C3_SMBA"),
STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
STM32_FUNCTION(8, "USART1_TX"),
- STM32_FUNCTION(9, "SDMMC2_CDIR SDMMC_BOOT2_CDIR"),
- STM32_FUNCTION(10, "CAN1_RXFD"),
- STM32_FUNCTION(11, "SDMMC2_D5 SDMMC_BOOT2_D5"),
+ STM32_FUNCTION(9, "SDMMC2_CDIR"),
+ STM32_FUNCTION(11, "SDMMC2_D5"),
STM32_FUNCTION(14, "DCMI_D0"),
STM32_FUNCTION(15, "LCD_R5"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(10, "PA10"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOA10"),
STM32_FUNCTION(2, "TIM1_CH3"),
STM32_FUNCTION(6, "SPI3_NSS I2S3_WS"),
STM32_FUNCTION(8, "USART1_RX"),
- STM32_FUNCTION(10, "CAN1_TXFD"),
STM32_FUNCTION(12, "MDIOS_MDIO"),
STM32_FUNCTION(13, "SAI4_FS_B"),
STM32_FUNCTION(14, "DCMI_D1"),
@@ -181,37 +190,39 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(11, "PA11"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOA11"),
STM32_FUNCTION(2, "TIM1_CH4"),
STM32_FUNCTION(3, "I2C6_SCL"),
STM32_FUNCTION(5, "I2C5_SCL"),
STM32_FUNCTION(6, "SPI2_NSS I2S2_WS"),
STM32_FUNCTION(7, "UART4_RX"),
- STM32_FUNCTION(8, "USART1_CTS_NSS"),
- STM32_FUNCTION(10, "CAN1_RX"),
+ STM32_FUNCTION(8, "USART1_CTS USART1_NSS"),
+ STM32_FUNCTION(10, "FDCAN1_RX"),
STM32_FUNCTION(15, "LCD_R4"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(12, "PA12"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOA12"),
STM32_FUNCTION(2, "TIM1_ETR"),
STM32_FUNCTION(3, "I2C6_SDA"),
STM32_FUNCTION(5, "I2C5_SDA"),
- STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
STM32_FUNCTION(7, "UART4_TX"),
- STM32_FUNCTION(8, "USART1_RTS"),
+ STM32_FUNCTION(8, "USART1_RTS USART1_DE"),
STM32_FUNCTION(9, "SAI2_FS_B"),
- STM32_FUNCTION(10, "CAN1_TX"),
+ STM32_FUNCTION(10, "FDCAN1_TX"),
STM32_FUNCTION(15, "LCD_R5"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(13, "PA13"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOA13"),
STM32_FUNCTION(1, "DBTRGO"),
STM32_FUNCTION(2, "DBTRGI"),
@@ -220,8 +231,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(14, "PA14"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOA14"),
STM32_FUNCTION(1, "DBTRGO"),
STM32_FUNCTION(2, "DBTRGI"),
@@ -229,73 +241,79 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(15, "PA15"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOA15"),
STM32_FUNCTION(1, "DBTRGI"),
STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"),
STM32_FUNCTION(3, "SAI4_D2"),
STM32_FUNCTION(4, "SDMMC1_CDIR"),
- STM32_FUNCTION(5, "HDMI_CEC"),
+ STM32_FUNCTION(5, "CEC"),
STM32_FUNCTION(6, "SPI1_NSS I2S1_WS"),
STM32_FUNCTION(7, "SPI3_NSS I2S3_WS"),
STM32_FUNCTION(8, "SPI6_NSS"),
- STM32_FUNCTION(9, "UART4_RTS UART_BOOT4_RTS"),
- STM32_FUNCTION(10, "SDMMC2_D5 SDMMC_BOOT2_D5"),
- STM32_FUNCTION(11, "SDMMC2_CDIR SDMMC_BOOT2_CDIR"),
- STM32_FUNCTION(12, "SDMMC1_D5 SDMMC_BOOT1_D5"),
+ STM32_FUNCTION(9, "UART4_RTS UART4_DE"),
+ STM32_FUNCTION(10, "SDMMC2_D5"),
+ STM32_FUNCTION(11, "SDMMC2_CDIR"),
+ STM32_FUNCTION(12, "SDMMC1_D5"),
STM32_FUNCTION(13, "SAI4_FS_A"),
STM32_FUNCTION(14, "UART7_TX"),
+ STM32_FUNCTION(15, "LCD_R1"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(16, "PB0"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOB0"),
STM32_FUNCTION(2, "TIM1_CH2N"),
STM32_FUNCTION(3, "TIM3_CH3"),
STM32_FUNCTION(4, "TIM8_CH2N"),
- STM32_FUNCTION(7, "DFSDM_CKOUT"),
- STM32_FUNCTION(9, "UART4_CTS UART_BOOT4_CTS"),
+ STM32_FUNCTION(7, "DFSDM1_CKOUT"),
+ STM32_FUNCTION(9, "UART4_CTS"),
STM32_FUNCTION(10, "LCD_R3"),
- STM32_FUNCTION(12, "ETH_GMII_RXD2 ETH_MII_RXD2 ETH_RGMII_RXD2"),
+ STM32_FUNCTION(12, "ETH1_GMII_RXD2 ETH1_MII_RXD2 ETH1_RGMII_RXD2"),
STM32_FUNCTION(13, "MDIOS_MDIO"),
STM32_FUNCTION(15, "LCD_G1"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(17, "PB1"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOB1"),
STM32_FUNCTION(2, "TIM1_CH3N"),
STM32_FUNCTION(3, "TIM3_CH4"),
STM32_FUNCTION(4, "TIM8_CH3N"),
- STM32_FUNCTION(7, "DFSDM_DATA1"),
+ STM32_FUNCTION(7, "DFSDM1_DATIN1"),
STM32_FUNCTION(10, "LCD_R6"),
- STM32_FUNCTION(12, "ETH_GMII_RXD3 ETH_MII_RXD3 ETH_RGMII_RXD3"),
+ STM32_FUNCTION(12, "ETH1_GMII_RXD3 ETH1_MII_RXD3 ETH1_RGMII_RXD3"),
STM32_FUNCTION(13, "MDIOS_MDC"),
STM32_FUNCTION(15, "LCD_G0"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(18, "PB2"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOB2"),
STM32_FUNCTION(1, "TRACED4"),
STM32_FUNCTION(2, "RTC_OUT2"),
STM32_FUNCTION(3, "SAI1_D1"),
- STM32_FUNCTION(4, "DFSDM_CK1"),
+ STM32_FUNCTION(4, "DFSDM1_CKIN1"),
STM32_FUNCTION(5, "USART1_RX"),
STM32_FUNCTION(6, "I2S_CKIN"),
STM32_FUNCTION(7, "SAI1_SD_A"),
STM32_FUNCTION(8, "SPI3_MOSI I2S3_SDO"),
- STM32_FUNCTION(9, "UART4_RX UART_BOOT4_RX"),
+ STM32_FUNCTION(9, "UART4_RX"),
STM32_FUNCTION(10, "QUADSPI_CLK"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(19, "PB3"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOB3"),
STM32_FUNCTION(1, "TRACED9"),
STM32_FUNCTION(2, "TIM2_CH2"),
@@ -303,14 +321,15 @@
STM32_FUNCTION(6, "SPI1_SCK I2S1_CK"),
STM32_FUNCTION(7, "SPI3_SCK I2S3_CK"),
STM32_FUNCTION(9, "SPI6_SCK"),
- STM32_FUNCTION(10, "SDMMC2_D2 SDMMC_BOOT2_D2"),
+ STM32_FUNCTION(10, "SDMMC2_D2"),
STM32_FUNCTION(13, "SAI4_MCLK_A"),
STM32_FUNCTION(14, "UART7_RX"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(20, "PB4"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOB4"),
STM32_FUNCTION(1, "TRACED8"),
STM32_FUNCTION(2, "TIM16_BKIN"),
@@ -320,14 +339,15 @@
STM32_FUNCTION(7, "SPI3_MISO I2S3_SDI"),
STM32_FUNCTION(8, "SPI2_NSS I2S2_WS"),
STM32_FUNCTION(9, "SPI6_MISO"),
- STM32_FUNCTION(10, "SDMMC2_D3 SDMMC_BOOT2_D3"),
+ STM32_FUNCTION(10, "SDMMC2_D3"),
STM32_FUNCTION(13, "SAI4_SCK_A"),
STM32_FUNCTION(14, "UART7_TX"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(21, "PB5"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOB5"),
STM32_FUNCTION(1, "ETH_CLK"),
STM32_FUNCTION(2, "TIM17_BKIN"),
@@ -338,166 +358,175 @@
STM32_FUNCTION(7, "I2C4_SMBA"),
STM32_FUNCTION(8, "SPI3_MOSI I2S3_SDO"),
STM32_FUNCTION(9, "SPI6_MOSI"),
- STM32_FUNCTION(10, "CAN2_RX"),
+ STM32_FUNCTION(10, "FDCAN2_RX"),
STM32_FUNCTION(11, "SAI4_SD_A"),
- STM32_FUNCTION(12, "ETH_PPS_OUT"),
- STM32_FUNCTION(13, "UART5_RX UART_BOOT5_RX"),
+ STM32_FUNCTION(12, "ETH1_PPS_OUT"),
+ STM32_FUNCTION(13, "UART5_RX"),
STM32_FUNCTION(14, "DCMI_D10"),
STM32_FUNCTION(15, "LCD_G7"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(22, "PB6"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOB6"),
STM32_FUNCTION(2, "TIM16_CH1N"),
STM32_FUNCTION(3, "TIM4_CH1"),
STM32_FUNCTION(5, "I2C1_SCL"),
- STM32_FUNCTION(6, "HDMI_CEC"),
+ STM32_FUNCTION(6, "CEC"),
STM32_FUNCTION(7, "I2C4_SCL"),
STM32_FUNCTION(8, "USART1_TX"),
- STM32_FUNCTION(10, "CAN2_TX"),
- STM32_FUNCTION(11, "QUADSPI_BK1_NCS QUADSPI_BOOTBK1_NCS"),
- STM32_FUNCTION(12, "DFSDM_DATA5"),
+ STM32_FUNCTION(10, "FDCAN2_TX"),
+ STM32_FUNCTION(11, "QUADSPI_BK1_NCS"),
+ STM32_FUNCTION(12, "DFSDM1_DATIN5"),
STM32_FUNCTION(13, "UART5_TX"),
STM32_FUNCTION(14, "DCMI_D5"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(23, "PB7"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOB7"),
STM32_FUNCTION(2, "TIM17_CH1N"),
STM32_FUNCTION(3, "TIM4_CH2"),
STM32_FUNCTION(5, "I2C1_SDA"),
STM32_FUNCTION(7, "I2C4_SDA"),
STM32_FUNCTION(8, "USART1_RX"),
- STM32_FUNCTION(10, "CAN2_TXFD"),
- STM32_FUNCTION(11, "SDMMC2_D1 SDMMC_BOOT2_D1"),
- STM32_FUNCTION(12, "DFSDM_CK5"),
+ STM32_FUNCTION(11, "SDMMC2_D1"),
+ STM32_FUNCTION(12, "DFSDM1_CKIN5"),
STM32_FUNCTION(13, "FMC_NL"),
STM32_FUNCTION(14, "DCMI_VSYNC"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(24, "PB8"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOB8"),
STM32_FUNCTION(1, "HDP6"),
STM32_FUNCTION(2, "TIM16_CH1"),
STM32_FUNCTION(3, "TIM4_CH3"),
- STM32_FUNCTION(4, "DFSDM_CK7"),
+ STM32_FUNCTION(4, "DFSDM1_CKIN7"),
STM32_FUNCTION(5, "I2C1_SCL"),
- STM32_FUNCTION(6, "SDMMC1_CKIN SDMMC_BOOT1_CKIN"),
+ STM32_FUNCTION(6, "SDMMC1_CKIN"),
STM32_FUNCTION(7, "I2C4_SCL"),
- STM32_FUNCTION(8, "SDMMC2_CKIN SDMMC_BOOT2_CKIN"),
+ STM32_FUNCTION(8, "SDMMC2_CKIN"),
STM32_FUNCTION(9, "UART4_RX"),
- STM32_FUNCTION(10, "CAN1_RX"),
- STM32_FUNCTION(11, "SDMMC2_D4 SDMMC_BOOT2_D4"),
- STM32_FUNCTION(12, "ETH_GMII_TXD3 ETH_MII_TXD3 ETH_RGMII_TXD3"),
- STM32_FUNCTION(13, "SDMMC1_D4 SDMMC_BOOT1_D4"),
+ STM32_FUNCTION(10, "FDCAN1_RX"),
+ STM32_FUNCTION(11, "SDMMC2_D4"),
+ STM32_FUNCTION(12, "ETH1_GMII_TXD3 ETH1_MII_TXD3 ETH1_RGMII_TXD3"),
+ STM32_FUNCTION(13, "SDMMC1_D4"),
STM32_FUNCTION(14, "DCMI_D6"),
STM32_FUNCTION(15, "LCD_B6"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(25, "PB9"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOB9"),
STM32_FUNCTION(1, "HDP7"),
STM32_FUNCTION(2, "TIM17_CH1"),
STM32_FUNCTION(3, "TIM4_CH4"),
- STM32_FUNCTION(4, "DFSDM_DATA7"),
+ STM32_FUNCTION(4, "DFSDM1_DATIN7"),
STM32_FUNCTION(5, "I2C1_SDA"),
STM32_FUNCTION(6, "SPI2_NSS I2S2_WS"),
STM32_FUNCTION(7, "I2C4_SDA"),
- STM32_FUNCTION(8, "SDMMC2_CDIR SDMMC_BOOT2_CDIR"),
+ STM32_FUNCTION(8, "SDMMC2_CDIR"),
STM32_FUNCTION(9, "UART4_TX"),
- STM32_FUNCTION(10, "CAN1_TX"),
- STM32_FUNCTION(11, "SDMMC2_D5 SDMMC_BOOT2_D5"),
- STM32_FUNCTION(12, "SDMMC1_CDIR SDMMC_BOOT1_CDIR"),
- STM32_FUNCTION(13, "SDMMC1_D5 SDMMC_BOOT1_D5"),
+ STM32_FUNCTION(10, "FDCAN1_TX"),
+ STM32_FUNCTION(11, "SDMMC2_D5"),
+ STM32_FUNCTION(12, "SDMMC1_CDIR"),
+ STM32_FUNCTION(13, "SDMMC1_D5"),
STM32_FUNCTION(14, "DCMI_D7"),
STM32_FUNCTION(15, "LCD_B7"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(26, "PB10"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOB10"),
STM32_FUNCTION(2, "TIM2_CH3"),
STM32_FUNCTION(4, "LPTIM2_IN1"),
STM32_FUNCTION(5, "I2C2_SCL"),
STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
- STM32_FUNCTION(7, "DFSDM_DATA7"),
- STM32_FUNCTION(8, "USART3_TX USART_BOOT3_TX"),
+ STM32_FUNCTION(7, "DFSDM1_DATIN7"),
+ STM32_FUNCTION(8, "USART3_TX"),
STM32_FUNCTION(10, "QUADSPI_BK1_NCS"),
- STM32_FUNCTION(12, "ETH_GMII_RX_ER ETH_MII_RX_ER"),
+ STM32_FUNCTION(12, "ETH1_GMII_RX_ER ETH1_MII_RX_ER"),
STM32_FUNCTION(15, "LCD_G4"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(27, "PB11"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOB11"),
STM32_FUNCTION(2, "TIM2_CH4"),
STM32_FUNCTION(4, "LPTIM2_ETR"),
STM32_FUNCTION(5, "I2C2_SDA"),
- STM32_FUNCTION(7, "DFSDM_CK7"),
+ STM32_FUNCTION(7, "DFSDM1_CKIN7"),
STM32_FUNCTION(8, "USART3_RX"),
- STM32_FUNCTION(12, "ETH_GMII_TX_EN ETH_MII_TX_EN ETH_RGMII_TX_CTL ETH_RMII_TX_EN"),
+ STM32_FUNCTION(12, "ETH1_GMII_TX_EN ETH1_MII_TX_EN ETH1_RGMII_TX_CTL ETH1_RMII_TX_EN"),
STM32_FUNCTION(14, "DSI_TE"),
STM32_FUNCTION(15, "LCD_G5"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(28, "PB12"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOB12"),
STM32_FUNCTION(2, "TIM1_BKIN"),
STM32_FUNCTION(3, "I2C6_SMBA"),
STM32_FUNCTION(5, "I2C2_SMBA"),
STM32_FUNCTION(6, "SPI2_NSS I2S2_WS"),
- STM32_FUNCTION(7, "DFSDM_DATA1"),
- STM32_FUNCTION(8, "USART3_CK USART_BOOT3_CK"),
- STM32_FUNCTION(9, "USART3_RX USART_BOOT3_RX"),
- STM32_FUNCTION(10, "CAN2_RX"),
- STM32_FUNCTION(12, "ETH_GMII_TXD0 ETH_MII_TXD0 ETH_RGMII_TXD0 ETH_RMII_TXD0"),
+ STM32_FUNCTION(7, "DFSDM1_DATIN1"),
+ STM32_FUNCTION(8, "USART3_CK"),
+ STM32_FUNCTION(9, "USART3_RX"),
+ STM32_FUNCTION(10, "FDCAN2_RX"),
+ STM32_FUNCTION(12, "ETH1_GMII_TXD0 ETH1_MII_TXD0 ETH1_RGMII_TXD0 ETH1_RMII_TXD0"),
STM32_FUNCTION(15, "UART5_RX"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(29, "PB13"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOB13"),
STM32_FUNCTION(2, "TIM1_CH1N"),
- STM32_FUNCTION(4, "DFSDM_CKOUT"),
+ STM32_FUNCTION(4, "DFSDM1_CKOUT"),
STM32_FUNCTION(5, "LPTIM2_OUT"),
STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
- STM32_FUNCTION(7, "DFSDM_CK1"),
- STM32_FUNCTION(8, "USART3_CTS_NSS USART_BOOT3_CTS_NSS"),
- STM32_FUNCTION(10, "CAN2_TX"),
- STM32_FUNCTION(12, "ETH_GMII_TXD1 ETH_MII_TXD1 ETH_RGMII_TXD1 ETH_RMII_TXD1"),
- STM32_FUNCTION(15, "UART5_TX UART_BOOT5_TX"),
+ STM32_FUNCTION(7, "DFSDM1_CKIN1"),
+ STM32_FUNCTION(8, "USART3_CTS USART3_NSS"),
+ STM32_FUNCTION(10, "FDCAN2_TX"),
+ STM32_FUNCTION(12, "ETH1_GMII_TXD1 ETH1_MII_TXD1 ETH1_RGMII_TXD1 ETH1_RMII_TXD1"),
+ STM32_FUNCTION(15, "UART5_TX"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(30, "PB14"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOB14"),
STM32_FUNCTION(2, "TIM1_CH2N"),
STM32_FUNCTION(3, "TIM12_CH1"),
STM32_FUNCTION(4, "TIM8_CH2N"),
STM32_FUNCTION(5, "USART1_TX"),
STM32_FUNCTION(6, "SPI2_MISO I2S2_SDI"),
- STM32_FUNCTION(7, "DFSDM_DATA2"),
- STM32_FUNCTION(8, "USART3_RTS USART_BOOT3_RTS"),
- STM32_FUNCTION(10, "SDMMC2_D0 SDMMC_BOOT2_D0"),
+ STM32_FUNCTION(7, "DFSDM1_DATIN2"),
+ STM32_FUNCTION(8, "USART3_RTS USART3_DE"),
+ STM32_FUNCTION(10, "SDMMC2_D0"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(31, "PB15"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOB15"),
STM32_FUNCTION(1, "RTC_REFIN"),
STM32_FUNCTION(2, "TIM1_CH3N"),
@@ -505,523 +534,557 @@
STM32_FUNCTION(4, "TIM8_CH3N"),
STM32_FUNCTION(5, "USART1_RX"),
STM32_FUNCTION(6, "SPI2_MOSI I2S2_SDO"),
- STM32_FUNCTION(7, "DFSDM_CK2"),
- STM32_FUNCTION(10, "SDMMC2_D1 SDMMC_BOOT2_D1"),
+ STM32_FUNCTION(7, "DFSDM1_CKIN2"),
+ STM32_FUNCTION(10, "SDMMC2_D1"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(32, "PC0"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOC0"),
- STM32_FUNCTION(4, "DFSDM_CK0"),
+ STM32_FUNCTION(4, "DFSDM1_CKIN0"),
STM32_FUNCTION(5, "LPTIM2_IN2"),
- STM32_FUNCTION(7, "DFSDM_DATA4"),
+ STM32_FUNCTION(7, "DFSDM1_DATIN4"),
STM32_FUNCTION(9, "SAI2_FS_B"),
- STM32_FUNCTION(11, "QUADSPI_BK2_NCS QUADSPI_BOOTBK2_NCS"),
+ STM32_FUNCTION(11, "QUADSPI_BK2_NCS"),
STM32_FUNCTION(15, "LCD_R5"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(33, "PC1"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOC1"),
STM32_FUNCTION(1, "TRACED0"),
STM32_FUNCTION(3, "SAI1_D1"),
- STM32_FUNCTION(4, "DFSDM_DATA0"),
- STM32_FUNCTION(5, "DFSDM_CK4"),
+ STM32_FUNCTION(4, "DFSDM1_DATIN0"),
+ STM32_FUNCTION(5, "DFSDM1_CKIN4"),
STM32_FUNCTION(6, "SPI2_MOSI I2S2_SDO"),
STM32_FUNCTION(7, "SAI1_SD_A"),
STM32_FUNCTION(10, "SDMMC2_CK"),
- STM32_FUNCTION(12, "ETH_MDC"),
+ STM32_FUNCTION(12, "ETH1_MDC"),
STM32_FUNCTION(13, "MDIOS_MDC"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(34, "PC2"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOC2"),
- STM32_FUNCTION(4, "DFSDM_CK1"),
+ STM32_FUNCTION(4, "DFSDM1_CKIN1"),
STM32_FUNCTION(6, "SPI2_MISO I2S2_SDI"),
- STM32_FUNCTION(7, "DFSDM_CKOUT"),
- STM32_FUNCTION(12, "ETH_GMII_TXD2 ETH_MII_TXD2 ETH_RGMII_TXD2"),
+ STM32_FUNCTION(7, "DFSDM1_CKOUT"),
+ STM32_FUNCTION(12, "ETH1_GMII_TXD2 ETH1_MII_TXD2 ETH1_RGMII_TXD2"),
+ STM32_FUNCTION(14, "DCMI_PIXCLK"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(35, "PC3"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOC3"),
STM32_FUNCTION(1, "TRACECLK"),
- STM32_FUNCTION(4, "DFSDM_DATA1"),
+ STM32_FUNCTION(4, "DFSDM1_DATIN1"),
STM32_FUNCTION(6, "SPI2_MOSI I2S2_SDO"),
- STM32_FUNCTION(12, "ETH_GMII_TX_CLK ETH_MII_TX_CLK"),
+ STM32_FUNCTION(12, "ETH1_GMII_TX_CLK ETH1_MII_TX_CLK"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(36, "PC4"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOC4"),
- STM32_FUNCTION(4, "DFSDM_CK2"),
+ STM32_FUNCTION(4, "DFSDM1_CKIN2"),
STM32_FUNCTION(6, "I2S1_MCK"),
- STM32_FUNCTION(10, "SPDIF_IN2"),
- STM32_FUNCTION(12, "ETH_GMII_RXD0 ETH_MII_RXD0 ETH_RGMII_RXD0 ETH_RMII_RXD0"),
+ STM32_FUNCTION(10, "SPDIFRX_IN2"),
+ STM32_FUNCTION(12, "ETH1_GMII_RXD0 ETH1_MII_RXD0 ETH1_RGMII_RXD0 ETH1_RMII_RXD0"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(37, "PC5"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOC5"),
STM32_FUNCTION(3, "SAI1_D3"),
- STM32_FUNCTION(4, "DFSDM_DATA2"),
+ STM32_FUNCTION(4, "DFSDM1_DATIN2"),
STM32_FUNCTION(5, "SAI4_D4"),
STM32_FUNCTION(7, "SAI1_D4"),
- STM32_FUNCTION(10, "SPDIF_IN3"),
- STM32_FUNCTION(12, "ETH_GMII_RXD1 ETH_MII_RXD1 ETH_RGMII_RXD1 ETH_RMII_RXD1"),
+ STM32_FUNCTION(10, "SPDIFRX_IN3"),
+ STM32_FUNCTION(12, "ETH1_GMII_RXD1 ETH1_MII_RXD1 ETH1_RGMII_RXD1 ETH1_RMII_RXD1"),
STM32_FUNCTION(13, "SAI4_D3"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(38, "PC6"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOC6"),
STM32_FUNCTION(1, "HDP1"),
STM32_FUNCTION(3, "TIM3_CH1"),
STM32_FUNCTION(4, "TIM8_CH1"),
- STM32_FUNCTION(5, "DFSDM_CK3"),
+ STM32_FUNCTION(5, "DFSDM1_CKIN3"),
STM32_FUNCTION(6, "I2S2_MCK"),
- STM32_FUNCTION(8, "USART6_TX USART_BOOT6_TX"),
- STM32_FUNCTION(9, "SDMMC1_D0DIR SDMMC_BOOT1_D0DIR"),
- STM32_FUNCTION(10, "SDMMC2_D0DIR SDMMC_BOOT2_D0DIR"),
- STM32_FUNCTION(11, "SDMMC2_D6 SDMMC_BOOT2_D6"),
+ STM32_FUNCTION(8, "USART6_TX"),
+ STM32_FUNCTION(9, "SDMMC1_D0DIR"),
+ STM32_FUNCTION(10, "SDMMC2_D0DIR"),
+ STM32_FUNCTION(11, "SDMMC2_D6"),
STM32_FUNCTION(12, "DSI_TE"),
- STM32_FUNCTION(13, "SDMMC1_D6 SDMMC_BOOT1_D6"),
+ STM32_FUNCTION(13, "SDMMC1_D6"),
STM32_FUNCTION(14, "DCMI_D0"),
STM32_FUNCTION(15, "LCD_HSYNC"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(39, "PC7"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOC7"),
STM32_FUNCTION(1, "HDP4"),
STM32_FUNCTION(3, "TIM3_CH2"),
STM32_FUNCTION(4, "TIM8_CH2"),
- STM32_FUNCTION(5, "DFSDM_DATA3"),
+ STM32_FUNCTION(5, "DFSDM1_DATIN3"),
STM32_FUNCTION(7, "I2S3_MCK"),
- STM32_FUNCTION(8, "USART6_RX USART_BOOT6_RX"),
- STM32_FUNCTION(9, "SDMMC1_D123DIR SDMMC_BOOT1_D123DIR"),
- STM32_FUNCTION(10, "SDMMC2_D123DIR SDMMC_BOOT2_D123DIR"),
- STM32_FUNCTION(11, "SDMMC2_D7 SDMMC_BOOT2_D7"),
- STM32_FUNCTION(13, "SDMMC1_D7 SDMMC_BOOT1_D7"),
+ STM32_FUNCTION(8, "USART6_RX"),
+ STM32_FUNCTION(9, "SDMMC1_D123DIR"),
+ STM32_FUNCTION(10, "SDMMC2_D123DIR"),
+ STM32_FUNCTION(11, "SDMMC2_D7"),
+ STM32_FUNCTION(13, "SDMMC1_D7"),
STM32_FUNCTION(14, "DCMI_D1"),
STM32_FUNCTION(15, "LCD_G6"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(40, "PC8"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOC8"),
STM32_FUNCTION(1, "TRACED0"),
STM32_FUNCTION(3, "TIM3_CH3"),
STM32_FUNCTION(4, "TIM8_CH3"),
STM32_FUNCTION(7, "UART4_TX"),
- STM32_FUNCTION(8, "USART6_CK USART_BOOT6_CK"),
- STM32_FUNCTION(9, "UART5_RTS UART_BOOT5_RTS"),
- STM32_FUNCTION(13, "SDMMC1_D0 SDMMC_BOOT1_D0"),
+ STM32_FUNCTION(8, "USART6_CK"),
+ STM32_FUNCTION(9, "UART5_RTS UART5_DE"),
+ STM32_FUNCTION(13, "SDMMC1_D0"),
STM32_FUNCTION(14, "DCMI_D2"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(41, "PC9"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOC9"),
STM32_FUNCTION(1, "TRACED1"),
STM32_FUNCTION(3, "TIM3_CH4"),
STM32_FUNCTION(4, "TIM8_CH4"),
STM32_FUNCTION(5, "I2C3_SDA"),
STM32_FUNCTION(6, "I2S_CKIN"),
- STM32_FUNCTION(9, "UART5_CTS UART_BOOT5_CTS"),
+ STM32_FUNCTION(9, "UART5_CTS"),
STM32_FUNCTION(10, "QUADSPI_BK1_IO0"),
- STM32_FUNCTION(13, "SDMMC1_D1 SDMMC_BOOT1_D1"),
+ STM32_FUNCTION(13, "SDMMC1_D1"),
STM32_FUNCTION(14, "DCMI_D3"),
STM32_FUNCTION(15, "LCD_B2"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(42, "PC10"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOC10"),
STM32_FUNCTION(1, "TRACED2"),
- STM32_FUNCTION(4, "DFSDM_CK5"),
+ STM32_FUNCTION(4, "DFSDM1_CKIN5"),
STM32_FUNCTION(7, "SPI3_SCK I2S3_CK"),
STM32_FUNCTION(8, "USART3_TX"),
STM32_FUNCTION(9, "UART4_TX"),
STM32_FUNCTION(10, "QUADSPI_BK1_IO1"),
STM32_FUNCTION(11, "SAI4_MCLK_B"),
- STM32_FUNCTION(13, "SDMMC1_D2 SDMMC_BOOT1_D2"),
+ STM32_FUNCTION(13, "SDMMC1_D2"),
STM32_FUNCTION(14, "DCMI_D8"),
STM32_FUNCTION(15, "LCD_R2"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(43, "PC11"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOC11"),
STM32_FUNCTION(1, "TRACED3"),
- STM32_FUNCTION(4, "DFSDM_DATA5"),
+ STM32_FUNCTION(4, "DFSDM1_DATIN5"),
STM32_FUNCTION(7, "SPI3_MISO I2S3_SDI"),
STM32_FUNCTION(8, "USART3_RX"),
STM32_FUNCTION(9, "UART4_RX"),
- STM32_FUNCTION(10, "QUADSPI_BK2_NCS QUADSPI_BOOTBK2_NCS"),
+ STM32_FUNCTION(10, "QUADSPI_BK2_NCS"),
STM32_FUNCTION(11, "SAI4_SCK_B"),
- STM32_FUNCTION(13, "SDMMC1_D3 SDMMC_BOOT1_D3"),
+ STM32_FUNCTION(13, "SDMMC1_D3"),
STM32_FUNCTION(14, "DCMI_D4"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(44, "PC12"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOC12"),
STM32_FUNCTION(1, "TRACECLK"),
STM32_FUNCTION(2, "MCO2"),
STM32_FUNCTION(3, "SAI4_D3"),
STM32_FUNCTION(7, "SPI3_MOSI I2S3_SDO"),
- STM32_FUNCTION(8, "USART3_CK USART_BOOT3_CK"),
+ STM32_FUNCTION(8, "USART3_CK"),
STM32_FUNCTION(9, "UART5_TX"),
STM32_FUNCTION(11, "SAI4_SD_B"),
- STM32_FUNCTION(13, "SDMMC1_CK SDMMC_BOOT1_CK"),
+ STM32_FUNCTION(13, "SDMMC1_CK"),
STM32_FUNCTION(14, "DCMI_D9"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(45, "PC13"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOC13"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(46, "PC14"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOC14"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(47, "PC15"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOC15"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(48, "PD0"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOD0"),
STM32_FUNCTION(3, "I2C6_SDA"),
- STM32_FUNCTION(4, "DFSDM_CK6"),
+ STM32_FUNCTION(4, "DFSDM1_CKIN6"),
STM32_FUNCTION(5, "I2C5_SDA"),
STM32_FUNCTION(7, "SAI3_SCK_A"),
STM32_FUNCTION(9, "UART4_RX"),
- STM32_FUNCTION(10, "CAN1_RX"),
+ STM32_FUNCTION(10, "FDCAN1_RX"),
STM32_FUNCTION(11, "SDMMC3_CMD"),
- STM32_FUNCTION(12, "DFSDM_DATA7"),
- STM32_FUNCTION(13, "FMC_D2"),
+ STM32_FUNCTION(12, "DFSDM1_DATIN7"),
+ STM32_FUNCTION(13, "FMC_D2 FMC_DA2"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(49, "PD1"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOD1"),
STM32_FUNCTION(3, "I2C6_SCL"),
- STM32_FUNCTION(4, "DFSDM_DATA6"),
+ STM32_FUNCTION(4, "DFSDM1_DATIN6"),
STM32_FUNCTION(5, "I2C5_SCL"),
STM32_FUNCTION(7, "SAI3_SD_A"),
STM32_FUNCTION(9, "UART4_TX"),
- STM32_FUNCTION(10, "CAN1_TX"),
+ STM32_FUNCTION(10, "FDCAN1_TX"),
STM32_FUNCTION(11, "SDMMC3_D0"),
- STM32_FUNCTION(12, "DFSDM_CK7"),
- STM32_FUNCTION(13, "FMC_D3"),
+ STM32_FUNCTION(12, "DFSDM1_CKIN7"),
+ STM32_FUNCTION(13, "FMC_D3 FMC_DA3"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(50, "PD2"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOD2"),
STM32_FUNCTION(3, "TIM3_ETR"),
STM32_FUNCTION(5, "I2C5_SMBA"),
STM32_FUNCTION(7, "UART4_RX"),
STM32_FUNCTION(9, "UART5_RX"),
- STM32_FUNCTION(13, "SDMMC1_CMD SDMMC_BOOT1_CMD"),
+ STM32_FUNCTION(13, "SDMMC1_CMD"),
STM32_FUNCTION(14, "DCMI_D11"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(51, "PD3"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOD3"),
STM32_FUNCTION(1, "HDP5"),
- STM32_FUNCTION(4, "DFSDM_CKOUT"),
+ STM32_FUNCTION(4, "DFSDM1_CKOUT"),
STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
- STM32_FUNCTION(7, "DFSDM_DATA0"),
- STM32_FUNCTION(8, "USART2_CTS_NSS USART_BOOT2_CTS_NSS"),
- STM32_FUNCTION(9, "SDMMC1_D123DIR SDMMC_BOOT1_D123DIR"),
- STM32_FUNCTION(10, "SDMMC2_D7 SDMMC_BOOT2_D7"),
- STM32_FUNCTION(11, "SDMMC2_D123DIR SDMMC_BOOT2_D123DIR"),
- STM32_FUNCTION(12, "SDMMC1_D7 SDMMC_BOOT1_D7"),
+ STM32_FUNCTION(7, "DFSDM1_DATIN0"),
+ STM32_FUNCTION(8, "USART2_CTS USART2_NSS"),
+ STM32_FUNCTION(9, "SDMMC1_D123DIR"),
+ STM32_FUNCTION(10, "SDMMC2_D7"),
+ STM32_FUNCTION(11, "SDMMC2_D123DIR"),
+ STM32_FUNCTION(12, "SDMMC1_D7"),
STM32_FUNCTION(13, "FMC_CLK"),
STM32_FUNCTION(14, "DCMI_D5"),
STM32_FUNCTION(15, "LCD_G7"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(52, "PD4"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOD4"),
STM32_FUNCTION(7, "SAI3_FS_A"),
- STM32_FUNCTION(8, "USART2_RTS USART_BOOT2_RTS"),
- STM32_FUNCTION(10, "CAN1_RXFD"),
+ STM32_FUNCTION(8, "USART2_RTS USART2_DE"),
STM32_FUNCTION(11, "SDMMC3_D1"),
- STM32_FUNCTION(12, "DFSDM_CK0"),
+ STM32_FUNCTION(12, "DFSDM1_CKIN0"),
STM32_FUNCTION(13, "FMC_NOE"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(53, "PD5"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOD5"),
STM32_FUNCTION(8, "USART2_TX"),
- STM32_FUNCTION(10, "CAN1_TXFD"),
STM32_FUNCTION(11, "SDMMC3_D2"),
STM32_FUNCTION(13, "FMC_NWE"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(54, "PD6"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOD6"),
STM32_FUNCTION(2, "TIM16_CH1N"),
STM32_FUNCTION(3, "SAI1_D1"),
- STM32_FUNCTION(4, "DFSDM_CK4"),
- STM32_FUNCTION(5, "DFSDM_DATA1"),
+ STM32_FUNCTION(4, "DFSDM1_CKIN4"),
+ STM32_FUNCTION(5, "DFSDM1_DATIN1"),
STM32_FUNCTION(6, "SPI3_MOSI I2S3_SDO"),
STM32_FUNCTION(7, "SAI1_SD_A"),
STM32_FUNCTION(8, "USART2_RX"),
- STM32_FUNCTION(10, "CAN2_RXFD"),
- STM32_FUNCTION(11, "FMC_INT"),
STM32_FUNCTION(13, "FMC_NWAIT"),
STM32_FUNCTION(14, "DCMI_D10"),
STM32_FUNCTION(15, "LCD_B2"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(55, "PD7"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOD7"),
STM32_FUNCTION(1, "TRACED6"),
- STM32_FUNCTION(4, "DFSDM_DATA4"),
+ STM32_FUNCTION(4, "DFSDM1_DATIN4"),
STM32_FUNCTION(5, "I2C2_SCL"),
- STM32_FUNCTION(7, "DFSDM_CK1"),
- STM32_FUNCTION(8, "USART2_CK USART_BOOT2_CK"),
- STM32_FUNCTION(10, "SPDIF_IN0"),
+ STM32_FUNCTION(7, "DFSDM1_CKIN1"),
+ STM32_FUNCTION(8, "USART2_CK"),
+ STM32_FUNCTION(10, "SPDIFRX_IN0"),
STM32_FUNCTION(11, "SDMMC3_D3"),
STM32_FUNCTION(13, "FMC_NE1"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(56, "PD8"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOD8"),
- STM32_FUNCTION(4, "DFSDM_CK3"),
+ STM32_FUNCTION(4, "DFSDM1_CKIN3"),
STM32_FUNCTION(7, "SAI3_SCK_B"),
STM32_FUNCTION(8, "USART3_TX"),
- STM32_FUNCTION(10, "SPDIF_IN1"),
- STM32_FUNCTION(13, "FMC_D13"),
+ STM32_FUNCTION(10, "SPDIFRX_IN1"),
+ STM32_FUNCTION(13, "FMC_D13 FMC_DA13"),
STM32_FUNCTION(15, "LCD_B7"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(57, "PD9"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOD9"),
- STM32_FUNCTION(4, "DFSDM_DATA3"),
+ STM32_FUNCTION(4, "DFSDM1_DATIN3"),
STM32_FUNCTION(7, "SAI3_SD_B"),
STM32_FUNCTION(8, "USART3_RX"),
- STM32_FUNCTION(10, "CAN2_RXFD"),
- STM32_FUNCTION(13, "FMC_D14"),
+ STM32_FUNCTION(13, "FMC_D14 FMC_DA14"),
+ STM32_FUNCTION(14, "DCMI_HSYNC"),
STM32_FUNCTION(15, "LCD_B0"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(58, "PD10"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOD10"),
STM32_FUNCTION(1, "RTC_REFIN"),
STM32_FUNCTION(2, "TIM16_BKIN"),
- STM32_FUNCTION(4, "DFSDM_CKOUT"),
+ STM32_FUNCTION(4, "DFSDM1_CKOUT"),
STM32_FUNCTION(5, "I2C5_SMBA"),
STM32_FUNCTION(6, "SPI3_MISO I2S3_SDI"),
STM32_FUNCTION(7, "SAI3_FS_B"),
- STM32_FUNCTION(8, "USART3_CK USART_BOOT3_CK"),
- STM32_FUNCTION(10, "CAN2_TXFD"),
- STM32_FUNCTION(13, "FMC_D15"),
+ STM32_FUNCTION(8, "USART3_CK"),
+ STM32_FUNCTION(13, "FMC_D15 FMC_DA15"),
STM32_FUNCTION(15, "LCD_B3"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(59, "PD11"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOD11"),
STM32_FUNCTION(4, "LPTIM2_IN2"),
STM32_FUNCTION(5, "I2C4_SMBA"),
STM32_FUNCTION(6, "I2C1_SMBA"),
- STM32_FUNCTION(8, "USART3_CTS_NSS USART_BOOT3_CTS_NSS"),
+ STM32_FUNCTION(8, "USART3_CTS USART3_NSS"),
STM32_FUNCTION(10, "QUADSPI_BK1_IO0"),
STM32_FUNCTION(11, "SAI2_SD_A"),
- STM32_FUNCTION(13, "FMC_A16 FMC_CLE"),
+ STM32_FUNCTION(13, "FMC_CLE FMC_A16"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(60, "PD12"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOD12"),
STM32_FUNCTION(2, "LPTIM1_IN1"),
STM32_FUNCTION(3, "TIM4_CH1"),
STM32_FUNCTION(4, "LPTIM2_IN1"),
STM32_FUNCTION(5, "I2C4_SCL"),
STM32_FUNCTION(6, "I2C1_SCL"),
- STM32_FUNCTION(8, "USART3_RTS USART_BOOT3_RTS"),
+ STM32_FUNCTION(8, "USART3_RTS USART3_DE"),
STM32_FUNCTION(10, "QUADSPI_BK1_IO1"),
STM32_FUNCTION(11, "SAI2_FS_A"),
- STM32_FUNCTION(13, "FMC_A17 FMC_ALE"),
+ STM32_FUNCTION(13, "FMC_ALE FMC_A17"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(61, "PD13"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOD13"),
STM32_FUNCTION(2, "LPTIM1_OUT"),
STM32_FUNCTION(3, "TIM4_CH2"),
STM32_FUNCTION(5, "I2C4_SDA"),
STM32_FUNCTION(6, "I2C1_SDA"),
STM32_FUNCTION(7, "I2S3_MCK"),
- STM32_FUNCTION(10, "QUADSPI_BK1_IO3 QUADSPI_BOOTBK1_IO3"),
+ STM32_FUNCTION(10, "QUADSPI_BK1_IO3"),
STM32_FUNCTION(11, "SAI2_SCK_A"),
STM32_FUNCTION(13, "FMC_A18"),
STM32_FUNCTION(14, "DSI_TE"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(62, "PD14"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOD14"),
STM32_FUNCTION(3, "TIM4_CH3"),
STM32_FUNCTION(7, "SAI3_MCLK_B"),
- STM32_FUNCTION(9, "UART8_CTS UART_BOOT8_CTS"),
- STM32_FUNCTION(13, "FMC_D0"),
+ STM32_FUNCTION(9, "UART8_CTS"),
+ STM32_FUNCTION(13, "FMC_D0 FMC_DA0"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(63, "PD15"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOD15"),
STM32_FUNCTION(3, "TIM4_CH4"),
STM32_FUNCTION(7, "SAI3_MCLK_A"),
- STM32_FUNCTION(9, "UART8_CTS UART_BOOT8_CTS"),
- STM32_FUNCTION(13, "FMC_D1"),
+ STM32_FUNCTION(9, "UART8_CTS"),
+ STM32_FUNCTION(13, "FMC_D1 FMC_DA1"),
+ STM32_FUNCTION(15, "LCD_R1"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(64, "PE0"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOE0"),
STM32_FUNCTION(2, "LPTIM1_ETR"),
STM32_FUNCTION(3, "TIM4_ETR"),
STM32_FUNCTION(5, "LPTIM2_ETR"),
STM32_FUNCTION(6, "SPI3_SCK I2S3_CK"),
STM32_FUNCTION(7, "SAI4_MCLK_B"),
- STM32_FUNCTION(9, "UART8_RX UART_BOOT8_RX"),
- STM32_FUNCTION(10, "CAN1_RXFD"),
+ STM32_FUNCTION(9, "UART8_RX"),
STM32_FUNCTION(11, "SAI2_MCLK_A"),
STM32_FUNCTION(13, "FMC_NBL0"),
STM32_FUNCTION(14, "DCMI_D2"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(65, "PE1"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOE1"),
STM32_FUNCTION(2, "LPTIM1_IN2"),
STM32_FUNCTION(6, "I2S2_MCK"),
STM32_FUNCTION(7, "SAI3_SD_B"),
- STM32_FUNCTION(9, "UART8_TX UART_BOOT8_TX"),
- STM32_FUNCTION(10, "CAN1_TXFD"),
+ STM32_FUNCTION(9, "UART8_TX"),
STM32_FUNCTION(13, "FMC_NBL1"),
STM32_FUNCTION(14, "DCMI_D3"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(66, "PE2"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOE2"),
STM32_FUNCTION(1, "TRACECLK"),
STM32_FUNCTION(3, "SAI1_CK1"),
STM32_FUNCTION(5, "I2C4_SCL"),
STM32_FUNCTION(6, "SPI4_SCK"),
STM32_FUNCTION(7, "SAI1_MCLK_A"),
- STM32_FUNCTION(10, "QUADSPI_BK1_IO2 QUADSPI_BOOTBK1_IO2"),
- STM32_FUNCTION(12, "ETH_GMII_TXD3 ETH_MII_TXD3 ETH_RGMII_TXD3"),
+ STM32_FUNCTION(10, "QUADSPI_BK1_IO2"),
+ STM32_FUNCTION(12, "ETH1_GMII_TXD3 ETH1_MII_TXD3 ETH1_RGMII_TXD3"),
STM32_FUNCTION(13, "FMC_A23"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(67, "PE3"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOE3"),
STM32_FUNCTION(1, "TRACED0"),
STM32_FUNCTION(5, "TIM15_BKIN"),
STM32_FUNCTION(7, "SAI1_SD_B"),
- STM32_FUNCTION(10, "SDMMC2_CK SDMMC_BOOT2_CK"),
+ STM32_FUNCTION(10, "SDMMC2_CK"),
STM32_FUNCTION(13, "FMC_A19"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(68, "PE4"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOE4"),
STM32_FUNCTION(1, "TRACED1"),
STM32_FUNCTION(3, "SAI1_D2"),
- STM32_FUNCTION(4, "DFSDM_DATA3"),
+ STM32_FUNCTION(4, "DFSDM1_DATIN3"),
STM32_FUNCTION(5, "TIM15_CH1N"),
STM32_FUNCTION(6, "SPI4_NSS"),
STM32_FUNCTION(7, "SAI1_FS_A"),
- STM32_FUNCTION(8, "SDMMC2_CKIN SDMMC_BOOT2_CKIN"),
- STM32_FUNCTION(9, "SDMMC1_CKIN SDMMC_BOOT1_CKIN"),
- STM32_FUNCTION(10, "SDMMC2_D4 SDMMC_BOOT2_D4"),
- STM32_FUNCTION(12, "SDMMC1_D4 SDMMC_BOOT1_D4"),
+ STM32_FUNCTION(8, "SDMMC2_CKIN"),
+ STM32_FUNCTION(9, "SDMMC1_CKIN"),
+ STM32_FUNCTION(10, "SDMMC2_D4"),
+ STM32_FUNCTION(12, "SDMMC1_D4"),
STM32_FUNCTION(13, "FMC_A20"),
STM32_FUNCTION(14, "DCMI_D4"),
STM32_FUNCTION(15, "LCD_B0"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(69, "PE5"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOE5"),
STM32_FUNCTION(1, "TRACED3"),
STM32_FUNCTION(3, "SAI1_CK2"),
- STM32_FUNCTION(4, "DFSDM_CK3"),
+ STM32_FUNCTION(4, "DFSDM1_CKIN3"),
STM32_FUNCTION(5, "TIM15_CH1"),
STM32_FUNCTION(6, "SPI4_MISO"),
STM32_FUNCTION(7, "SAI1_SCK_A"),
- STM32_FUNCTION(8, "SDMMC2_D0DIR SDMMC_BOOT2_D0DIR"),
- STM32_FUNCTION(9, "SDMMC1_D0DIR SDMMC_BOOT1_D0DIR"),
- STM32_FUNCTION(10, "SDMMC2_D6 SDMMC_BOOT2_D6"),
- STM32_FUNCTION(12, "SDMMC1_D6 SDMMC_BOOT1_D6"),
+ STM32_FUNCTION(8, "SDMMC2_D0DIR"),
+ STM32_FUNCTION(9, "SDMMC1_D0DIR"),
+ STM32_FUNCTION(10, "SDMMC2_D6"),
+ STM32_FUNCTION(12, "SDMMC1_D6"),
STM32_FUNCTION(13, "FMC_A21"),
STM32_FUNCTION(14, "DCMI_D6"),
STM32_FUNCTION(15, "LCD_G0"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(70, "PE6"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOE6"),
STM32_FUNCTION(1, "TRACED2"),
STM32_FUNCTION(2, "TIM1_BKIN2"),
@@ -1030,7 +1093,7 @@
STM32_FUNCTION(6, "SPI4_MOSI"),
STM32_FUNCTION(7, "SAI1_SD_A"),
STM32_FUNCTION(8, "SDMMC2_D0"),
- STM32_FUNCTION(9, "SDMMC1_D2 SDMMC_BOOT1_D2"),
+ STM32_FUNCTION(9, "SDMMC1_D2"),
STM32_FUNCTION(11, "SAI2_MCLK_B"),
STM32_FUNCTION(13, "FMC_A22"),
STM32_FUNCTION(14, "DCMI_D7"),
@@ -1038,119 +1101,132 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(71, "PE7"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOE7"),
STM32_FUNCTION(2, "TIM1_ETR"),
STM32_FUNCTION(3, "TIM3_ETR"),
- STM32_FUNCTION(4, "DFSDM_DATA2"),
+ STM32_FUNCTION(4, "DFSDM1_DATIN2"),
STM32_FUNCTION(8, "UART7_RX"),
- STM32_FUNCTION(11, "QUADSPI_BK2_IO0 QUADSPI_BOOTBK2_IO0"),
- STM32_FUNCTION(13, "FMC_D4"),
+ STM32_FUNCTION(11, "QUADSPI_BK2_IO0"),
+ STM32_FUNCTION(13, "FMC_D4 FMC_DA4"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(72, "PE8"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOE8"),
STM32_FUNCTION(2, "TIM1_CH1N"),
- STM32_FUNCTION(4, "DFSDM_CK2"),
+ STM32_FUNCTION(4, "DFSDM1_CKIN2"),
STM32_FUNCTION(8, "UART7_TX"),
- STM32_FUNCTION(11, "QUADSPI_BK2_IO1 QUADSPI_BOOTBK2_IO1"),
- STM32_FUNCTION(13, "FMC_D5"),
+ STM32_FUNCTION(11, "QUADSPI_BK2_IO1"),
+ STM32_FUNCTION(13, "FMC_D5 FMC_DA5"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(73, "PE9"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOE9"),
STM32_FUNCTION(2, "TIM1_CH1"),
- STM32_FUNCTION(4, "DFSDM_CKOUT"),
- STM32_FUNCTION(8, "UART7_RTS UART_BOOT7_RTS"),
- STM32_FUNCTION(11, "QUADSPI_BK2_IO2 QUADSPI_BOOTBK2_IO2"),
- STM32_FUNCTION(13, "FMC_D6"),
+ STM32_FUNCTION(4, "DFSDM1_CKOUT"),
+ STM32_FUNCTION(8, "UART7_RTS UART7_DE"),
+ STM32_FUNCTION(11, "QUADSPI_BK2_IO2"),
+ STM32_FUNCTION(13, "FMC_D6 FMC_DA6"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(74, "PE10"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOE10"),
STM32_FUNCTION(2, "TIM1_CH2N"),
- STM32_FUNCTION(4, "DFSDM_DATA4"),
- STM32_FUNCTION(8, "UART7_CTS UART_BOOT7_CTS"),
- STM32_FUNCTION(11, "QUADSPI_BK2_IO3 QUADSPI_BOOTBK2_IO3"),
- STM32_FUNCTION(13, "FMC_D7"),
+ STM32_FUNCTION(4, "DFSDM1_DATIN4"),
+ STM32_FUNCTION(8, "UART7_CTS"),
+ STM32_FUNCTION(11, "QUADSPI_BK2_IO3"),
+ STM32_FUNCTION(13, "FMC_D7 FMC_DA7"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(75, "PE11"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOE11"),
STM32_FUNCTION(2, "TIM1_CH2"),
- STM32_FUNCTION(4, "DFSDM_CK4"),
+ STM32_FUNCTION(4, "DFSDM1_CKIN4"),
STM32_FUNCTION(6, "SPI4_NSS"),
- STM32_FUNCTION(8, "USART6_CK USART_BOOT6_CK"),
+ STM32_FUNCTION(8, "USART6_CK"),
STM32_FUNCTION(11, "SAI2_SD_B"),
- STM32_FUNCTION(13, "FMC_D8"),
+ STM32_FUNCTION(13, "FMC_D8 FMC_DA8"),
+ STM32_FUNCTION(14, "DCMI_D4"),
STM32_FUNCTION(15, "LCD_G3"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(76, "PE12"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOE12"),
STM32_FUNCTION(2, "TIM1_CH3N"),
- STM32_FUNCTION(4, "DFSDM_DATA5"),
+ STM32_FUNCTION(4, "DFSDM1_DATIN5"),
STM32_FUNCTION(6, "SPI4_SCK"),
- STM32_FUNCTION(9, "SDMMC1_D0DIR SDMMC_BOOT1_D0DIR"),
+ STM32_FUNCTION(9, "SDMMC1_D0DIR"),
STM32_FUNCTION(11, "SAI2_SCK_B"),
- STM32_FUNCTION(13, "FMC_D9"),
+ STM32_FUNCTION(13, "FMC_D9 FMC_DA9"),
STM32_FUNCTION(15, "LCD_B4"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(77, "PE13"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOE13"),
STM32_FUNCTION(1, "HDP2"),
STM32_FUNCTION(2, "TIM1_CH3"),
- STM32_FUNCTION(4, "DFSDM_CK5"),
+ STM32_FUNCTION(4, "DFSDM1_CKIN5"),
STM32_FUNCTION(6, "SPI4_MISO"),
STM32_FUNCTION(11, "SAI2_FS_B"),
- STM32_FUNCTION(13, "FMC_D10"),
+ STM32_FUNCTION(13, "FMC_D10 FMC_DA10"),
+ STM32_FUNCTION(14, "DCMI_D6"),
STM32_FUNCTION(15, "LCD_DE"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(78, "PE14"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOE14"),
STM32_FUNCTION(2, "TIM1_CH4"),
STM32_FUNCTION(6, "SPI4_MOSI"),
- STM32_FUNCTION(9, "UART8_RTS UART_BOOT8_RTS"),
+ STM32_FUNCTION(9, "UART8_RTS UART8_DE"),
STM32_FUNCTION(11, "SAI2_MCLK_B"),
- STM32_FUNCTION(12, "SDMMC1_D123DIR SDMMC_BOOT1_D123DIR"),
- STM32_FUNCTION(13, "FMC_D11"),
+ STM32_FUNCTION(12, "SDMMC1_D123DIR"),
+ STM32_FUNCTION(13, "FMC_D11 FMC_DA11"),
STM32_FUNCTION(14, "LCD_G0"),
STM32_FUNCTION(15, "LCD_CLK"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(79, "PE15"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOE15"),
STM32_FUNCTION(1, "HDP3"),
STM32_FUNCTION(2, "TIM1_BKIN"),
STM32_FUNCTION(5, "TIM15_BKIN"),
- STM32_FUNCTION(8, "USART2_CTS_NSS USART_BOOT2_CTS_NSS"),
- STM32_FUNCTION(9, "UART8_CTS UART_BOOT8_CTS"),
- STM32_FUNCTION(13, "FMC_D12"),
+ STM32_FUNCTION(8, "USART2_CTS USART2_NSS"),
+ STM32_FUNCTION(9, "UART8_CTS"),
+ STM32_FUNCTION(11, "FMC_NCE2"),
+ STM32_FUNCTION(13, "FMC_D12 FMC_DA12"),
STM32_FUNCTION(15, "LCD_R7"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(80, "PF0"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOF0"),
STM32_FUNCTION(5, "I2C2_SDA"),
STM32_FUNCTION(10, "SDMMC3_D0"),
@@ -1159,8 +1235,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(81, "PF1"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOF1"),
STM32_FUNCTION(5, "I2C2_SCL"),
STM32_FUNCTION(10, "SDMMC3_CMD"),
@@ -1169,27 +1246,30 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(82, "PF2"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOF2"),
STM32_FUNCTION(5, "I2C2_SMBA"),
- STM32_FUNCTION(10, "SDMMC2_D0DIR SDMMC_BOOT2_D0DIR"),
+ STM32_FUNCTION(10, "SDMMC2_D0DIR"),
STM32_FUNCTION(11, "SDMMC3_D0DIR"),
- STM32_FUNCTION(12, "SDMMC1_D0DIR SDMMC_BOOT1_D0DIR"),
+ STM32_FUNCTION(12, "SDMMC1_D0DIR"),
STM32_FUNCTION(13, "FMC_A2"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(83, "PF3"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOF3"),
- STM32_FUNCTION(12, "ETH_GMII_TX_ER ETH_MII_TX_ER"),
+ STM32_FUNCTION(12, "ETH1_GMII_TX_ER ETH1_MII_TX_ER"),
STM32_FUNCTION(13, "FMC_A3"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(84, "PF4"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOF4"),
STM32_FUNCTION(8, "USART2_RX"),
STM32_FUNCTION(10, "SDMMC3_D1"),
@@ -1198,8 +1278,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(85, "PF5"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOF5"),
STM32_FUNCTION(8, "USART2_TX"),
STM32_FUNCTION(10, "SDMMC3_D2"),
@@ -1207,71 +1288,77 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(86, "PF6"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOF6"),
STM32_FUNCTION(2, "TIM16_CH1"),
STM32_FUNCTION(6, "SPI5_NSS"),
STM32_FUNCTION(7, "SAI1_SD_B"),
- STM32_FUNCTION(8, "UART7_RX UART_BOOT7_RX"),
- STM32_FUNCTION(10, "QUADSPI_BK1_IO3 QUADSPI_BOOTBK1_IO3"),
+ STM32_FUNCTION(8, "UART7_RX"),
+ STM32_FUNCTION(10, "QUADSPI_BK1_IO3"),
STM32_FUNCTION(13, "SAI4_SCK_B"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(87, "PF7"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOF7"),
STM32_FUNCTION(2, "TIM17_CH1"),
STM32_FUNCTION(6, "SPI5_SCK"),
STM32_FUNCTION(7, "SAI1_MCLK_B"),
- STM32_FUNCTION(8, "UART7_TX UART_BOOT7_TX"),
- STM32_FUNCTION(10, "QUADSPI_BK1_IO2 QUADSPI_BOOTBK1_IO2"),
+ STM32_FUNCTION(8, "UART7_TX"),
+ STM32_FUNCTION(10, "QUADSPI_BK1_IO2"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(88, "PF8"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOF8"),
STM32_FUNCTION(1, "TRACED12"),
STM32_FUNCTION(2, "TIM16_CH1N"),
STM32_FUNCTION(6, "SPI5_MISO"),
STM32_FUNCTION(7, "SAI1_SCK_B"),
- STM32_FUNCTION(8, "UART7_RTS UART_BOOT7_RTS"),
+ STM32_FUNCTION(8, "UART7_RTS UART7_DE"),
STM32_FUNCTION(10, "TIM13_CH1"),
- STM32_FUNCTION(11, "QUADSPI_BK1_IO0 QUADSPI_BOOTBK1_IO0"),
+ STM32_FUNCTION(11, "QUADSPI_BK1_IO0"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(89, "PF9"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOF9"),
STM32_FUNCTION(1, "TRACED13"),
STM32_FUNCTION(2, "TIM17_CH1N"),
STM32_FUNCTION(6, "SPI5_MOSI"),
STM32_FUNCTION(7, "SAI1_FS_B"),
- STM32_FUNCTION(8, "UART7_CTS UART_BOOT7_CTS"),
+ STM32_FUNCTION(8, "UART7_CTS"),
STM32_FUNCTION(10, "TIM14_CH1"),
- STM32_FUNCTION(11, "QUADSPI_BK1_IO1 QUADSPI_BOOTBK1_IO1"),
+ STM32_FUNCTION(11, "QUADSPI_BK1_IO1"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(90, "PF10"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOF10"),
STM32_FUNCTION(2, "TIM16_BKIN"),
STM32_FUNCTION(3, "SAI1_D3"),
STM32_FUNCTION(4, "SAI4_D4"),
STM32_FUNCTION(7, "SAI1_D4"),
- STM32_FUNCTION(10, "QUADSPI_CLK QUADSPI_BOOTCLK"),
+ STM32_FUNCTION(10, "QUADSPI_CLK"),
STM32_FUNCTION(13, "SAI4_D3"),
STM32_FUNCTION(14, "DCMI_D11"),
STM32_FUNCTION(15, "LCD_DE"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(91, "PF11"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOF11"),
STM32_FUNCTION(6, "SPI5_MOSI"),
STM32_FUNCTION(11, "SAI2_SD_B"),
@@ -1280,138 +1367,151 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(92, "PF12"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOF12"),
STM32_FUNCTION(1, "TRACED4"),
- STM32_FUNCTION(12, "ETH_GMII_RXD4"),
+ STM32_FUNCTION(12, "ETH1_GMII_RXD4"),
STM32_FUNCTION(13, "FMC_A6"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(93, "PF13"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOF13"),
STM32_FUNCTION(1, "TRACED5"),
- STM32_FUNCTION(4, "DFSDM_DATA6"),
+ STM32_FUNCTION(4, "DFSDM1_DATIN6"),
STM32_FUNCTION(5, "I2C4_SMBA"),
STM32_FUNCTION(6, "I2C1_SMBA"),
- STM32_FUNCTION(7, "DFSDM_DATA3"),
- STM32_FUNCTION(12, "ETH_GMII_RXD5"),
+ STM32_FUNCTION(7, "DFSDM1_DATIN3"),
+ STM32_FUNCTION(12, "ETH1_GMII_RXD5"),
STM32_FUNCTION(13, "FMC_A7"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(94, "PF14"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOF14"),
STM32_FUNCTION(1, "TRACED6"),
- STM32_FUNCTION(4, "DFSDM_CK6"),
+ STM32_FUNCTION(4, "DFSDM1_CKIN6"),
STM32_FUNCTION(5, "I2C4_SCL"),
STM32_FUNCTION(6, "I2C1_SCL"),
- STM32_FUNCTION(12, "ETH_GMII_RXD6"),
+ STM32_FUNCTION(12, "ETH1_GMII_RXD6"),
STM32_FUNCTION(13, "FMC_A8"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(95, "PF15"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOF15"),
STM32_FUNCTION(1, "TRACED7"),
STM32_FUNCTION(5, "I2C4_SDA"),
STM32_FUNCTION(6, "I2C1_SDA"),
- STM32_FUNCTION(12, "ETH_GMII_RXD7"),
+ STM32_FUNCTION(12, "ETH1_GMII_RXD7"),
STM32_FUNCTION(13, "FMC_A9"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(96, "PG0"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOG0"),
STM32_FUNCTION(1, "TRACED0"),
- STM32_FUNCTION(4, "DFSDM_DATA0"),
- STM32_FUNCTION(12, "ETH_GMII_TXD4"),
+ STM32_FUNCTION(4, "DFSDM1_DATIN0"),
+ STM32_FUNCTION(12, "ETH1_GMII_TXD4"),
STM32_FUNCTION(13, "FMC_A10"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(97, "PG1"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOG1"),
STM32_FUNCTION(1, "TRACED1"),
- STM32_FUNCTION(12, "ETH_GMII_TXD5"),
+ STM32_FUNCTION(12, "ETH1_GMII_TXD5"),
STM32_FUNCTION(13, "FMC_A11"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(98, "PG2"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOG2"),
STM32_FUNCTION(1, "TRACED2"),
STM32_FUNCTION(2, "MCO2"),
STM32_FUNCTION(4, "TIM8_BKIN"),
- STM32_FUNCTION(12, "ETH_GMII_TXD6"),
+ STM32_FUNCTION(12, "ETH1_GMII_TXD6"),
STM32_FUNCTION(13, "FMC_A12"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(99, "PG3"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOG3"),
STM32_FUNCTION(1, "TRACED3"),
STM32_FUNCTION(4, "TIM8_BKIN2"),
- STM32_FUNCTION(5, "DFSDM_CK1"),
- STM32_FUNCTION(12, "ETH_GMII_TXD7"),
+ STM32_FUNCTION(5, "DFSDM1_CKIN1"),
+ STM32_FUNCTION(12, "ETH1_GMII_TXD7"),
STM32_FUNCTION(13, "FMC_A13"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(100, "PG4"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOG4"),
STM32_FUNCTION(2, "TIM1_BKIN2"),
- STM32_FUNCTION(12, "ETH_GMII_GTX_CLK ETH_RGMII_GTX_CLK"),
+ STM32_FUNCTION(12, "ETH1_GMII_GTX_CLK ETH1_RGMII_GTX_CLK"),
STM32_FUNCTION(13, "FMC_A14"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(101, "PG5"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOG5"),
STM32_FUNCTION(2, "TIM1_ETR"),
- STM32_FUNCTION(12, "ETH_GMII_CLK125 ETH_RGMII_CLK125"),
+ STM32_FUNCTION(12, "ETH1_GMII_CLK125 ETH1_RGMII_CLK125"),
STM32_FUNCTION(13, "FMC_A15"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(102, "PG6"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOG6"),
STM32_FUNCTION(1, "TRACED14"),
STM32_FUNCTION(2, "TIM17_BKIN"),
- STM32_FUNCTION(11, "SDMMC2_CMD SDMMC_BOOT2_CMD"),
+ STM32_FUNCTION(11, "SDMMC2_CMD"),
STM32_FUNCTION(14, "DCMI_D12"),
STM32_FUNCTION(15, "LCD_R7"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(103, "PG7"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOG7"),
STM32_FUNCTION(1, "TRACED5"),
STM32_FUNCTION(7, "SAI1_MCLK_A"),
- STM32_FUNCTION(8, "USART6_CK USART_BOOT6_CK"),
- STM32_FUNCTION(9, "UART8_RTS UART_BOOT8_RTS"),
+ STM32_FUNCTION(8, "USART6_CK"),
+ STM32_FUNCTION(9, "UART8_RTS UART8_DE"),
STM32_FUNCTION(10, "QUADSPI_CLK"),
- STM32_FUNCTION(12, "QUADSPI_BK2_IO3 QUADSPI_BOOTBK2_IO3"),
+ STM32_FUNCTION(12, "QUADSPI_BK2_IO3"),
STM32_FUNCTION(13, "FMC_INT"),
STM32_FUNCTION(14, "DCMI_D13"),
STM32_FUNCTION(15, "LCD_CLK"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(104, "PG8"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOG8"),
STM32_FUNCTION(1, "TRACED15"),
STM32_FUNCTION(2, "TIM2_CH1 TIM2_ETR"),
@@ -1419,73 +1519,79 @@
STM32_FUNCTION(4, "TIM8_ETR"),
STM32_FUNCTION(6, "SPI6_NSS"),
STM32_FUNCTION(7, "SAI4_D2"),
- STM32_FUNCTION(8, "USART6_RTS USART_BOOT6_RTS"),
- STM32_FUNCTION(9, "USART3_RTS"),
- STM32_FUNCTION(10, "SPDIF_IN2"),
+ STM32_FUNCTION(8, "USART6_RTS USART6_DE"),
+ STM32_FUNCTION(9, "USART3_RTS USART3_DE"),
+ STM32_FUNCTION(10, "SPDIFRX_IN2"),
STM32_FUNCTION(11, "SAI4_FS_A"),
- STM32_FUNCTION(12, "ETH_PPS_OUT"),
+ STM32_FUNCTION(12, "ETH1_PPS_OUT"),
STM32_FUNCTION(15, "LCD_G7"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(105, "PG9"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOG9"),
STM32_FUNCTION(1, "DBTRGO"),
STM32_FUNCTION(8, "USART6_RX"),
- STM32_FUNCTION(9, "SPDIF_IN3"),
- STM32_FUNCTION(10, "QUADSPI_BK2_IO2 QUADSPI_BOOTBK2_IO2"),
+ STM32_FUNCTION(9, "SPDIFRX_IN3"),
+ STM32_FUNCTION(10, "QUADSPI_BK2_IO2"),
STM32_FUNCTION(11, "SAI2_FS_B"),
- STM32_FUNCTION(13, "FMC_NE2 FMC_NCE"),
+ STM32_FUNCTION(13, "FMC_NCE FMC_NE2"),
STM32_FUNCTION(14, "DCMI_VSYNC"),
+ STM32_FUNCTION(15, "LCD_R1"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(106, "PG10"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOG10"),
STM32_FUNCTION(1, "TRACED10"),
- STM32_FUNCTION(9, "UART8_CTS UART_BOOT8_CTS"),
+ STM32_FUNCTION(9, "UART8_CTS"),
STM32_FUNCTION(10, "LCD_G3"),
STM32_FUNCTION(11, "SAI2_SD_B"),
- STM32_FUNCTION(12, "QUADSPI_BK2_IO2 QUADSPI_BOOTBK2_IO2"),
+ STM32_FUNCTION(12, "QUADSPI_BK2_IO2"),
STM32_FUNCTION(13, "FMC_NE3"),
STM32_FUNCTION(14, "DCMI_D2"),
STM32_FUNCTION(15, "LCD_B2"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(107, "PG11"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOG11"),
STM32_FUNCTION(1, "TRACED11"),
STM32_FUNCTION(5, "USART1_TX"),
- STM32_FUNCTION(7, "UART4_TX UART_BOOT4_TX"),
- STM32_FUNCTION(9, "SPDIF_IN0"),
- STM32_FUNCTION(12, "ETH_GMII_TX_EN ETH_MII_TX_EN ETH_RGMII_TX_CTL ETH_RMII_TX_EN"),
+ STM32_FUNCTION(7, "UART4_TX"),
+ STM32_FUNCTION(9, "SPDIFRX_IN0"),
+ STM32_FUNCTION(12, "ETH1_GMII_TX_EN ETH1_MII_TX_EN ETH1_RGMII_TX_CTL ETH1_RMII_TX_EN"),
STM32_FUNCTION(14, "DCMI_D3"),
STM32_FUNCTION(15, "LCD_B3"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(108, "PG12"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOG12"),
STM32_FUNCTION(2, "LPTIM1_IN1"),
STM32_FUNCTION(6, "SPI6_MISO"),
STM32_FUNCTION(7, "SAI4_CK2"),
- STM32_FUNCTION(8, "USART6_RTS USART_BOOT6_RTS"),
- STM32_FUNCTION(9, "SPDIF_IN1"),
+ STM32_FUNCTION(8, "USART6_RTS USART6_DE"),
+ STM32_FUNCTION(9, "SPDIFRX_IN1"),
STM32_FUNCTION(10, "LCD_B4"),
STM32_FUNCTION(11, "SAI4_SCK_A"),
- STM32_FUNCTION(12, "ETH_PHY_INTN"),
+ STM32_FUNCTION(12, "ETH1_PHY_INTN"),
STM32_FUNCTION(13, "FMC_NE4"),
STM32_FUNCTION(15, "LCD_B1"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(109, "PG13"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOG13"),
STM32_FUNCTION(1, "TRACED0"),
STM32_FUNCTION(2, "LPTIM1_OUT"),
@@ -1493,79 +1599,86 @@
STM32_FUNCTION(5, "SAI4_CK1"),
STM32_FUNCTION(6, "SPI6_SCK"),
STM32_FUNCTION(7, "SAI1_SCK_A"),
- STM32_FUNCTION(8, "USART6_CTS_NSS USART_BOOT6_CTS_NSS"),
+ STM32_FUNCTION(8, "USART6_CTS USART6_NSS"),
STM32_FUNCTION(11, "SAI4_MCLK_A"),
- STM32_FUNCTION(12, "ETH_GMII_TXD0 ETH_MII_TXD0 ETH_RGMII_TXD0 ETH_RMII_TXD0"),
+ STM32_FUNCTION(12, "ETH1_GMII_TXD0 ETH1_MII_TXD0 ETH1_RGMII_TXD0 ETH1_RMII_TXD0"),
STM32_FUNCTION(13, "FMC_A24"),
STM32_FUNCTION(15, "LCD_R0"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(110, "PG14"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOG14"),
STM32_FUNCTION(1, "TRACED1"),
STM32_FUNCTION(2, "LPTIM1_ETR"),
STM32_FUNCTION(6, "SPI6_MOSI"),
STM32_FUNCTION(7, "SAI4_D1"),
STM32_FUNCTION(8, "USART6_TX"),
- STM32_FUNCTION(10, "QUADSPI_BK2_IO3 QUADSPI_BOOTBK2_IO3"),
+ STM32_FUNCTION(10, "QUADSPI_BK2_IO3"),
STM32_FUNCTION(11, "SAI4_SD_A"),
- STM32_FUNCTION(12, "ETH_GMII_TXD1 ETH_MII_TXD1 ETH_RGMII_TXD1 ETH_RMII_TXD1"),
+ STM32_FUNCTION(12, "ETH1_GMII_TXD1 ETH1_MII_TXD1 ETH1_RGMII_TXD1 ETH1_RMII_TXD1"),
STM32_FUNCTION(13, "FMC_A25"),
STM32_FUNCTION(15, "LCD_B0"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(111, "PG15"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOG15"),
STM32_FUNCTION(1, "TRACED7"),
STM32_FUNCTION(3, "SAI1_D2"),
STM32_FUNCTION(5, "I2C2_SDA"),
STM32_FUNCTION(7, "SAI1_FS_A"),
- STM32_FUNCTION(8, "USART6_CTS_NSS USART_BOOT6_CTS_NSS"),
+ STM32_FUNCTION(8, "USART6_CTS USART6_NSS"),
STM32_FUNCTION(11, "SDMMC3_CK"),
STM32_FUNCTION(14, "DCMI_D13"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(112, "PH0"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOH0"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(113, "PH1"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC | STM32MP_PKG_AB | STM32MP_PKG_AD,
STM32_FUNCTION(0, "GPIOH1"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(114, "PH2"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOH2"),
STM32_FUNCTION(2, "LPTIM1_IN2"),
- STM32_FUNCTION(10, "QUADSPI_BK2_IO0 QUADSPI_BOOTBK2_IO0"),
+ STM32_FUNCTION(10, "QUADSPI_BK2_IO0"),
STM32_FUNCTION(11, "SAI2_SCK_B"),
- STM32_FUNCTION(12, "ETH_GMII_CRS ETH_MII_CRS"),
+ STM32_FUNCTION(12, "ETH1_GMII_CRS ETH1_MII_CRS"),
STM32_FUNCTION(15, "LCD_R0"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(115, "PH3"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOH3"),
- STM32_FUNCTION(4, "DFSDM_CK4"),
- STM32_FUNCTION(10, "QUADSPI_BK2_IO1 QUADSPI_BOOTBK2_IO1"),
+ STM32_FUNCTION(4, "DFSDM1_CKIN4"),
+ STM32_FUNCTION(10, "QUADSPI_BK2_IO1"),
STM32_FUNCTION(11, "SAI2_MCLK_B"),
- STM32_FUNCTION(12, "ETH_GMII_COL ETH_MII_COL"),
+ STM32_FUNCTION(12, "ETH1_GMII_COL ETH1_MII_COL"),
STM32_FUNCTION(15, "LCD_R1"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(116, "PH4"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOH4"),
STM32_FUNCTION(5, "I2C2_SCL"),
STM32_FUNCTION(10, "LCD_G5"),
@@ -1573,8 +1686,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(117, "PH5"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOH5"),
STM32_FUNCTION(5, "I2C2_SDA"),
STM32_FUNCTION(6, "SPI5_NSS"),
@@ -1582,31 +1696,34 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(118, "PH6"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOH6"),
STM32_FUNCTION(3, "TIM12_CH1"),
STM32_FUNCTION(5, "I2C2_SMBA"),
STM32_FUNCTION(6, "SPI5_SCK"),
- STM32_FUNCTION(12, "ETH_GMII_RXD2 ETH_MII_RXD2 ETH_RGMII_RXD2"),
+ STM32_FUNCTION(12, "ETH1_GMII_RXD2 ETH1_MII_RXD2 ETH1_RGMII_RXD2"),
STM32_FUNCTION(13, "MDIOS_MDIO"),
STM32_FUNCTION(14, "DCMI_D8"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(119, "PH7"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOH7"),
STM32_FUNCTION(5, "I2C3_SCL"),
STM32_FUNCTION(6, "SPI5_MISO"),
- STM32_FUNCTION(12, "ETH_GMII_RXD3 ETH_MII_RXD3 ETH_RGMII_RXD3"),
+ STM32_FUNCTION(12, "ETH1_GMII_RXD3 ETH1_MII_RXD3 ETH1_RGMII_RXD3"),
STM32_FUNCTION(13, "MDIOS_MDC"),
STM32_FUNCTION(14, "DCMI_D9"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(120, "PH8"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOH8"),
STM32_FUNCTION(3, "TIM5_ETR"),
STM32_FUNCTION(5, "I2C3_SDA"),
@@ -1615,8 +1732,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(121, "PH9"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOH9"),
STM32_FUNCTION(3, "TIM12_CH2"),
STM32_FUNCTION(5, "I2C3_SMBA"),
@@ -1625,8 +1743,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(122, "PH10"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOH10"),
STM32_FUNCTION(3, "TIM5_CH1"),
STM32_FUNCTION(5, "I2C4_SMBA"),
@@ -1636,8 +1755,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(123, "PH11"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOH11"),
STM32_FUNCTION(3, "TIM5_CH2"),
STM32_FUNCTION(5, "I2C4_SCL"),
@@ -1647,8 +1767,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(124, "PH12"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOH12"),
STM32_FUNCTION(1, "HDP2"),
STM32_FUNCTION(3, "TIM5_CH3"),
@@ -1659,50 +1780,53 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(125, "PH13"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOH13"),
STM32_FUNCTION(4, "TIM8_CH1N"),
STM32_FUNCTION(9, "UART4_TX"),
- STM32_FUNCTION(10, "CAN1_TX"),
+ STM32_FUNCTION(10, "FDCAN1_TX"),
STM32_FUNCTION(15, "LCD_G2"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(126, "PH14"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOH14"),
STM32_FUNCTION(4, "TIM8_CH2N"),
STM32_FUNCTION(9, "UART4_RX"),
- STM32_FUNCTION(10, "CAN1_RX"),
+ STM32_FUNCTION(10, "FDCAN1_RX"),
STM32_FUNCTION(14, "DCMI_D4"),
STM32_FUNCTION(15, "LCD_G3"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(127, "PH15"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOH15"),
STM32_FUNCTION(4, "TIM8_CH3N"),
- STM32_FUNCTION(10, "CAN1_TXFD"),
STM32_FUNCTION(14, "DCMI_D11"),
STM32_FUNCTION(15, "LCD_G4"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(128, "PI0"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOI0"),
STM32_FUNCTION(3, "TIM5_CH4"),
STM32_FUNCTION(6, "SPI2_NSS I2S2_WS"),
- STM32_FUNCTION(10, "CAN1_RXFD"),
STM32_FUNCTION(14, "DCMI_D13"),
STM32_FUNCTION(15, "LCD_G5"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(129, "PI1"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOI1"),
STM32_FUNCTION(4, "TIM8_BKIN2"),
STM32_FUNCTION(6, "SPI2_SCK I2S2_CK"),
@@ -1711,8 +1835,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(130, "PI2"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOI2"),
STM32_FUNCTION(4, "TIM8_CH4"),
STM32_FUNCTION(6, "SPI2_MISO I2S2_SDI"),
@@ -1721,8 +1846,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(131, "PI3"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOI3"),
STM32_FUNCTION(4, "TIM8_ETR"),
STM32_FUNCTION(6, "SPI2_MOSI I2S2_SDO"),
@@ -1730,8 +1856,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(132, "PI4"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOI4"),
STM32_FUNCTION(4, "TIM8_BKIN"),
STM32_FUNCTION(11, "SAI2_MCLK_A"),
@@ -1740,8 +1867,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(133, "PI5"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOI5"),
STM32_FUNCTION(4, "TIM8_CH1"),
STM32_FUNCTION(11, "SAI2_SCK_A"),
@@ -1750,8 +1878,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(134, "PI6"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOI6"),
STM32_FUNCTION(4, "TIM8_CH2"),
STM32_FUNCTION(11, "SAI2_SD_A"),
@@ -1760,8 +1889,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(135, "PI7"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOI7"),
STM32_FUNCTION(4, "TIM8_CH3"),
STM32_FUNCTION(11, "SAI2_FS_A"),
@@ -1770,35 +1900,38 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(136, "PI8"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOI8"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(137, "PI9"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOI9"),
STM32_FUNCTION(1, "HDP1"),
STM32_FUNCTION(9, "UART4_RX"),
- STM32_FUNCTION(10, "CAN1_RX"),
+ STM32_FUNCTION(10, "FDCAN1_RX"),
STM32_FUNCTION(15, "LCD_VSYNC"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(138, "PI10"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOI10"),
STM32_FUNCTION(1, "HDP0"),
- STM32_FUNCTION(9, "USART3_CTS_NSS USART_BOOT3_CTS_NSS"),
- STM32_FUNCTION(10, "CAN1_RXFD"),
- STM32_FUNCTION(12, "ETH_GMII_RX_ER ETH_MII_RX_ER"),
+ STM32_FUNCTION(9, "USART3_CTS USART3_NSS"),
+ STM32_FUNCTION(12, "ETH1_GMII_RX_ER ETH1_MII_RX_ER"),
STM32_FUNCTION(15, "LCD_HSYNC"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(139, "PI11"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOI11"),
STM32_FUNCTION(1, "MCO1"),
STM32_FUNCTION(6, "I2S_CKIN"),
@@ -1806,8 +1939,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(140, "PI12"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOI12"),
STM32_FUNCTION(1, "TRACED0"),
STM32_FUNCTION(3, "HDP0"),
@@ -1815,8 +1949,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(141, "PI13"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOI13"),
STM32_FUNCTION(1, "TRACED1"),
STM32_FUNCTION(3, "HDP1"),
@@ -1824,24 +1959,27 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(142, "PI14"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOI14"),
STM32_FUNCTION(1, "TRACECLK"),
STM32_FUNCTION(15, "LCD_CLK"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(143, "PI15"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOI15"),
STM32_FUNCTION(10, "LCD_G2"),
STM32_FUNCTION(15, "LCD_R0"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(144, "PJ0"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOJ0"),
STM32_FUNCTION(1, "TRACED8"),
STM32_FUNCTION(10, "LCD_R7"),
@@ -1849,16 +1987,18 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(145, "PJ1"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOJ1"),
STM32_FUNCTION(1, "TRACED9"),
STM32_FUNCTION(15, "LCD_R2"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(146, "PJ2"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOJ2"),
STM32_FUNCTION(1, "TRACED10"),
STM32_FUNCTION(14, "DSI_TE"),
@@ -1866,24 +2006,27 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(147, "PJ3"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOJ3"),
STM32_FUNCTION(1, "TRACED11"),
STM32_FUNCTION(15, "LCD_R4"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(148, "PJ4"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOJ4"),
STM32_FUNCTION(1, "TRACED12"),
STM32_FUNCTION(15, "LCD_R5"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(149, "PJ5"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOJ5"),
STM32_FUNCTION(1, "TRACED2"),
STM32_FUNCTION(3, "HDP2"),
@@ -1891,8 +2034,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(150, "PJ6"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOJ6"),
STM32_FUNCTION(1, "TRACED3"),
STM32_FUNCTION(3, "HDP3"),
@@ -1901,8 +2045,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(151, "PJ7"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOJ7"),
STM32_FUNCTION(1, "TRACED13"),
STM32_FUNCTION(4, "TIM8_CH2N"),
@@ -1910,8 +2055,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(152, "PJ8"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOJ8"),
STM32_FUNCTION(1, "TRACED14"),
STM32_FUNCTION(2, "TIM1_CH3N"),
@@ -1921,8 +2067,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(153, "PJ9"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOJ9"),
STM32_FUNCTION(1, "TRACED15"),
STM32_FUNCTION(2, "TIM1_CH3"),
@@ -1932,8 +2079,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(154, "PJ10"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOJ10"),
STM32_FUNCTION(2, "TIM1_CH2N"),
STM32_FUNCTION(4, "TIM8_CH2"),
@@ -1942,8 +2090,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(155, "PJ11"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOJ11"),
STM32_FUNCTION(2, "TIM1_CH2"),
STM32_FUNCTION(4, "TIM8_CH2N"),
@@ -1952,38 +2101,43 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(156, "PJ12"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOJ12"),
STM32_FUNCTION(10, "LCD_G3"),
STM32_FUNCTION(15, "LCD_B0"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(157, "PJ13"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOJ13"),
STM32_FUNCTION(10, "LCD_G4"),
STM32_FUNCTION(15, "LCD_B1"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(158, "PJ14"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOJ14"),
STM32_FUNCTION(15, "LCD_B2"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(159, "PJ15"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOJ15"),
STM32_FUNCTION(15, "LCD_B3"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(160, "PK0"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOK0"),
STM32_FUNCTION(2, "TIM1_CH1N"),
STM32_FUNCTION(4, "TIM8_CH3"),
@@ -1992,8 +2146,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(161, "PK1"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOK1"),
STM32_FUNCTION(1, "TRACED4"),
STM32_FUNCTION(2, "TIM1_CH1"),
@@ -2004,8 +2159,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(162, "PK2"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOK2"),
STM32_FUNCTION(1, "TRACED5"),
STM32_FUNCTION(2, "TIM1_BKIN"),
@@ -2015,22 +2171,25 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(163, "PK3"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOK3"),
STM32_FUNCTION(15, "LCD_B4"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(164, "PK4"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOK4"),
STM32_FUNCTION(15, "LCD_B5"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(165, "PK5"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOK5"),
STM32_FUNCTION(1, "TRACED6"),
STM32_FUNCTION(3, "HDP6"),
@@ -2038,8 +2197,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(166, "PK6"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOK6"),
STM32_FUNCTION(1, "TRACED7"),
STM32_FUNCTION(3, "HDP7"),
@@ -2047,8 +2207,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(167, "PK7"),
+ STM32MP_PKG_AA,
STM32_FUNCTION(0, "GPIOK7"),
STM32_FUNCTION(15, "LCD_DE"),
STM32_FUNCTION(16, "EVENTOUT"),
@@ -2057,8 +2218,9 @@
};
static const struct stm32_desc_pin stm32mp157_z_pins[] = {
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(400, "PZ0"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOZ0"),
STM32_FUNCTION(3, "I2C6_SCL"),
STM32_FUNCTION(4, "I2C2_SCL"),
@@ -2068,8 +2230,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(401, "PZ1"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOZ1"),
STM32_FUNCTION(3, "I2C6_SDA"),
STM32_FUNCTION(4, "I2C2_SDA"),
@@ -2081,8 +2244,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(402, "PZ2"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOZ2"),
STM32_FUNCTION(3, "I2C6_SCL"),
STM32_FUNCTION(4, "I2C2_SCL"),
@@ -2094,21 +2258,23 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(403, "PZ3"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOZ3"),
STM32_FUNCTION(3, "I2C6_SDA"),
STM32_FUNCTION(4, "I2C2_SDA"),
STM32_FUNCTION(5, "I2C5_SDA"),
STM32_FUNCTION(6, "SPI1_NSS I2S1_WS"),
STM32_FUNCTION(7, "I2C4_SDA"),
- STM32_FUNCTION(8, "USART1_CTS_NSS"),
+ STM32_FUNCTION(8, "USART1_CTS USART1_NSS"),
STM32_FUNCTION(9, "SPI6_NSS"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(404, "PZ4"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOZ4"),
STM32_FUNCTION(3, "I2C6_SCL"),
STM32_FUNCTION(4, "I2C2_SCL"),
@@ -2117,19 +2283,21 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(405, "PZ5"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOZ5"),
STM32_FUNCTION(3, "I2C6_SDA"),
STM32_FUNCTION(4, "I2C2_SDA"),
STM32_FUNCTION(5, "I2C5_SDA"),
STM32_FUNCTION(7, "I2C4_SDA"),
- STM32_FUNCTION(8, "USART1_RTS"),
+ STM32_FUNCTION(8, "USART1_RTS USART1_DE"),
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(406, "PZ6"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOZ6"),
STM32_FUNCTION(3, "I2C6_SCL"),
STM32_FUNCTION(4, "I2C2_SCL"),
@@ -2140,8 +2308,9 @@
STM32_FUNCTION(16, "EVENTOUT"),
STM32_FUNCTION(17, "ANALOG")
),
- STM32_PIN(
+ STM32_PIN_PKG(
PINCTRL_PIN(407, "PZ7"),
+ STM32MP_PKG_AA | STM32MP_PKG_AC,
STM32_FUNCTION(0, "GPIOZ7"),
STM32_FUNCTION(3, "I2C6_SDA"),
STM32_FUNCTION(4, "I2C2_SDA"),
@@ -2173,11 +2342,16 @@
{ }
};
+static const struct dev_pm_ops stm32_pinctrl_dev_pm_ops = {
+ SET_LATE_SYSTEM_SLEEP_PM_OPS(NULL, stm32_pinctrl_resume)
+};
+
static struct platform_driver stm32mp157_pinctrl_driver = {
.probe = stm32_pctl_probe,
.driver = {
.name = "stm32mp157-pinctrl",
.of_match_table = stm32mp157_pctrl_match,
+ .pm = &stm32_pinctrl_dev_pm_ops,
},
};