Update Linux to v5.4.2
Change-Id: Idf6911045d9d382da2cfe01b1edff026404ac8fd
diff --git a/drivers/irqchip/irq-ativic32.c b/drivers/irqchip/irq-ativic32.c
index f69a858..85cf6e0 100644
--- a/drivers/irqchip/irq-ativic32.c
+++ b/drivers/irqchip/irq-ativic32.c
@@ -10,6 +10,8 @@
#include <linux/irqchip.h>
#include <nds32_intrinsic.h>
+unsigned long wake_mask;
+
static void ativic32_ack_irq(struct irq_data *data)
{
__nds32__mtsr_dsb(BIT(data->hwirq), NDS32_SR_INT_PEND2);
@@ -27,11 +29,40 @@
__nds32__mtsr_dsb(int_mask2 | (BIT(data->hwirq)), NDS32_SR_INT_MASK2);
}
+static int nointc_set_wake(struct irq_data *data, unsigned int on)
+{
+ unsigned long int_mask = __nds32__mfsr(NDS32_SR_INT_MASK);
+ static unsigned long irq_orig_bit;
+ u32 bit = 1 << data->hwirq;
+
+ if (on) {
+ if (int_mask & bit)
+ __assign_bit(data->hwirq, &irq_orig_bit, true);
+ else
+ __assign_bit(data->hwirq, &irq_orig_bit, false);
+
+ __assign_bit(data->hwirq, &int_mask, true);
+ __assign_bit(data->hwirq, &wake_mask, true);
+
+ } else {
+ if (!(irq_orig_bit & bit))
+ __assign_bit(data->hwirq, &int_mask, false);
+
+ __assign_bit(data->hwirq, &wake_mask, false);
+ __assign_bit(data->hwirq, &irq_orig_bit, false);
+ }
+
+ __nds32__mtsr_dsb(int_mask, NDS32_SR_INT_MASK);
+
+ return 0;
+}
+
static struct irq_chip ativic32_chip = {
.name = "ativic32",
.irq_ack = ativic32_ack_irq,
.irq_mask = ativic32_mask_irq,
.irq_unmask = ativic32_unmask_irq,
+ .irq_set_wake = nointc_set_wake,
};
static unsigned int __initdata nivic_map[6] = { 6, 2, 10, 16, 24, 32 };