Update Linux to v5.4.2
Change-Id: Idf6911045d9d382da2cfe01b1edff026404ac8fd
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index da8a039..dd427bd 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -1,33 +1,37 @@
# SPDX-License-Identifier: GPL-2.0
+
+menuconfig ARCH_DAVINCI
+ bool "TI DaVinci"
+ depends on ARCH_MULTI_V5
+ select DAVINCI_TIMER
+ select ZONE_DMA
+ select ARCH_HAS_HOLES_MEMORYMODEL
+ select PM_GENERIC_DOMAINS if PM
+ select PM_GENERIC_DOMAINS_OF if PM && OF
+ select REGMAP_MMIO
+ select HAVE_IDE
+ select PINCTRL_SINGLE
+
if ARCH_DAVINCI
-config AINTC
- bool
-
-config CP_INTC
- bool
- select IRQ_DOMAIN
-
config ARCH_DAVINCI_DMx
bool
-menu "TI DaVinci Implementations"
-
comment "DaVinci Core Type"
config ARCH_DAVINCI_DM644x
bool "DaVinci 644x based system"
- select AINTC
+ select DAVINCI_AINTC
select ARCH_DAVINCI_DMx
config ARCH_DAVINCI_DM355
bool "DaVinci 355 based system"
- select AINTC
+ select DAVINCI_AINTC
select ARCH_DAVINCI_DMx
config ARCH_DAVINCI_DM646x
bool "DaVinci 646x based system"
- select AINTC
+ select DAVINCI_AINTC
select ARCH_DAVINCI_DMx
config ARCH_DAVINCI_DA830
@@ -36,20 +40,20 @@
select ARCH_DAVINCI_DA8XX
# needed on silicon revs 1.0, 1.1:
select CPU_DCACHE_WRITETHROUGH if !CPU_DCACHE_DISABLE
- select CP_INTC
+ select DAVINCI_CP_INTC
config ARCH_DAVINCI_DA850
bool "DA850/OMAP-L138/AM18x based system"
depends on !ARCH_DAVINCI_DMx || (AUTO_ZRELADDR && ARM_PATCH_PHYS_VIRT)
select ARCH_DAVINCI_DA8XX
- select CP_INTC
+ select DAVINCI_CP_INTC
config ARCH_DAVINCI_DA8XX
bool
config ARCH_DAVINCI_DM365
bool "DaVinci 365 based system"
- select AINTC
+ select DAVINCI_AINTC
select ARCH_DAVINCI_DMx
comment "DaVinci Board Type"
@@ -232,6 +236,4 @@
to change the pin multiplexing setup. When there are no warnings
printed, it's safe to deselect DAVINCI_MUX for your product.
-endmenu
-
endif
diff --git a/arch/arm/mach-davinci/Makefile b/arch/arm/mach-davinci/Makefile
index 93d271b..a03d844 100644
--- a/arch/arm/mach-davinci/Makefile
+++ b/arch/arm/mach-davinci/Makefile
@@ -4,6 +4,8 @@
#
#
+ccflags-$(CONFIG_ARCH_MULTIPLATFORM) := -I$(srctree)/$(src)/include
+
# Common objects
obj-y := time.o serial.o usb.o \
common.o sram.o
@@ -18,9 +20,6 @@
obj-$(CONFIG_ARCH_DAVINCI_DA830) += da830.o devices-da8xx.o usb-da8xx.o
obj-$(CONFIG_ARCH_DAVINCI_DA850) += da850.o devices-da8xx.o usb-da8xx.o
-obj-$(CONFIG_AINTC) += irq.o
-obj-$(CONFIG_CP_INTC) += cp_intc.o
-
# Board specific
obj-$(CONFIG_MACH_DA8XX_DT) += da8xx-dt.o pdata-quirks.o
obj-$(CONFIG_MACH_DAVINCI_EVM) += board-dm644x-evm.o
diff --git a/arch/arm/mach-davinci/asp.h b/arch/arm/mach-davinci/asp.h
index 495aa69..d0ecd1d 100644
--- a/arch/arm/mach-davinci/asp.h
+++ b/arch/arm/mach-davinci/asp.h
@@ -49,9 +49,9 @@
#define DAVINCI_DA830_DMA_MCASP2_AXEVT 5
/* Interrupts */
-#define DAVINCI_ASP0_RX_INT IRQ_MBRINT
-#define DAVINCI_ASP0_TX_INT IRQ_MBXINT
-#define DAVINCI_ASP1_RX_INT IRQ_MBRINT
-#define DAVINCI_ASP1_TX_INT IRQ_MBXINT
+#define DAVINCI_ASP0_RX_INT DAVINCI_INTC_IRQ(IRQ_MBRINT)
+#define DAVINCI_ASP0_TX_INT DAVINCI_INTC_IRQ(IRQ_MBXINT)
+#define DAVINCI_ASP1_RX_INT DAVINCI_INTC_IRQ(IRQ_MBRINT)
+#define DAVINCI_ASP1_TX_INT DAVINCI_INTC_IRQ(IRQ_MBXINT)
#endif /* __ASM_ARCH_DAVINCI_ASP_H */
diff --git a/arch/arm/mach-davinci/board-da830-evm.c b/arch/arm/mach-davinci/board-da830-evm.c
index 7d8ab36..a273ab2 100644
--- a/arch/arm/mach-davinci/board-da830-evm.c
+++ b/arch/arm/mach-davinci/board-da830-evm.c
@@ -18,7 +18,7 @@
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/platform_data/pcf857x.h>
-#include <linux/platform_data/at24.h>
+#include <linux/property.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/spi/spi.h>
@@ -29,16 +29,19 @@
#include <linux/platform_data/spi-davinci.h>
#include <linux/platform_data/usb-davinci.h>
#include <linux/platform_data/ti-aemif.h>
+#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
+#include <linux/nvmem-provider.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/common.h>
-#include "cp_intc.h"
#include <mach/mux.h>
#include <mach/da8xx.h>
+#include "irqs.h"
+
#define DA830_EVM_PHY_ID ""
/*
* USB1 VBUS is controlled by GPIO1[15], over-current is reported on GPIO2[4].
@@ -51,62 +54,58 @@
-1
};
-static da8xx_ocic_handler_t da830_evm_usb_ocic_handler;
+static struct regulator_consumer_supply da830_evm_usb_supplies[] = {
+ REGULATOR_SUPPLY("vbus", NULL),
+};
-static int da830_evm_usb_set_power(unsigned port, int on)
-{
- gpio_set_value(ON_BD_USB_DRV, on);
- return 0;
-}
+static struct regulator_init_data da830_evm_usb_vbus_data = {
+ .consumer_supplies = da830_evm_usb_supplies,
+ .num_consumer_supplies = ARRAY_SIZE(da830_evm_usb_supplies),
+ .constraints = {
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ },
+};
-static int da830_evm_usb_get_power(unsigned port)
-{
- return gpio_get_value(ON_BD_USB_DRV);
-}
+static struct fixed_voltage_config da830_evm_usb_vbus = {
+ .supply_name = "vbus",
+ .microvolts = 33000000,
+ .init_data = &da830_evm_usb_vbus_data,
+};
-static int da830_evm_usb_get_oci(unsigned port)
-{
- return !gpio_get_value(ON_BD_USB_OVC);
-}
+static struct platform_device da830_evm_usb_vbus_device = {
+ .name = "reg-fixed-voltage",
+ .id = 0,
+ .dev = {
+ .platform_data = &da830_evm_usb_vbus,
+ },
+};
-static irqreturn_t da830_evm_usb_ocic_irq(int, void *);
+static struct gpiod_lookup_table da830_evm_usb_oc_gpio_lookup = {
+ .dev_id = "ohci-da8xx",
+ .table = {
+ GPIO_LOOKUP("davinci_gpio", ON_BD_USB_OVC, "oc", 0),
+ { }
+ },
+};
-static int da830_evm_usb_ocic_notify(da8xx_ocic_handler_t handler)
-{
- int irq = gpio_to_irq(ON_BD_USB_OVC);
- int error = 0;
+static struct gpiod_lookup_table da830_evm_usb_vbus_gpio_lookup = {
+ .dev_id = "reg-fixed-voltage.0",
+ .table = {
+ GPIO_LOOKUP("davinci_gpio", ON_BD_USB_DRV, NULL, 0),
+ { }
+ },
+};
- if (handler != NULL) {
- da830_evm_usb_ocic_handler = handler;
-
- error = request_irq(irq, da830_evm_usb_ocic_irq,
- IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
- "OHCI over-current indicator", NULL);
- if (error)
- pr_err("%s: could not request IRQ to watch over-current indicator changes\n",
- __func__);
- } else
- free_irq(irq, NULL);
-
- return error;
-}
+static struct gpiod_lookup_table *da830_evm_usb_gpio_lookups[] = {
+ &da830_evm_usb_oc_gpio_lookup,
+ &da830_evm_usb_vbus_gpio_lookup,
+};
static struct da8xx_ohci_root_hub da830_evm_usb11_pdata = {
- .set_power = da830_evm_usb_set_power,
- .get_power = da830_evm_usb_get_power,
- .get_oci = da830_evm_usb_get_oci,
- .ocic_notify = da830_evm_usb_ocic_notify,
-
/* TPS2065 switch @ 5V */
.potpgt = (3 + 1) / 2, /* 3 ms max */
};
-static irqreturn_t da830_evm_usb_ocic_irq(int irq, void *dev_id)
-{
- da830_evm_usb_ocic_handler(&da830_evm_usb11_pdata, 1);
- return IRQ_HANDLED;
-}
-
static __init void da830_evm_usb_init(void)
{
int ret;
@@ -116,6 +115,9 @@
pr_warn("%s: USB PHY CLK registration failed: %d\n",
__func__, ret);
+ gpiod_add_lookup_tables(da830_evm_usb_gpio_lookups,
+ ARRAY_SIZE(da830_evm_usb_gpio_lookups));
+
ret = da8xx_register_usb_phy();
if (ret)
pr_warn("%s: USB PHY registration failed: %d\n",
@@ -141,21 +143,11 @@
return;
}
- ret = gpio_request(ON_BD_USB_DRV, "ON_BD_USB_DRV");
+ ret = platform_device_register(&da830_evm_usb_vbus_device);
if (ret) {
- pr_err("%s: failed to request GPIO for USB 1.1 port power control: %d\n",
- __func__, ret);
+ pr_warn("%s: Unable to register the vbus supply\n", __func__);
return;
}
- gpio_direction_output(ON_BD_USB_DRV, 0);
-
- ret = gpio_request(ON_BD_USB_OVC, "ON_BD_USB_OVC");
- if (ret) {
- pr_err("%s: failed to request GPIO for USB 1.1 port over-current indicator: %d\n",
- __func__, ret);
- return;
- }
- gpio_direction_input(ON_BD_USB_OVC);
ret = da8xx_register_usb11(&da830_evm_usb11_pdata);
if (ret)
@@ -207,10 +199,11 @@
.dev_id = "da830-mmc.0",
.table = {
/* gpio chip 1 contains gpio range 32-63 */
- GPIO_LOOKUP("davinci_gpio.0", DA830_MMCSD_CD_PIN, "cd",
+ GPIO_LOOKUP("davinci_gpio", DA830_MMCSD_CD_PIN, "cd",
GPIO_ACTIVE_LOW),
- GPIO_LOOKUP("davinci_gpio.0", DA830_MMCSD_WP_PIN, "wp",
+ GPIO_LOOKUP("davinci_gpio", DA830_MMCSD_WP_PIN, "wp",
GPIO_ACTIVE_LOW),
+ { }
},
};
@@ -435,12 +428,30 @@
static inline void da830_evm_init_lcdc(int mux_mode) { }
#endif
-static struct at24_platform_data da830_evm_i2c_eeprom_info = {
- .byte_len = SZ_256K / 8,
- .page_size = 64,
- .flags = AT24_FLAG_ADDR16,
- .setup = davinci_get_mac_addr,
- .context = (void *)0x7f00,
+static struct nvmem_cell_info da830_evm_nvmem_cells[] = {
+ {
+ .name = "macaddr",
+ .offset = 0x7f00,
+ .bytes = ETH_ALEN,
+ }
+};
+
+static struct nvmem_cell_table da830_evm_nvmem_cell_table = {
+ .nvmem_name = "1-00500",
+ .cells = da830_evm_nvmem_cells,
+ .ncells = ARRAY_SIZE(da830_evm_nvmem_cells),
+};
+
+static struct nvmem_cell_lookup da830_evm_nvmem_cell_lookup = {
+ .nvmem_name = "1-00500",
+ .cell_name = "macaddr",
+ .dev_id = "davinci_emac.1",
+ .con_id = "mac-address",
+};
+
+static const struct property_entry da830_evm_i2c_eeprom_properties[] = {
+ PROPERTY_ENTRY_U32("pagesize", 64),
+ { }
};
static int __init da830_evm_ui_expander_setup(struct i2c_client *client,
@@ -474,7 +485,7 @@
static struct i2c_board_info __initdata da830_evm_i2c_devices[] = {
{
I2C_BOARD_INFO("24c256", 0x50),
- .platform_data = &da830_evm_i2c_eeprom_info,
+ .properties = da830_evm_i2c_eeprom_properties,
},
{
I2C_BOARD_INFO("tlv320aic3x", 0x18),
@@ -620,6 +631,10 @@
__func__, ret);
davinci_serial_init(da8xx_serial_device);
+
+ nvmem_add_cell_table(&da830_evm_nvmem_cell_table);
+ nvmem_add_cell_lookups(&da830_evm_nvmem_cell_lookup, 1);
+
i2c_register_board_info(1, da830_evm_i2c_devices,
ARRAY_SIZE(da830_evm_i2c_devices));
@@ -667,7 +682,7 @@
MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
.atag_offset = 0x100,
.map_io = da830_evm_map_io,
- .init_irq = cp_intc_init,
+ .init_irq = da830_init_irq,
.init_time = da830_init_time,
.init_machine = da830_evm_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c
index e1a949b..5b3549f 100644
--- a/arch/arm/mach-davinci/board-da850-evm.c
+++ b/arch/arm/mach-davinci/board-da850-evm.c
@@ -20,7 +20,6 @@
#include <linux/kernel.h>
#include <linux/leds.h>
#include <linux/i2c.h>
-#include <linux/platform_data/at24.h>
#include <linux/platform_data/pca953x.h>
#include <linux/input.h>
#include <linux/input/tps6507x-ts.h>
@@ -28,6 +27,7 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
+#include <linux/nvmem-provider.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/platform_data/gpio-davinci.h>
@@ -36,6 +36,7 @@
#include <linux/platform_data/ti-aemif.h>
#include <linux/platform_data/spi-davinci.h>
#include <linux/platform_data/uio_pruss.h>
+#include <linux/property.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/tps6507x.h>
#include <linux/regulator/fixed.h>
@@ -43,9 +44,10 @@
#include <linux/spi/flash.h>
#include <mach/common.h>
-#include "cp_intc.h"
#include <mach/da8xx.h>
#include <mach/mux.h>
+
+#include "irqs.h"
#include "sram.h"
#include <asm/mach-types.h>
@@ -100,6 +102,31 @@
},
};
+static struct nvmem_cell_info da850evm_nvmem_cells[] = {
+ {
+ .name = "macaddr",
+ .offset = 0x0,
+ .bytes = ETH_ALEN,
+ }
+};
+
+static struct nvmem_cell_table da850evm_nvmem_cell_table = {
+ /*
+ * The nvmem name differs from the partition name because of the
+ * internal works of the nvmem framework.
+ */
+ .nvmem_name = "MAC-Address0",
+ .cells = da850evm_nvmem_cells,
+ .ncells = ARRAY_SIZE(da850evm_nvmem_cells),
+};
+
+static struct nvmem_cell_lookup da850evm_nvmem_cell_lookup = {
+ .nvmem_name = "MAC-Address0",
+ .cell_name = "macaddr",
+ .dev_id = "davinci_emac.1",
+ .con_id = "mac-address",
+};
+
static struct flash_platform_data da850evm_spiflash_data = {
.name = "m25p80",
.parts = da850evm_spiflash_part,
@@ -125,32 +152,6 @@
},
};
-#ifdef CONFIG_MTD
-static void da850_evm_m25p80_notify_add(struct mtd_info *mtd)
-{
- char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
- size_t retlen;
-
- if (!strcmp(mtd->name, "MAC-Address")) {
- mtd_read(mtd, 0, ETH_ALEN, &retlen, mac_addr);
- if (retlen == ETH_ALEN)
- pr_info("Read MAC addr from SPI Flash: %pM\n",
- mac_addr);
- }
-}
-
-static struct mtd_notifier da850evm_spi_notifier = {
- .add = da850_evm_m25p80_notify_add,
-};
-
-static void da850_evm_setup_mac_addr(void)
-{
- register_mtd_user(&da850evm_spi_notifier);
-}
-#else
-static void da850_evm_setup_mac_addr(void) { }
-#endif
-
static struct mtd_partition da850_evm_norflash_partition[] = {
{
.name = "bootloaders + env",
@@ -631,13 +632,12 @@
}
}
-#define DA850_N_BB_USER_LED 2
-
static struct gpio_led da850_evm_bb_leds[] = {
- [0 ... DA850_N_BB_USER_LED - 1] = {
- .active_low = 1,
- .gpio = -1, /* assigned at runtime */
- .name = NULL, /* assigned at runtime */
+ {
+ .name = "user_led2",
+ },
+ {
+ .name = "user_led1",
},
};
@@ -646,6 +646,20 @@
.num_leds = ARRAY_SIZE(da850_evm_bb_leds),
};
+static struct gpiod_lookup_table da850_evm_bb_leds_gpio_table = {
+ .dev_id = "leds-gpio",
+ .table = {
+ GPIO_LOOKUP_IDX("i2c-bb-expander",
+ DA850_EVM_BB_EXP_USER_LED2, NULL,
+ 0, GPIO_ACTIVE_LOW),
+ GPIO_LOOKUP_IDX("i2c-bb-expander",
+ DA850_EVM_BB_EXP_USER_LED2 + 1, NULL,
+ 1, GPIO_ACTIVE_LOW),
+
+ { },
+ },
+};
+
static struct platform_device da850_evm_bb_leds_device = {
.name = "leds-gpio",
.id = -1,
@@ -654,20 +668,6 @@
}
};
-static void da850_evm_bb_leds_init(unsigned gpio)
-{
- int i;
- struct gpio_led *led;
-
- for (i = 0; i < DA850_N_BB_USER_LED; i++) {
- led = &da850_evm_bb_leds[i];
-
- led->gpio = gpio + DA850_EVM_BB_EXP_USER_LED2 + i;
- led->name =
- da850_evm_bb_exp[DA850_EVM_BB_EXP_USER_LED2 + i];
- }
-}
-
static int da850_evm_bb_expander_setup(struct i2c_client *client,
unsigned gpio, unsigned ngpio,
void *c)
@@ -685,7 +685,7 @@
goto io_exp_setup_sw_fail;
}
- da850_evm_bb_leds_init(gpio);
+ gpiod_add_lookup_table(&da850_evm_bb_leds_gpio_table);
ret = platform_device_register(&da850_evm_bb_leds_device);
if (ret) {
pr_warn("Could not register baseboard GPIO expander LEDs");
@@ -729,10 +729,12 @@
},
{
I2C_BOARD_INFO("tca6416", 0x20),
+ .dev_name = "ui-expander",
.platform_data = &da850_evm_ui_expander_info,
},
{
I2C_BOARD_INFO("tca6416", 0x21),
+ .dev_name = "bb-expander",
.platform_data = &da850_evm_bb_expander_info,
},
};
@@ -780,10 +782,11 @@
.dev_id = "da830-mmc.0",
.table = {
/* gpio chip 2 contains gpio range 64-95 */
- GPIO_LOOKUP("davinci_gpio.0", DA850_MMCSD_CD_PIN, "cd",
+ GPIO_LOOKUP("davinci_gpio", DA850_MMCSD_CD_PIN, "cd",
GPIO_ACTIVE_LOW),
- GPIO_LOOKUP("davinci_gpio.0", DA850_MMCSD_WP_PIN, "wp",
+ GPIO_LOOKUP("davinci_gpio", DA850_MMCSD_WP_PIN, "wp",
GPIO_ACTIVE_HIGH),
+ { }
},
};
@@ -800,38 +803,80 @@
-1
};
-static void da850_panel_power_ctrl(int val)
-{
- /* lcd backlight */
- gpio_set_value(DA850_LCD_BL_PIN, val);
+static struct property_entry da850_lcd_backlight_props[] = {
+ PROPERTY_ENTRY_BOOL("default-on"),
+ { }
+};
- /* lcd power */
- gpio_set_value(DA850_LCD_PWR_PIN, val);
-}
+static struct gpiod_lookup_table da850_lcd_backlight_gpio_table = {
+ .dev_id = "gpio-backlight",
+ .table = {
+ GPIO_LOOKUP("davinci_gpio", DA850_LCD_BL_PIN, NULL, 0),
+ { }
+ },
+};
+
+static const struct platform_device_info da850_lcd_backlight_info = {
+ .name = "gpio-backlight",
+ .id = PLATFORM_DEVID_NONE,
+ .properties = da850_lcd_backlight_props,
+};
+
+static struct regulator_consumer_supply da850_lcd_supplies[] = {
+ REGULATOR_SUPPLY("lcd", NULL),
+};
+
+static struct regulator_init_data da850_lcd_supply_data = {
+ .consumer_supplies = da850_lcd_supplies,
+ .num_consumer_supplies = ARRAY_SIZE(da850_lcd_supplies),
+ .constraints = {
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ },
+};
+
+static struct fixed_voltage_config da850_lcd_supply = {
+ .supply_name = "lcd",
+ .microvolts = 33000000,
+ .init_data = &da850_lcd_supply_data,
+};
+
+static struct platform_device da850_lcd_supply_device = {
+ .name = "reg-fixed-voltage",
+ .id = 1, /* Dummy fixed regulator is 0 */
+ .dev = {
+ .platform_data = &da850_lcd_supply,
+ },
+};
+
+static struct gpiod_lookup_table da850_lcd_supply_gpio_table = {
+ .dev_id = "reg-fixed-voltage.1",
+ .table = {
+ GPIO_LOOKUP("davinci_gpio", DA850_LCD_PWR_PIN, NULL, 0),
+ { }
+ },
+};
+
+static struct gpiod_lookup_table *da850_lcd_gpio_lookups[] = {
+ &da850_lcd_backlight_gpio_table,
+ &da850_lcd_supply_gpio_table,
+};
static int da850_lcd_hw_init(void)
{
+ struct platform_device *backlight;
int status;
- status = gpio_request(DA850_LCD_BL_PIN, "lcd bl");
- if (status < 0)
+ gpiod_add_lookup_tables(da850_lcd_gpio_lookups,
+ ARRAY_SIZE(da850_lcd_gpio_lookups));
+
+ backlight = platform_device_register_full(&da850_lcd_backlight_info);
+ if (IS_ERR(backlight))
+ return PTR_ERR(backlight);
+
+ status = platform_device_register(&da850_lcd_supply_device);
+ if (status)
return status;
- status = gpio_request(DA850_LCD_PWR_PIN, "lcd pwr");
- if (status < 0) {
- gpio_free(DA850_LCD_BL_PIN);
- return status;
- }
-
- gpio_direction_output(DA850_LCD_BL_PIN, 0);
- gpio_direction_output(DA850_LCD_PWR_PIN, 0);
-
- /* Switch off panel power and backlight */
- da850_panel_power_ctrl(0);
-
- /* Switch on panel power and backlight */
- da850_panel_power_ctrl(1);
-
return 0;
}
@@ -1039,6 +1084,17 @@
-1
};
+static struct gpiod_hog da850_evm_emac_gpio_hogs[] = {
+ {
+ .chip_label = "davinci_gpio",
+ .chip_hwnum = DA850_MII_MDIO_CLKEN_PIN,
+ .line_name = "mdio_clk_en",
+ .lflags = 0,
+ /* dflags set in da850_evm_config_emac() */
+ },
+ { }
+};
+
static int __init da850_evm_config_emac(void)
{
void __iomem *cfg_chip3_base;
@@ -1077,14 +1133,9 @@
if (ret)
pr_warn("%s:GPIO(2,6) mux setup failed\n", __func__);
- ret = gpio_request(DA850_MII_MDIO_CLKEN_PIN, "mdio_clk_en");
- if (ret) {
- pr_warn("Cannot open GPIO %d\n", DA850_MII_MDIO_CLKEN_PIN);
- return ret;
- }
-
- /* Enable/Disable MII MDIO clock */
- gpio_direction_output(DA850_MII_MDIO_CLKEN_PIN, rmii_en);
+ da850_evm_emac_gpio_hogs[0].dflags = rmii_en ? GPIOD_OUT_HIGH
+ : GPIOD_OUT_LOW;
+ gpiod_add_hogs(da850_evm_emac_gpio_hogs);
soc_info->emac_pdata->phy_id = DA850_EVM_PHY_ID;
@@ -1395,6 +1446,9 @@
davinci_serial_init(da8xx_serial_device);
+ nvmem_add_cell_table(&da850evm_nvmem_cell_table);
+ nvmem_add_cell_lookups(&da850evm_nvmem_cell_lookup, 1);
+
i2c_register_board_info(1, da850_evm_i2c_devices,
ARRAY_SIZE(da850_evm_i2c_devices));
@@ -1432,7 +1486,6 @@
if (ret)
pr_warn("%s: LCD initialization failed: %d\n", __func__, ret);
- sharp_lk043t1dg01_pdata.panel_power_ctrl = da850_panel_power_ctrl,
ret = da8xx_register_lcdc(&sharp_lk043t1dg01_pdata);
if (ret)
pr_warn("%s: LCDC registration failed: %d\n", __func__, ret);
@@ -1466,12 +1519,12 @@
if (ret)
pr_warn("%s: SATA registration failed: %d\n", __func__, ret);
- da850_evm_setup_mac_addr();
-
ret = da8xx_register_rproc();
if (ret)
pr_warn("%s: dsp/rproc registration failed: %d\n",
__func__, ret);
+
+ regulator_has_full_constraints();
}
#ifdef CONFIG_SERIAL_8250_CONSOLE
@@ -1493,7 +1546,7 @@
MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
.atag_offset = 0x100,
.map_io = da850_evm_map_io,
- .init_irq = cp_intc_init,
+ .init_irq = da850_init_irq,
.init_time = da850_init_time,
.init_machine = da850_evm_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-dm355-evm.c b/arch/arm/mach-davinci/board-dm355-evm.c
index f53a461..5113273 100644
--- a/arch/arm/mach-davinci/board-dm355-evm.c
+++ b/arch/arm/mach-davinci/board-dm355-evm.c
@@ -117,10 +117,11 @@
static struct gpiod_lookup_table i2c_recovery_gpiod_table = {
.dev_id = "i2c_davinci.1",
.table = {
- GPIO_LOOKUP("davinci_gpio.0", DM355_I2C_SDA_PIN, "sda",
+ GPIO_LOOKUP("davinci_gpio", DM355_I2C_SDA_PIN, "sda",
GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
- GPIO_LOOKUP("davinci_gpio.0", DM355_I2C_SCL_PIN, "scl",
+ GPIO_LOOKUP("davinci_gpio", DM355_I2C_SCL_PIN, "scl",
GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ { }
},
};
@@ -438,7 +439,7 @@
MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
.atag_offset = 0x100,
.map_io = dm355_evm_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm355_init_irq,
.init_time = dm355_init_time,
.init_machine = dm355_evm_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-dm355-leopard.c b/arch/arm/mach-davinci/board-dm355-leopard.c
index 0fdf1d0..b9e9950 100644
--- a/arch/arm/mach-davinci/board-dm355-leopard.c
+++ b/arch/arm/mach-davinci/board-dm355-leopard.c
@@ -273,7 +273,7 @@
MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")
.atag_offset = 0x100,
.map_io = dm355_leopard_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm355_init_irq,
.init_time = dm355_init_time,
.init_machine = dm355_leopard_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-dm365-evm.c b/arch/arm/mach-davinci/board-dm365-evm.c
index 8143756..150a36f 100644
--- a/arch/arm/mach-davinci/board-dm365-evm.c
+++ b/arch/arm/mach-davinci/board-dm365-evm.c
@@ -18,12 +18,13 @@
#include <linux/i2c.h>
#include <linux/io.h>
#include <linux/clk.h>
-#include <linux/platform_data/at24.h>
+#include <linux/property.h>
#include <linux/leds.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/slab.h>
#include <linux/mtd/rawnand.h>
+#include <linux/nvmem-provider.h>
#include <linux/input.h>
#include <linux/spi/spi.h>
#include <linux/spi/eeprom.h>
@@ -203,18 +204,36 @@
.num_resources = ARRAY_SIZE(davinci_aemif_resources),
};
-static struct at24_platform_data eeprom_info = {
- .byte_len = (256*1024) / 8,
- .page_size = 64,
- .flags = AT24_FLAG_ADDR16,
- .setup = davinci_get_mac_addr,
- .context = (void *)0x7f00,
+static struct nvmem_cell_info davinci_nvmem_cells[] = {
+ {
+ .name = "macaddr",
+ .offset = 0x7f00,
+ .bytes = ETH_ALEN,
+ }
+};
+
+static struct nvmem_cell_table davinci_nvmem_cell_table = {
+ .nvmem_name = "1-00500",
+ .cells = davinci_nvmem_cells,
+ .ncells = ARRAY_SIZE(davinci_nvmem_cells),
+};
+
+static struct nvmem_cell_lookup davinci_nvmem_cell_lookup = {
+ .nvmem_name = "1-00500",
+ .cell_name = "macaddr",
+ .dev_id = "davinci_emac.1",
+ .con_id = "mac-address",
+};
+
+static const struct property_entry eeprom_properties[] = {
+ PROPERTY_ENTRY_U32("pagesize", 64),
+ { }
};
static struct i2c_board_info i2c_info[] = {
{
I2C_BOARD_INFO("24c256", 0x50),
- .platform_data = &eeprom_info,
+ .properties = eeprom_properties,
},
{
I2C_BOARD_INFO("tlv320aic3x", 0x18),
@@ -781,6 +800,9 @@
if (ret)
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
+ nvmem_add_cell_table(&davinci_nvmem_cell_table);
+ nvmem_add_cell_lookups(&davinci_nvmem_cell_lookup, 1);
+
evm_init_i2c();
davinci_serial_init(dm365_serial_device);
@@ -794,9 +816,9 @@
/* maybe setup mmc1/etc ... _after_ mmc0 */
evm_init_cpld();
-#ifdef CONFIG_SND_DM365_AIC3X_CODEC
+#ifdef CONFIG_SND_SOC_DM365_AIC3X_CODEC
dm365_init_asp();
-#elif defined(CONFIG_SND_DM365_VOICE_CODEC)
+#elif defined(CONFIG_SND_SOC_DM365_VOICE_CODEC)
dm365_init_vc();
#endif
dm365_init_rtc();
@@ -809,7 +831,7 @@
MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
.atag_offset = 0x100,
.map_io = dm365_evm_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm365_init_irq,
.init_time = dm365_init_time,
.init_machine = dm365_evm_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-dm644x-evm.c b/arch/arm/mach-davinci/board-dm644x-evm.c
index e4a8f92..9d87d4e 100644
--- a/arch/arm/mach-davinci/board-dm644x-evm.c
+++ b/arch/arm/mach-davinci/board-dm644x-evm.c
@@ -16,12 +16,13 @@
#include <linux/gpio/machine.h>
#include <linux/i2c.h>
#include <linux/platform_data/pcf857x.h>
-#include <linux/platform_data/at24.h>
#include <linux/platform_data/gpio-davinci.h>
+#include <linux/property.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
+#include <linux/nvmem-provider.h>
#include <linux/phy.h>
#include <linux/clk.h>
#include <linux/videodev2.h>
@@ -35,9 +36,10 @@
#include <asm/mach/arch.h>
#include <mach/common.h>
-#include <linux/platform_data/i2c-davinci.h>
-#include <mach/serial.h>
#include <mach/mux.h>
+#include <mach/serial.h>
+
+#include <linux/platform_data/i2c-davinci.h>
#include <linux/platform_data/mtd-davinci.h>
#include <linux/platform_data/mmc-davinci.h>
#include <linux/platform_data/usb-davinci.h>
@@ -45,6 +47,7 @@
#include <linux/platform_data/ti-aemif.h>
#include "davinci.h"
+#include "irqs.h"
#define DM644X_EVM_PHY_ID "davinci_mdio-0:01"
#define LXT971_PHY_ID (0x001378e2)
@@ -510,12 +513,30 @@
* - ... newer boards may have more
*/
-static struct at24_platform_data eeprom_info = {
- .byte_len = (256*1024) / 8,
- .page_size = 64,
- .flags = AT24_FLAG_ADDR16,
- .setup = davinci_get_mac_addr,
- .context = (void *)0x7f00,
+static struct nvmem_cell_info dm644evm_nvmem_cells[] = {
+ {
+ .name = "macaddr",
+ .offset = 0x7f00,
+ .bytes = ETH_ALEN,
+ }
+};
+
+static struct nvmem_cell_table dm644evm_nvmem_cell_table = {
+ .nvmem_name = "1-00500",
+ .cells = dm644evm_nvmem_cells,
+ .ncells = ARRAY_SIZE(dm644evm_nvmem_cells),
+};
+
+static struct nvmem_cell_lookup dm644evm_nvmem_cell_lookup = {
+ .nvmem_name = "1-00500",
+ .cell_name = "macaddr",
+ .dev_id = "davinci_emac.1",
+ .con_id = "mac-address",
+};
+
+static const struct property_entry eeprom_properties[] = {
+ PROPERTY_ENTRY_U32("pagesize", 64),
+ { }
};
/*
@@ -625,7 +646,7 @@
},
{
I2C_BOARD_INFO("24c256", 0x50),
- .platform_data = &eeprom_info,
+ .properties = eeprom_properties,
},
{
I2C_BOARD_INFO("tlv320aic33", 0x1b),
@@ -638,10 +659,11 @@
static struct gpiod_lookup_table i2c_recovery_gpiod_table = {
.dev_id = "i2c_davinci.1",
.table = {
- GPIO_LOOKUP("davinci_gpio.0", DM644X_I2C_SDA_PIN, "sda",
+ GPIO_LOOKUP("davinci_gpio", DM644X_I2C_SDA_PIN, "sda",
GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
- GPIO_LOOKUP("davinci_gpio.0", DM644X_I2C_SCL_PIN, "scl",
+ GPIO_LOOKUP("davinci_gpio", DM644X_I2C_SCL_PIN, "scl",
GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
+ { }
},
};
@@ -842,6 +864,8 @@
platform_add_devices(davinci_evm_devices,
ARRAY_SIZE(davinci_evm_devices));
#ifdef CONFIG_I2C
+ nvmem_add_cell_table(&dm644evm_nvmem_cell_table);
+ nvmem_add_cell_lookups(&dm644evm_nvmem_cell_lookup, 1);
evm_init_i2c();
davinci_setup_mmc(0, &dm6446evm_mmc_config);
#endif
@@ -865,7 +889,7 @@
/* Maintainer: MontaVista Software <source@mvista.com> */
.atag_offset = 0x100,
.map_io = davinci_evm_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm644x_init_irq,
.init_time = dm644x_init_time,
.init_machine = davinci_evm_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-dm646x-evm.c b/arch/arm/mach-davinci/board-dm646x-evm.c
index 3e5ee09..4600b61 100644
--- a/arch/arm/mach-davinci/board-dm646x-evm.c
+++ b/arch/arm/mach-davinci/board-dm646x-evm.c
@@ -22,7 +22,7 @@
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
-#include <linux/platform_data/at24.h>
+#include <linux/property.h>
#include <linux/platform_data/pcf857x.h>
#include <linux/platform_data/ti-aemif.h>
@@ -32,6 +32,7 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
+#include <linux/nvmem-provider.h>
#include <linux/clk.h>
#include <linux/export.h>
#include <linux/platform_data/gpio-davinci.h>
@@ -43,10 +44,10 @@
#include <asm/mach/arch.h>
#include <mach/common.h>
-#include <mach/irqs.h>
#include <mach/serial.h>
#include "davinci.h"
+#include "irqs.h"
#define NAND_BLOCK_SIZE SZ_128K
@@ -342,12 +343,30 @@
* - ... newer boards may have more
*/
-static struct at24_platform_data eeprom_info = {
- .byte_len = (256*1024) / 8,
- .page_size = 64,
- .flags = AT24_FLAG_ADDR16,
- .setup = davinci_get_mac_addr,
- .context = (void *)0x7f00,
+static struct nvmem_cell_info dm646x_evm_nvmem_cells[] = {
+ {
+ .name = "macaddr",
+ .offset = 0x7f00,
+ .bytes = ETH_ALEN,
+ }
+};
+
+static struct nvmem_cell_table dm646x_evm_nvmem_cell_table = {
+ .nvmem_name = "1-00500",
+ .cells = dm646x_evm_nvmem_cells,
+ .ncells = ARRAY_SIZE(dm646x_evm_nvmem_cells),
+};
+
+static struct nvmem_cell_lookup dm646x_evm_nvmem_cell_lookup = {
+ .nvmem_name = "1-00500",
+ .cell_name = "macaddr",
+ .dev_id = "davinci_emac.1",
+ .con_id = "mac-address",
+};
+
+static const struct property_entry eeprom_properties[] = {
+ PROPERTY_ENTRY_U32("pagesize", 64),
+ { }
};
#endif
@@ -418,7 +437,7 @@
static struct i2c_board_info __initdata i2c_info[] = {
{
I2C_BOARD_INFO("24c256", 0x50),
- .platform_data = &eeprom_info,
+ .properties = eeprom_properties,
},
{
I2C_BOARD_INFO("pcf8574a", 0x38),
@@ -815,6 +834,8 @@
pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
#ifdef CONFIG_I2C
+ nvmem_add_cell_table(&dm646x_evm_nvmem_cell_table);
+ nvmem_add_cell_lookups(&dm646x_evm_nvmem_cell_lookup, 1);
evm_init_i2c();
#endif
@@ -839,7 +860,7 @@
MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
.atag_offset = 0x100,
.map_io = davinci_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm646x_init_irq,
.init_time = dm646x_evm_init_time,
.init_machine = evm_init,
.init_late = davinci_init_late,
@@ -849,7 +870,7 @@
MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
.atag_offset = 0x100,
.map_io = davinci_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm646x_init_irq,
.init_time = dm6467t_evm_init_time,
.init_machine = evm_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-mityomapl138.c b/arch/arm/mach-davinci/board-mityomapl138.c
index 2933e0c..dfce421 100644
--- a/arch/arm/mach-davinci/board-mityomapl138.c
+++ b/arch/arm/mach-davinci/board-mityomapl138.c
@@ -14,10 +14,13 @@
#include <linux/init.h>
#include <linux/console.h>
#include <linux/platform_device.h>
+#include <linux/property.h>
#include <linux/mtd/partitions.h>
+#include <linux/notifier.h>
+#include <linux/nvmem-consumer.h>
+#include <linux/nvmem-provider.h>
#include <linux/regulator/machine.h>
#include <linux/i2c.h>
-#include <linux/platform_data/at24.h>
#include <linux/etherdevice.h>
#include <linux/spi/spi.h>
#include <linux/spi/flash.h>
@@ -26,7 +29,6 @@
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/common.h>
-#include "cp_intc.h"
#include <mach/da8xx.h>
#include <linux/platform_data/mtd-davinci.h>
#include <linux/platform_data/mtd-davinci-aemif.h>
@@ -116,11 +118,15 @@
static void mityomapl138_cpufreq_init(const char *partnum) { }
#endif
-static void read_factory_config(struct nvmem_device *nvmem, void *context)
+static int read_factory_config(struct notifier_block *nb,
+ unsigned long event, void *data)
{
int ret;
const char *partnum = NULL;
- struct davinci_soc_info *soc_info = &davinci_soc_info;
+ struct nvmem_device *nvmem = data;
+
+ if (strcmp(nvmem_dev_name(nvmem), "1-00500") != 0)
+ return NOTIFY_DONE;
if (!IS_BUILTIN(CONFIG_NVMEM)) {
pr_warn("Factory Config not available without CONFIG_NVMEM\n");
@@ -146,27 +152,49 @@
goto bad_config;
}
- pr_info("Found MAC = %pM\n", factory_config.mac);
- if (is_valid_ether_addr(factory_config.mac))
- memcpy(soc_info->emac_pdata->mac_addr,
- factory_config.mac, ETH_ALEN);
- else
- pr_warn("Invalid MAC found in factory config block\n");
-
partnum = factory_config.partnum;
pr_info("Part Number = %s\n", partnum);
bad_config:
/* default maximum speed is valid for all platforms */
mityomapl138_cpufreq_init(partnum);
+
+ return NOTIFY_STOP;
}
-static struct at24_platform_data mityomapl138_fd_chip = {
- .byte_len = 256,
- .page_size = 8,
- .flags = AT24_FLAG_READONLY | AT24_FLAG_IRUGO,
- .setup = read_factory_config,
- .context = NULL,
+static struct notifier_block mityomapl138_nvmem_notifier = {
+ .notifier_call = read_factory_config,
+};
+
+/*
+ * We don't define a cell for factory config as it will be accessed from the
+ * board file using the nvmem notifier chain.
+ */
+static struct nvmem_cell_info mityomapl138_nvmem_cells[] = {
+ {
+ .name = "macaddr",
+ .offset = 0x64,
+ .bytes = ETH_ALEN,
+ }
+};
+
+static struct nvmem_cell_table mityomapl138_nvmem_cell_table = {
+ .nvmem_name = "1-00500",
+ .cells = mityomapl138_nvmem_cells,
+ .ncells = ARRAY_SIZE(mityomapl138_nvmem_cells),
+};
+
+static struct nvmem_cell_lookup mityomapl138_nvmem_cell_lookup = {
+ .nvmem_name = "1-00500",
+ .cell_name = "macaddr",
+ .dev_id = "davinci_emac.1",
+ .con_id = "mac-address",
+};
+
+static const struct property_entry mityomapl138_fd_chip_properties[] = {
+ PROPERTY_ENTRY_U32("pagesize", 8),
+ PROPERTY_ENTRY_BOOL("read-only"),
+ { }
};
static struct davinci_i2c_platform_data mityomap_i2c_0_pdata = {
@@ -295,7 +323,7 @@
},
{
I2C_BOARD_INFO("24c02", 0x50),
- .platform_data = &mityomapl138_fd_chip,
+ .properties = mityomapl138_fd_chip_properties,
},
};
@@ -543,6 +571,10 @@
davinci_serial_init(da8xx_serial_device);
+ nvmem_register_notifier(&mityomapl138_nvmem_notifier);
+ nvmem_add_cell_table(&mityomapl138_nvmem_cell_table);
+ nvmem_add_cell_lookups(&mityomapl138_nvmem_cell_lookup, 1);
+
ret = da8xx_register_i2c(0, &mityomap_i2c_0_pdata);
if (ret)
pr_warn("i2c0 registration failed: %d\n", ret);
@@ -595,7 +627,7 @@
MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")
.atag_offset = 0x100,
.map_io = mityomapl138_map_io,
- .init_irq = cp_intc_init,
+ .init_irq = da850_init_irq,
.init_time = da850_init_time,
.init_machine = mityomapl138_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-neuros-osd2.c b/arch/arm/mach-davinci/board-neuros-osd2.c
index 353f9e5..ce99f78 100644
--- a/arch/arm/mach-davinci/board-neuros-osd2.c
+++ b/arch/arm/mach-davinci/board-neuros-osd2.c
@@ -130,10 +130,10 @@
};
static const struct gpio_led ntosd2_leds[] = {
- { .name = "led1_green", .gpio = GPIO(10), },
- { .name = "led1_red", .gpio = GPIO(11), },
- { .name = "led2_green", .gpio = GPIO(12), },
- { .name = "led2_red", .gpio = GPIO(13), },
+ { .name = "led1_green", .gpio = 10, },
+ { .name = "led1_red", .gpio = 11, },
+ { .name = "led2_green", .gpio = 12, },
+ { .name = "led2_red", .gpio = 13, },
};
static struct gpio_led_platform_data ntosd2_leds_data = {
@@ -231,7 +231,7 @@
/* Maintainer: Neuros Technologies <neuros@groups.google.com> */
.atag_offset = 0x100,
.map_io = davinci_ntosd2_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm644x_init_irq,
.init_time = dm644x_init_time,
.init_machine = davinci_ntosd2_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-omapl138-hawk.c b/arch/arm/mach-davinci/board-omapl138-hawk.c
index 8e8d51f..5390a86 100644
--- a/arch/arm/mach-davinci/board-omapl138-hawk.c
+++ b/arch/arm/mach-davinci/board-omapl138-hawk.c
@@ -21,13 +21,13 @@
#include <linux/platform_data/mtd-davinci.h>
#include <linux/platform_data/mtd-davinci-aemif.h>
#include <linux/platform_data/ti-aemif.h>
+#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <mach/common.h>
-#include "cp_intc.h"
#include <mach/da8xx.h>
#include <mach/mux.h>
@@ -134,9 +134,9 @@
static struct gpiod_lookup_table mmc_gpios_table = {
.dev_id = "da830-mmc.0",
.table = {
- GPIO_LOOKUP("davinci_gpio.0", DA850_HAWK_MMCSD_CD_PIN, "cd",
+ GPIO_LOOKUP("davinci_gpio", DA850_HAWK_MMCSD_CD_PIN, "cd",
GPIO_ACTIVE_LOW),
- GPIO_LOOKUP("davinci_gpio.0", DA850_HAWK_MMCSD_WP_PIN, "wp",
+ GPIO_LOOKUP("davinci_gpio", DA850_HAWK_MMCSD_WP_PIN, "wp",
GPIO_ACTIVE_LOW),
},
};
@@ -294,66 +294,63 @@
return platform_device_register(&omapl138_hawk_aemif_device);
}
-static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id);
-static da8xx_ocic_handler_t hawk_usb_ocic_handler;
-
static const short da850_hawk_usb11_pins[] = {
DA850_GPIO2_4, DA850_GPIO6_13,
-1
};
-static int hawk_usb_set_power(unsigned port, int on)
-{
- gpio_set_value(DA850_USB1_VBUS_PIN, on);
- return 0;
-}
+static struct regulator_consumer_supply hawk_usb_supplies[] = {
+ REGULATOR_SUPPLY("vbus", NULL),
+};
-static int hawk_usb_get_power(unsigned port)
-{
- return gpio_get_value(DA850_USB1_VBUS_PIN);
-}
+static struct regulator_init_data hawk_usb_vbus_data = {
+ .consumer_supplies = hawk_usb_supplies,
+ .num_consumer_supplies = ARRAY_SIZE(hawk_usb_supplies),
+ .constraints = {
+ .valid_ops_mask = REGULATOR_CHANGE_STATUS,
+ },
+};
-static int hawk_usb_get_oci(unsigned port)
-{
- return !gpio_get_value(DA850_USB1_OC_PIN);
-}
+static struct fixed_voltage_config hawk_usb_vbus = {
+ .supply_name = "vbus",
+ .microvolts = 3300000,
+ .init_data = &hawk_usb_vbus_data,
+};
-static int hawk_usb_ocic_notify(da8xx_ocic_handler_t handler)
-{
- int irq = gpio_to_irq(DA850_USB1_OC_PIN);
- int error = 0;
+static struct platform_device hawk_usb_vbus_device = {
+ .name = "reg-fixed-voltage",
+ .id = 0,
+ .dev = {
+ .platform_data = &hawk_usb_vbus,
+ },
+};
- if (handler != NULL) {
- hawk_usb_ocic_handler = handler;
+static struct gpiod_lookup_table hawk_usb_oc_gpio_lookup = {
+ .dev_id = "ohci-da8xx",
+ .table = {
+ GPIO_LOOKUP("davinci_gpio", DA850_USB1_OC_PIN, "oc", 0),
+ { }
+ },
+};
- error = request_irq(irq, omapl138_hawk_usb_ocic_irq,
- IRQF_TRIGGER_RISING |
- IRQF_TRIGGER_FALLING,
- "OHCI over-current indicator", NULL);
- if (error)
- pr_err("%s: could not request IRQ to watch "
- "over-current indicator changes\n", __func__);
- } else {
- free_irq(irq, NULL);
- }
- return error;
-}
+static struct gpiod_lookup_table hawk_usb_vbus_gpio_lookup = {
+ .dev_id = "reg-fixed-voltage.0",
+ .table = {
+ GPIO_LOOKUP("davinci_gpio", DA850_USB1_VBUS_PIN, NULL, 0),
+ { }
+ },
+};
+
+static struct gpiod_lookup_table *hawk_usb_gpio_lookups[] = {
+ &hawk_usb_oc_gpio_lookup,
+ &hawk_usb_vbus_gpio_lookup,
+};
static struct da8xx_ohci_root_hub omapl138_hawk_usb11_pdata = {
- .set_power = hawk_usb_set_power,
- .get_power = hawk_usb_get_power,
- .get_oci = hawk_usb_get_oci,
- .ocic_notify = hawk_usb_ocic_notify,
/* TPS2087 switch @ 5V */
.potpgt = (3 + 1) / 2, /* 3 ms max */
};
-static irqreturn_t omapl138_hawk_usb_ocic_irq(int irq, void *dev_id)
-{
- hawk_usb_ocic_handler(&omapl138_hawk_usb11_pdata, 1);
- return IRQ_HANDLED;
-}
-
static __init void omapl138_hawk_usb_init(void)
{
int ret;
@@ -369,39 +366,25 @@
pr_warn("%s: USB PHY CLK registration failed: %d\n",
__func__, ret);
+ gpiod_add_lookup_tables(hawk_usb_gpio_lookups,
+ ARRAY_SIZE(hawk_usb_gpio_lookups));
+
ret = da8xx_register_usb_phy();
if (ret)
pr_warn("%s: USB PHY registration failed: %d\n",
__func__, ret);
- ret = gpio_request_one(DA850_USB1_VBUS_PIN,
- GPIOF_DIR_OUT, "USB1 VBUS");
- if (ret < 0) {
- pr_err("%s: failed to request GPIO for USB 1.1 port "
- "power control: %d\n", __func__, ret);
+ ret = platform_device_register(&hawk_usb_vbus_device);
+ if (ret) {
+ pr_warn("%s: Unable to register the vbus supply\n", __func__);
return;
}
- ret = gpio_request_one(DA850_USB1_OC_PIN,
- GPIOF_DIR_IN, "USB1 OC");
- if (ret < 0) {
- pr_err("%s: failed to request GPIO for USB 1.1 port "
- "over-current indicator: %d\n", __func__, ret);
- goto usb11_setup_oc_fail;
- }
-
ret = da8xx_register_usb11(&omapl138_hawk_usb11_pdata);
- if (ret) {
+ if (ret)
pr_warn("%s: USB 1.1 registration failed: %d\n", __func__, ret);
- goto usb11_setup_fail;
- }
return;
-
-usb11_setup_fail:
- gpio_free(DA850_USB1_OC_PIN);
-usb11_setup_oc_fail:
- gpio_free(DA850_USB1_VBUS_PIN);
}
static __init void omapl138_hawk_init(void)
@@ -462,7 +445,7 @@
MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
.atag_offset = 0x100,
.map_io = omapl138_hawk_map_io,
- .init_irq = cp_intc_init,
+ .init_irq = da850_init_irq,
.init_time = da850_init_time,
.init_machine = omapl138_hawk_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/board-sffsdr.c b/arch/arm/mach-davinci/board-sffsdr.c
index 792bb84..79b4795 100644
--- a/arch/arm/mach-davinci/board-sffsdr.c
+++ b/arch/arm/mach-davinci/board-sffsdr.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Lyrtech SFFSDR board support.
*
@@ -7,26 +8,12 @@
* Based on DV-EVM platform, original copyright follows:
*
* Copyright (C) 2007 MontaVista Software, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
-#include <linux/platform_data/at24.h>
+#include <linux/property.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/partitions.h>
@@ -92,16 +79,15 @@
.resource = davinci_sffsdr_nandflash_resource,
};
-static struct at24_platform_data eeprom_info = {
- .byte_len = (64*1024) / 8,
- .page_size = 32,
- .flags = AT24_FLAG_ADDR16,
+static const struct property_entry eeprom_properties[] = {
+ PROPERTY_ENTRY_U32("pagesize", 32),
+ { }
};
static struct i2c_board_info __initdata i2c_info[] = {
{
- I2C_BOARD_INFO("24lc64", 0x50),
- .platform_data = &eeprom_info,
+ I2C_BOARD_INFO("24c64", 0x50),
+ .properties = eeprom_properties,
},
/* Other I2C devices:
* MSP430, addr 0x23 (not used)
@@ -153,7 +139,7 @@
MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
.atag_offset = 0x100,
.map_io = davinci_sffsdr_map_io,
- .init_irq = davinci_irq_init,
+ .init_irq = dm644x_init_irq,
.init_time = dm644x_init_time,
.init_machine = davinci_sffsdr_init,
.init_late = davinci_init_late,
diff --git a/arch/arm/mach-davinci/clock.h b/arch/arm/mach-davinci/clock.h
index 3073834..54f5663 100644
--- a/arch/arm/mach-davinci/clock.h
+++ b/arch/arm/mach-davinci/clock.h
@@ -1,12 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
/*
* TI DaVinci clock definitions
*
* Copyright (C) 2006-2007 Texas Instruments.
* Copyright (C) 2008-2009 Deep Root Systems, LLC
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef __ARCH_ARM_DAVINCI_CLOCK_H
diff --git a/arch/arm/mach-davinci/common.c b/arch/arm/mach-davinci/common.c
index e1d0f0d..ae61d19 100644
--- a/arch/arm/mach-davinci/common.c
+++ b/arch/arm/mach-davinci/common.c
@@ -23,24 +23,6 @@
struct davinci_soc_info davinci_soc_info;
EXPORT_SYMBOL(davinci_soc_info);
-void __iomem *davinci_intc_base;
-int davinci_intc_type;
-
-void davinci_get_mac_addr(struct nvmem_device *nvmem, void *context)
-{
- char *mac_addr = davinci_soc_info.emac_pdata->mac_addr;
- off_t offset = (off_t)context;
-
- if (!IS_BUILTIN(CONFIG_NVMEM)) {
- pr_warn("Cannot read MAC addr from EEPROM without CONFIG_NVMEM\n");
- return;
- }
-
- /* Read MAC addr from EEPROM */
- if (nvmem_device_read(nvmem, offset, ETH_ALEN, mac_addr) == ETH_ALEN)
- pr_info("Read MAC addr from EEPROM: %pM\n", mac_addr);
-}
-
static int __init davinci_init_id(struct davinci_soc_info *soc_info)
{
int i;
diff --git a/arch/arm/mach-davinci/cp_intc.c b/arch/arm/mach-davinci/cp_intc.c
deleted file mode 100644
index 94085d2..0000000
--- a/arch/arm/mach-davinci/cp_intc.c
+++ /dev/null
@@ -1,215 +0,0 @@
-/*
- * TI Common Platform Interrupt Controller (cp_intc) driver
- *
- * Author: Steve Chen <schen@mvista.com>
- * Copyright (C) 2008-2009, MontaVista Software, Inc. <source@mvista.com>
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-
-#include <linux/export.h>
-#include <linux/init.h>
-#include <linux/irq.h>
-#include <linux/irqchip.h>
-#include <linux/irqdomain.h>
-#include <linux/io.h>
-#include <linux/of.h>
-#include <linux/of_address.h>
-#include <linux/of_irq.h>
-
-#include <mach/common.h>
-#include "cp_intc.h"
-
-static inline unsigned int cp_intc_read(unsigned offset)
-{
- return __raw_readl(davinci_intc_base + offset);
-}
-
-static inline void cp_intc_write(unsigned long value, unsigned offset)
-{
- __raw_writel(value, davinci_intc_base + offset);
-}
-
-static void cp_intc_ack_irq(struct irq_data *d)
-{
- cp_intc_write(d->hwirq, CP_INTC_SYS_STAT_IDX_CLR);
-}
-
-/* Disable interrupt */
-static void cp_intc_mask_irq(struct irq_data *d)
-{
- /* XXX don't know why we need to disable nIRQ here... */
- cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_CLR);
- cp_intc_write(d->hwirq, CP_INTC_SYS_ENABLE_IDX_CLR);
- cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_SET);
-}
-
-/* Enable interrupt */
-static void cp_intc_unmask_irq(struct irq_data *d)
-{
- cp_intc_write(d->hwirq, CP_INTC_SYS_ENABLE_IDX_SET);
-}
-
-static int cp_intc_set_irq_type(struct irq_data *d, unsigned int flow_type)
-{
- unsigned reg = BIT_WORD(d->hwirq);
- unsigned mask = BIT_MASK(d->hwirq);
- unsigned polarity = cp_intc_read(CP_INTC_SYS_POLARITY(reg));
- unsigned type = cp_intc_read(CP_INTC_SYS_TYPE(reg));
-
- switch (flow_type) {
- case IRQ_TYPE_EDGE_RISING:
- polarity |= mask;
- type |= mask;
- break;
- case IRQ_TYPE_EDGE_FALLING:
- polarity &= ~mask;
- type |= mask;
- break;
- case IRQ_TYPE_LEVEL_HIGH:
- polarity |= mask;
- type &= ~mask;
- break;
- case IRQ_TYPE_LEVEL_LOW:
- polarity &= ~mask;
- type &= ~mask;
- break;
- default:
- return -EINVAL;
- }
-
- cp_intc_write(polarity, CP_INTC_SYS_POLARITY(reg));
- cp_intc_write(type, CP_INTC_SYS_TYPE(reg));
-
- return 0;
-}
-
-static struct irq_chip cp_intc_irq_chip = {
- .name = "cp_intc",
- .irq_ack = cp_intc_ack_irq,
- .irq_mask = cp_intc_mask_irq,
- .irq_unmask = cp_intc_unmask_irq,
- .irq_set_type = cp_intc_set_irq_type,
- .flags = IRQCHIP_SKIP_SET_WAKE,
-};
-
-static struct irq_domain *cp_intc_domain;
-
-static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
- irq_hw_number_t hw)
-{
- pr_debug("cp_intc_host_map(%d, 0x%lx)\n", virq, hw);
-
- irq_set_chip(virq, &cp_intc_irq_chip);
- irq_set_probe(virq);
- irq_set_handler(virq, handle_edge_irq);
- return 0;
-}
-
-static const struct irq_domain_ops cp_intc_host_ops = {
- .map = cp_intc_host_map,
- .xlate = irq_domain_xlate_onetwocell,
-};
-
-int __init cp_intc_of_init(struct device_node *node, struct device_node *parent)
-{
- u32 num_irq = davinci_soc_info.intc_irq_num;
- u8 *irq_prio = davinci_soc_info.intc_irq_prios;
- u32 *host_map = davinci_soc_info.intc_host_map;
- unsigned num_reg = BITS_TO_LONGS(num_irq);
- int i, irq_base;
-
- davinci_intc_type = DAVINCI_INTC_TYPE_CP_INTC;
- if (node) {
- davinci_intc_base = of_iomap(node, 0);
- if (of_property_read_u32(node, "ti,intc-size", &num_irq))
- pr_warn("unable to get intc-size, default to %d\n",
- num_irq);
- } else {
- davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
- }
- if (WARN_ON(!davinci_intc_base))
- return -EINVAL;
-
- cp_intc_write(0, CP_INTC_GLOBAL_ENABLE);
-
- /* Disable all host interrupts */
- cp_intc_write(0, CP_INTC_HOST_ENABLE(0));
-
- /* Disable system interrupts */
- for (i = 0; i < num_reg; i++)
- cp_intc_write(~0, CP_INTC_SYS_ENABLE_CLR(i));
-
- /* Set to normal mode, no nesting, no priority hold */
- cp_intc_write(0, CP_INTC_CTRL);
- cp_intc_write(0, CP_INTC_HOST_CTRL);
-
- /* Clear system interrupt status */
- for (i = 0; i < num_reg; i++)
- cp_intc_write(~0, CP_INTC_SYS_STAT_CLR(i));
-
- /* Enable nIRQ (what about nFIQ?) */
- cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_SET);
-
- /*
- * Priority is determined by host channel: lower channel number has
- * higher priority i.e. channel 0 has highest priority and channel 31
- * had the lowest priority.
- */
- num_reg = (num_irq + 3) >> 2; /* 4 channels per register */
- if (irq_prio) {
- unsigned j, k;
- u32 val;
-
- for (k = i = 0; i < num_reg; i++) {
- for (val = j = 0; j < 4; j++, k++) {
- val >>= 8;
- if (k < num_irq)
- val |= irq_prio[k] << 24;
- }
-
- cp_intc_write(val, CP_INTC_CHAN_MAP(i));
- }
- } else {
- /*
- * Default everything to channel 15 if priority not specified.
- * Note that channel 0-1 are mapped to nFIQ and channels 2-31
- * are mapped to nIRQ.
- */
- for (i = 0; i < num_reg; i++)
- cp_intc_write(0x0f0f0f0f, CP_INTC_CHAN_MAP(i));
- }
-
- if (host_map)
- for (i = 0; host_map[i] != -1; i++)
- cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
-
- irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
- if (irq_base < 0) {
- pr_warn("Couldn't allocate IRQ numbers\n");
- irq_base = 0;
- }
-
- /* create a legacy host */
- cp_intc_domain = irq_domain_add_legacy(node, num_irq,
- irq_base, 0, &cp_intc_host_ops, NULL);
-
- if (!cp_intc_domain) {
- pr_err("cp_intc: failed to allocate irq host!\n");
- return -EINVAL;
- }
-
- /* Enable global interrupt */
- cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
-
- return 0;
-}
-
-void __init cp_intc_init(void)
-{
- cp_intc_of_init(NULL, NULL);
-}
-
-IRQCHIP_DECLARE(cp_intc, "ti,cp-intc", cp_intc_of_init);
diff --git a/arch/arm/mach-davinci/cp_intc.h b/arch/arm/mach-davinci/cp_intc.h
deleted file mode 100644
index 827bbe9..0000000
--- a/arch/arm/mach-davinci/cp_intc.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * TI Common Platform Interrupt Controller (cp_intc) definitions
- *
- * Author: Steve Chen <schen@mvista.com>
- * Copyright (C) 2008-2009, MontaVista Software, Inc. <source@mvista.com>
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-#ifndef __ASM_HARDWARE_CP_INTC_H
-#define __ASM_HARDWARE_CP_INTC_H
-
-#define CP_INTC_REV 0x00
-#define CP_INTC_CTRL 0x04
-#define CP_INTC_HOST_CTRL 0x0C
-#define CP_INTC_GLOBAL_ENABLE 0x10
-#define CP_INTC_GLOBAL_NESTING_LEVEL 0x1C
-#define CP_INTC_SYS_STAT_IDX_SET 0x20
-#define CP_INTC_SYS_STAT_IDX_CLR 0x24
-#define CP_INTC_SYS_ENABLE_IDX_SET 0x28
-#define CP_INTC_SYS_ENABLE_IDX_CLR 0x2C
-#define CP_INTC_GLOBAL_WAKEUP_ENABLE 0x30
-#define CP_INTC_HOST_ENABLE_IDX_SET 0x34
-#define CP_INTC_HOST_ENABLE_IDX_CLR 0x38
-#define CP_INTC_PACING_PRESCALE 0x40
-#define CP_INTC_VECTOR_BASE 0x50
-#define CP_INTC_VECTOR_SIZE 0x54
-#define CP_INTC_VECTOR_NULL 0x58
-#define CP_INTC_PRIO_IDX 0x80
-#define CP_INTC_PRIO_VECTOR 0x84
-#define CP_INTC_SECURE_ENABLE 0x90
-#define CP_INTC_SECURE_PRIO_IDX 0x94
-#define CP_INTC_PACING_PARAM(n) (0x0100 + (n << 4))
-#define CP_INTC_PACING_DEC(n) (0x0104 + (n << 4))
-#define CP_INTC_PACING_MAP(n) (0x0108 + (n << 4))
-#define CP_INTC_SYS_RAW_STAT(n) (0x0200 + (n << 2))
-#define CP_INTC_SYS_STAT_CLR(n) (0x0280 + (n << 2))
-#define CP_INTC_SYS_ENABLE_SET(n) (0x0300 + (n << 2))
-#define CP_INTC_SYS_ENABLE_CLR(n) (0x0380 + (n << 2))
-#define CP_INTC_CHAN_MAP(n) (0x0400 + (n << 2))
-#define CP_INTC_HOST_MAP(n) (0x0800 + (n << 2))
-#define CP_INTC_HOST_PRIO_IDX(n) (0x0900 + (n << 2))
-#define CP_INTC_SYS_POLARITY(n) (0x0D00 + (n << 2))
-#define CP_INTC_SYS_TYPE(n) (0x0D80 + (n << 2))
-#define CP_INTC_WAKEUP_ENABLE(n) (0x0E00 + (n << 2))
-#define CP_INTC_DEBUG_SELECT(n) (0x0F00 + (n << 2))
-#define CP_INTC_SYS_SECURE_ENABLE(n) (0x1000 + (n << 2))
-#define CP_INTC_HOST_NESTING_LEVEL(n) (0x1100 + (n << 2))
-#define CP_INTC_HOST_ENABLE(n) (0x1500 + (n << 2))
-#define CP_INTC_HOST_PRIO_VECTOR(n) (0x1600 + (n << 2))
-#define CP_INTC_VECTOR_ADDR(n) (0x2000 + (n << 2))
-
-void cp_intc_init(void);
-int cp_intc_of_init(struct device_node *, struct device_node *);
-
-#endif /* __ASM_HARDWARE_CP_INTC_H */
diff --git a/arch/arm/mach-davinci/cpuidle.c b/arch/arm/mach-davinci/cpuidle.c
index 1b8f085..b795f67 100644
--- a/arch/arm/mach-davinci/cpuidle.c
+++ b/arch/arm/mach-davinci/cpuidle.c
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
* CPU idle for DaVinci SoCs
*
@@ -5,10 +6,6 @@
*
* Derived from Marvell Kirkwood CPU idle code
* (arch/arm/mach-kirkwood/cpuidle.c)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#include <linux/kernel.h>
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 0bc5bd2..018ab4b 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -12,6 +12,8 @@
#include <linux/clk/davinci.h>
#include <linux/gpio.h>
#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/irqchip/irq-davinci-cp-intc.h>
#include <linux/platform_data/gpio-davinci.h>
#include <asm/mach/map.h>
@@ -19,9 +21,10 @@
#include <mach/common.h>
#include <mach/cputype.h>
#include <mach/da8xx.h>
-#include <mach/irqs.h>
-#include <mach/time.h>
+#include <clocksource/timer-davinci.h>
+
+#include "irqs.h"
#include "mux.h"
/* Offsets of the 8 compare registers on the da830 */
@@ -623,101 +626,6 @@
-1
};
-/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
-static u8 da830_default_priorities[DA830_N_CP_INTC_IRQ] = {
- [IRQ_DA8XX_COMMTX] = 7,
- [IRQ_DA8XX_COMMRX] = 7,
- [IRQ_DA8XX_NINT] = 7,
- [IRQ_DA8XX_EVTOUT0] = 7,
- [IRQ_DA8XX_EVTOUT1] = 7,
- [IRQ_DA8XX_EVTOUT2] = 7,
- [IRQ_DA8XX_EVTOUT3] = 7,
- [IRQ_DA8XX_EVTOUT4] = 7,
- [IRQ_DA8XX_EVTOUT5] = 7,
- [IRQ_DA8XX_EVTOUT6] = 7,
- [IRQ_DA8XX_EVTOUT7] = 7,
- [IRQ_DA8XX_CCINT0] = 7,
- [IRQ_DA8XX_CCERRINT] = 7,
- [IRQ_DA8XX_TCERRINT0] = 7,
- [IRQ_DA8XX_AEMIFINT] = 7,
- [IRQ_DA8XX_I2CINT0] = 7,
- [IRQ_DA8XX_MMCSDINT0] = 7,
- [IRQ_DA8XX_MMCSDINT1] = 7,
- [IRQ_DA8XX_ALLINT0] = 7,
- [IRQ_DA8XX_RTC] = 7,
- [IRQ_DA8XX_SPINT0] = 7,
- [IRQ_DA8XX_TINT12_0] = 7,
- [IRQ_DA8XX_TINT34_0] = 7,
- [IRQ_DA8XX_TINT12_1] = 7,
- [IRQ_DA8XX_TINT34_1] = 7,
- [IRQ_DA8XX_UARTINT0] = 7,
- [IRQ_DA8XX_KEYMGRINT] = 7,
- [IRQ_DA830_MPUERR] = 7,
- [IRQ_DA8XX_CHIPINT0] = 7,
- [IRQ_DA8XX_CHIPINT1] = 7,
- [IRQ_DA8XX_CHIPINT2] = 7,
- [IRQ_DA8XX_CHIPINT3] = 7,
- [IRQ_DA8XX_TCERRINT1] = 7,
- [IRQ_DA8XX_C0_RX_THRESH_PULSE] = 7,
- [IRQ_DA8XX_C0_RX_PULSE] = 7,
- [IRQ_DA8XX_C0_TX_PULSE] = 7,
- [IRQ_DA8XX_C0_MISC_PULSE] = 7,
- [IRQ_DA8XX_C1_RX_THRESH_PULSE] = 7,
- [IRQ_DA8XX_C1_RX_PULSE] = 7,
- [IRQ_DA8XX_C1_TX_PULSE] = 7,
- [IRQ_DA8XX_C1_MISC_PULSE] = 7,
- [IRQ_DA8XX_MEMERR] = 7,
- [IRQ_DA8XX_GPIO0] = 7,
- [IRQ_DA8XX_GPIO1] = 7,
- [IRQ_DA8XX_GPIO2] = 7,
- [IRQ_DA8XX_GPIO3] = 7,
- [IRQ_DA8XX_GPIO4] = 7,
- [IRQ_DA8XX_GPIO5] = 7,
- [IRQ_DA8XX_GPIO6] = 7,
- [IRQ_DA8XX_GPIO7] = 7,
- [IRQ_DA8XX_GPIO8] = 7,
- [IRQ_DA8XX_I2CINT1] = 7,
- [IRQ_DA8XX_LCDINT] = 7,
- [IRQ_DA8XX_UARTINT1] = 7,
- [IRQ_DA8XX_MCASPINT] = 7,
- [IRQ_DA8XX_ALLINT1] = 7,
- [IRQ_DA8XX_SPINT1] = 7,
- [IRQ_DA8XX_UHPI_INT1] = 7,
- [IRQ_DA8XX_USB_INT] = 7,
- [IRQ_DA8XX_IRQN] = 7,
- [IRQ_DA8XX_RWAKEUP] = 7,
- [IRQ_DA8XX_UARTINT2] = 7,
- [IRQ_DA8XX_DFTSSINT] = 7,
- [IRQ_DA8XX_EHRPWM0] = 7,
- [IRQ_DA8XX_EHRPWM0TZ] = 7,
- [IRQ_DA8XX_EHRPWM1] = 7,
- [IRQ_DA8XX_EHRPWM1TZ] = 7,
- [IRQ_DA830_EHRPWM2] = 7,
- [IRQ_DA830_EHRPWM2TZ] = 7,
- [IRQ_DA8XX_ECAP0] = 7,
- [IRQ_DA8XX_ECAP1] = 7,
- [IRQ_DA8XX_ECAP2] = 7,
- [IRQ_DA830_EQEP0] = 7,
- [IRQ_DA830_EQEP1] = 7,
- [IRQ_DA830_T12CMPINT0_0] = 7,
- [IRQ_DA830_T12CMPINT1_0] = 7,
- [IRQ_DA830_T12CMPINT2_0] = 7,
- [IRQ_DA830_T12CMPINT3_0] = 7,
- [IRQ_DA830_T12CMPINT4_0] = 7,
- [IRQ_DA830_T12CMPINT5_0] = 7,
- [IRQ_DA830_T12CMPINT6_0] = 7,
- [IRQ_DA830_T12CMPINT7_0] = 7,
- [IRQ_DA830_T12CMPINT0_1] = 7,
- [IRQ_DA830_T12CMPINT1_1] = 7,
- [IRQ_DA830_T12CMPINT2_1] = 7,
- [IRQ_DA830_T12CMPINT3_1] = 7,
- [IRQ_DA830_T12CMPINT4_1] = 7,
- [IRQ_DA830_T12CMPINT5_1] = 7,
- [IRQ_DA830_T12CMPINT6_1] = 7,
- [IRQ_DA830_T12CMPINT7_1] = 7,
- [IRQ_DA8XX_ARMCLKSTOPREQ] = 7,
-};
-
static struct map_desc da830_io_desc[] = {
{
.virtual = IO_VIRT,
@@ -759,7 +667,9 @@
};
static struct davinci_gpio_platform_data da830_gpio_platform_data = {
- .ngpio = 128,
+ .no_auto_base = true,
+ .base = 0,
+ .ngpio = 128,
};
int __init da830_register_gpio(void)
@@ -767,32 +677,17 @@
return da8xx_register_gpio(&da830_gpio_platform_data);
}
-static struct davinci_timer_instance da830_timer_instance[2] = {
- {
- .base = DA8XX_TIMER64P0_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_0,
- .top_irq = IRQ_DA8XX_TINT34_0,
- .cmp_off = DA830_CMP12_0,
- .cmp_irq = IRQ_DA830_T12CMPINT0_0,
- },
- {
- .base = DA8XX_TIMER64P1_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_1,
- .top_irq = IRQ_DA8XX_TINT34_1,
- .cmp_off = DA830_CMP12_0,
- .cmp_irq = IRQ_DA830_T12CMPINT0_1,
- },
-};
-
/*
- * T0_BOT: Timer 0, bottom : Used for clock_event & clocksource
- * T0_TOP: Timer 0, top : Used by DSP
- * T1_BOT, T1_TOP: Timer 1, bottom & top: Used for watchdog timer
+ * Bottom half of timer0 is used both for clock even and clocksource.
+ * Top half is used by DSP.
*/
-static struct davinci_timer_info da830_timer_info = {
- .timers = da830_timer_instance,
- .clockevent_id = T0_BOT,
- .clocksource_id = T0_BOT,
+static const struct davinci_timer_cfg da830_timer_cfg = {
+ .reg = DEFINE_RES_IO(DA8XX_TIMER64P0_BASE, SZ_4K),
+ .irq = {
+ DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_DA830_T12CMPINT0_0)),
+ DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_0)),
+ },
+ .cmp_off = DA830_CMP12_0,
};
static const struct davinci_soc_info davinci_soc_info_da830 = {
@@ -804,11 +699,6 @@
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
.pinmux_pins = da830_pins,
.pinmux_pins_num = ARRAY_SIZE(da830_pins),
- .intc_base = DA8XX_CP_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_CP_INTC,
- .intc_irq_prios = da830_default_priorities,
- .intc_irq_num = DA830_N_CP_INTC_IRQ,
- .timer_info = &da830_timer_info,
.emac_pdata = &da8xx_emac_pdata,
};
@@ -820,10 +710,25 @@
WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module");
}
+static const struct davinci_cp_intc_config da830_cp_intc_config = {
+ .reg = {
+ .start = DA8XX_CP_INTC_BASE,
+ .end = DA8XX_CP_INTC_BASE + SZ_8K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = DA830_N_CP_INTC_IRQ,
+};
+
+void __init da830_init_irq(void)
+{
+ davinci_cp_intc_init(&da830_cp_intc_config);
+}
+
void __init da830_init_time(void)
{
void __iomem *pll;
struct clk *clk;
+ int rv;
clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DA830_REF_FREQ);
@@ -832,8 +737,13 @@
da830_pll_init(NULL, pll, NULL);
clk = clk_get(NULL, "timer0");
+ if (WARN_ON(IS_ERR(clk))) {
+ pr_err("Unable to get the timer clock\n");
+ return;
+ }
- davinci_timer_init(clk);
+ rv = davinci_timer_register(clk, &da830_timer_cfg);
+ WARN(rv, "Unable to register the timer: %d\n", rv);
}
static struct resource da830_psc0_resources[] = {
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index 4528bbf..73b7cc5 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -18,9 +18,12 @@
#include <linux/cpufreq.h>
#include <linux/gpio.h>
#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/irqchip/irq-davinci-cp-intc.h>
#include <linux/mfd/da8xx-cfgchip.h>
#include <linux/platform_data/clk-da8xx-cfgchip.h>
#include <linux/platform_data/clk-davinci-pll.h>
+#include <linux/platform_data/davinci-cpufreq.h>
#include <linux/platform_data/gpio-davinci.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
@@ -29,13 +32,13 @@
#include <asm/mach/map.h>
#include <mach/common.h>
-#include <mach/cpufreq.h>
#include <mach/cputype.h>
#include <mach/da8xx.h>
-#include <mach/irqs.h>
#include <mach/pm.h>
-#include <mach/time.h>
+#include <clocksource/timer-davinci.h>
+
+#include "irqs.h"
#include "mux.h"
#define DA850_PLL1_BASE 0x01e1a000
@@ -298,111 +301,6 @@
-1
};
-/* FIQ are pri 0-1; otherwise 2-7, with 7 lowest priority */
-static u8 da850_default_priorities[DA850_N_CP_INTC_IRQ] = {
- [IRQ_DA8XX_COMMTX] = 7,
- [IRQ_DA8XX_COMMRX] = 7,
- [IRQ_DA8XX_NINT] = 7,
- [IRQ_DA8XX_EVTOUT0] = 7,
- [IRQ_DA8XX_EVTOUT1] = 7,
- [IRQ_DA8XX_EVTOUT2] = 7,
- [IRQ_DA8XX_EVTOUT3] = 7,
- [IRQ_DA8XX_EVTOUT4] = 7,
- [IRQ_DA8XX_EVTOUT5] = 7,
- [IRQ_DA8XX_EVTOUT6] = 7,
- [IRQ_DA8XX_EVTOUT7] = 7,
- [IRQ_DA8XX_CCINT0] = 7,
- [IRQ_DA8XX_CCERRINT] = 7,
- [IRQ_DA8XX_TCERRINT0] = 7,
- [IRQ_DA8XX_AEMIFINT] = 7,
- [IRQ_DA8XX_I2CINT0] = 7,
- [IRQ_DA8XX_MMCSDINT0] = 7,
- [IRQ_DA8XX_MMCSDINT1] = 7,
- [IRQ_DA8XX_ALLINT0] = 7,
- [IRQ_DA8XX_RTC] = 7,
- [IRQ_DA8XX_SPINT0] = 7,
- [IRQ_DA8XX_TINT12_0] = 7,
- [IRQ_DA8XX_TINT34_0] = 7,
- [IRQ_DA8XX_TINT12_1] = 7,
- [IRQ_DA8XX_TINT34_1] = 7,
- [IRQ_DA8XX_UARTINT0] = 7,
- [IRQ_DA8XX_KEYMGRINT] = 7,
- [IRQ_DA850_MPUADDRERR0] = 7,
- [IRQ_DA8XX_CHIPINT0] = 7,
- [IRQ_DA8XX_CHIPINT1] = 7,
- [IRQ_DA8XX_CHIPINT2] = 7,
- [IRQ_DA8XX_CHIPINT3] = 7,
- [IRQ_DA8XX_TCERRINT1] = 7,
- [IRQ_DA8XX_C0_RX_THRESH_PULSE] = 7,
- [IRQ_DA8XX_C0_RX_PULSE] = 7,
- [IRQ_DA8XX_C0_TX_PULSE] = 7,
- [IRQ_DA8XX_C0_MISC_PULSE] = 7,
- [IRQ_DA8XX_C1_RX_THRESH_PULSE] = 7,
- [IRQ_DA8XX_C1_RX_PULSE] = 7,
- [IRQ_DA8XX_C1_TX_PULSE] = 7,
- [IRQ_DA8XX_C1_MISC_PULSE] = 7,
- [IRQ_DA8XX_MEMERR] = 7,
- [IRQ_DA8XX_GPIO0] = 7,
- [IRQ_DA8XX_GPIO1] = 7,
- [IRQ_DA8XX_GPIO2] = 7,
- [IRQ_DA8XX_GPIO3] = 7,
- [IRQ_DA8XX_GPIO4] = 7,
- [IRQ_DA8XX_GPIO5] = 7,
- [IRQ_DA8XX_GPIO6] = 7,
- [IRQ_DA8XX_GPIO7] = 7,
- [IRQ_DA8XX_GPIO8] = 7,
- [IRQ_DA8XX_I2CINT1] = 7,
- [IRQ_DA8XX_LCDINT] = 7,
- [IRQ_DA8XX_UARTINT1] = 7,
- [IRQ_DA8XX_MCASPINT] = 7,
- [IRQ_DA8XX_ALLINT1] = 7,
- [IRQ_DA8XX_SPINT1] = 7,
- [IRQ_DA8XX_UHPI_INT1] = 7,
- [IRQ_DA8XX_USB_INT] = 7,
- [IRQ_DA8XX_IRQN] = 7,
- [IRQ_DA8XX_RWAKEUP] = 7,
- [IRQ_DA8XX_UARTINT2] = 7,
- [IRQ_DA8XX_DFTSSINT] = 7,
- [IRQ_DA8XX_EHRPWM0] = 7,
- [IRQ_DA8XX_EHRPWM0TZ] = 7,
- [IRQ_DA8XX_EHRPWM1] = 7,
- [IRQ_DA8XX_EHRPWM1TZ] = 7,
- [IRQ_DA850_SATAINT] = 7,
- [IRQ_DA850_TINTALL_2] = 7,
- [IRQ_DA8XX_ECAP0] = 7,
- [IRQ_DA8XX_ECAP1] = 7,
- [IRQ_DA8XX_ECAP2] = 7,
- [IRQ_DA850_MMCSDINT0_1] = 7,
- [IRQ_DA850_MMCSDINT1_1] = 7,
- [IRQ_DA850_T12CMPINT0_2] = 7,
- [IRQ_DA850_T12CMPINT1_2] = 7,
- [IRQ_DA850_T12CMPINT2_2] = 7,
- [IRQ_DA850_T12CMPINT3_2] = 7,
- [IRQ_DA850_T12CMPINT4_2] = 7,
- [IRQ_DA850_T12CMPINT5_2] = 7,
- [IRQ_DA850_T12CMPINT6_2] = 7,
- [IRQ_DA850_T12CMPINT7_2] = 7,
- [IRQ_DA850_T12CMPINT0_3] = 7,
- [IRQ_DA850_T12CMPINT1_3] = 7,
- [IRQ_DA850_T12CMPINT2_3] = 7,
- [IRQ_DA850_T12CMPINT3_3] = 7,
- [IRQ_DA850_T12CMPINT4_3] = 7,
- [IRQ_DA850_T12CMPINT5_3] = 7,
- [IRQ_DA850_T12CMPINT6_3] = 7,
- [IRQ_DA850_T12CMPINT7_3] = 7,
- [IRQ_DA850_RPIINT] = 7,
- [IRQ_DA850_VPIFINT] = 7,
- [IRQ_DA850_CCINT1] = 7,
- [IRQ_DA850_CCERRINT1] = 7,
- [IRQ_DA850_TCERRINT2] = 7,
- [IRQ_DA850_TINTALL_3] = 7,
- [IRQ_DA850_MCBSP0RINT] = 7,
- [IRQ_DA850_MCBSP0XINT] = 7,
- [IRQ_DA850_MCBSP1RINT] = 7,
- [IRQ_DA850_MCBSP1XINT] = 7,
- [IRQ_DA8XX_ARMCLKSTOPREQ] = 7,
-};
-
static struct map_desc da850_io_desc[] = {
{
.virtual = IO_VIRT,
@@ -436,38 +334,16 @@
},
};
-static struct davinci_timer_instance da850_timer_instance[4] = {
- {
- .base = DA8XX_TIMER64P0_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_0,
- .top_irq = IRQ_DA8XX_TINT34_0,
- },
- {
- .base = DA8XX_TIMER64P1_BASE,
- .bottom_irq = IRQ_DA8XX_TINT12_1,
- .top_irq = IRQ_DA8XX_TINT34_1,
- },
- {
- .base = DA850_TIMER64P2_BASE,
- .bottom_irq = IRQ_DA850_TINT12_2,
- .top_irq = IRQ_DA850_TINT34_2,
- },
- {
- .base = DA850_TIMER64P3_BASE,
- .bottom_irq = IRQ_DA850_TINT12_3,
- .top_irq = IRQ_DA850_TINT34_3,
- },
-};
-
/*
- * T0_BOT: Timer 0, bottom : Used for clock_event
- * T0_TOP: Timer 0, top : Used for clocksource
- * T1_BOT, T1_TOP: Timer 1, bottom & top: Used for watchdog timer
+ * Bottom half of timer 0 is used for clock_event, top half for
+ * clocksource.
*/
-static struct davinci_timer_info da850_timer_info = {
- .timers = da850_timer_instance,
- .clockevent_id = T0_BOT,
- .clocksource_id = T0_TOP,
+static const struct davinci_timer_cfg da850_timer_cfg = {
+ .reg = DEFINE_RES_IO(DA8XX_TIMER64P0_BASE, SZ_4K),
+ .irq = {
+ DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT12_0)),
+ DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_DA8XX_TINT34_0)),
+ },
};
#ifdef CONFIG_CPU_FREQ
@@ -658,8 +534,8 @@
static struct resource da850_vpif_display_resource[] = {
{
- .start = IRQ_DA850_VPIFINT,
- .end = IRQ_DA850_VPIFINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -677,13 +553,13 @@
static struct resource da850_vpif_capture_resource[] = {
{
- .start = IRQ_DA850_VPIFINT,
- .end = IRQ_DA850_VPIFINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA850_VPIFINT,
- .end = IRQ_DA850_VPIFINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA850_VPIFINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -719,7 +595,9 @@
}
static struct davinci_gpio_platform_data da850_gpio_platform_data = {
- .ngpio = 144,
+ .no_auto_base = true,
+ .base = 0,
+ .ngpio = 144,
};
int __init da850_register_gpio(void)
@@ -736,11 +614,6 @@
.pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
.pinmux_pins = da850_pins,
.pinmux_pins_num = ARRAY_SIZE(da850_pins),
- .intc_base = DA8XX_CP_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_CP_INTC,
- .intc_irq_prios = da850_default_priorities,
- .intc_irq_num = DA850_N_CP_INTC_IRQ,
- .timer_info = &da850_timer_info,
.emac_pdata = &da8xx_emac_pdata,
.sram_dma = DA8XX_SHARED_RAM_BASE,
.sram_len = SZ_128K,
@@ -758,11 +631,26 @@
WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module");
}
+static const struct davinci_cp_intc_config da850_cp_intc_config = {
+ .reg = {
+ .start = DA8XX_CP_INTC_BASE,
+ .end = DA8XX_CP_INTC_BASE + SZ_8K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = DA850_N_CP_INTC_IRQ,
+};
+
+void __init da850_init_irq(void)
+{
+ davinci_cp_intc_init(&da850_cp_intc_config);
+}
+
void __init da850_init_time(void)
{
void __iomem *pll0;
struct regmap *cfgchip;
struct clk *clk;
+ int rv;
clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DA850_REF_FREQ);
@@ -772,8 +660,13 @@
da850_pll0_init(NULL, pll0, cfgchip);
clk = clk_get(NULL, "timer0");
+ if (WARN_ON(IS_ERR(clk))) {
+ pr_err("Unable to get the timer clock\n");
+ return;
+ }
- davinci_timer_init(clk);
+ rv = davinci_timer_register(clk, &da850_timer_cfg);
+ WARN(rv, "Unable to register the timer: %d\n", rv);
}
static struct resource da850_pll1_resources[] = {
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index beac80e..9c0dd02 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -1,11 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* Modified from mach-omap/omap2/board-generic.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#include <asm/mach/arch.h>
diff --git a/arch/arm/mach-davinci/davinci.h b/arch/arm/mach-davinci/davinci.h
index db4c95e..208d7a4 100644
--- a/arch/arm/mach-davinci/davinci.h
+++ b/arch/arm/mach-davinci/davinci.h
@@ -60,6 +60,9 @@
#define DAVINCI_GPIO_BASE 0x01C67000
int davinci_gpio_register(struct resource *res, int size, void *pdata);
+#define DAVINCI_TIMER0_BASE (IO_PHYS + 0x21400)
+#define DAVINCI_WDOG_BASE (IO_PHYS + 0x21C00)
+
/* DM355 base addresses */
#define DM355_ASYNC_EMIF_CONTROL_BASE 0x01e10000
#define DM355_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
@@ -88,6 +91,7 @@
/* DM355 function declarations */
void dm355_init(void);
void dm355_init_time(void);
+void dm355_init_irq(void);
void dm355_register_clocks(void);
void dm355_init_spi0(unsigned chipselect_mask,
const struct spi_board_info *info, unsigned len);
@@ -97,6 +101,7 @@
/* DM365 function declarations */
void dm365_init(void);
+void dm365_init_irq(void);
void dm365_init_time(void);
void dm365_register_clocks(void);
void dm365_init_asp(void);
@@ -110,6 +115,7 @@
/* DM644x function declarations */
void dm644x_init(void);
+void dm644x_init_irq(void);
void dm644x_init_devices(void);
void dm644x_init_time(void);
void dm644x_register_clocks(void);
@@ -119,6 +125,7 @@
/* DM646x function declarations */
void dm646x_init(void);
+void dm646x_init_irq(void);
void dm646x_init_time(unsigned long ref_clk_rate, unsigned long aux_clkin_rate);
void dm646x_register_clocks(void);
void dm646x_init_mcasp0(struct snd_platform_data *pdata);
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 1fd3619..2d69e70 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -1,14 +1,10 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* DA8XX/OMAP L1XX platform device data
*
* Copyright (c) 2007-2009, MontaVista Software, Inc. <source@mvista.com>
* Derived from code that was:
* Copyright (C) 2006 Komal Shah <komal_shah802003@yahoo.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
*/
#include <linux/ahci_platform.h>
#include <linux/clk-provider.h>
@@ -17,6 +13,7 @@
#include <linux/dma-contiguous.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/reboot.h>
#include <linux/serial_8250.h>
@@ -28,6 +25,7 @@
#include "asp.h"
#include "cpuidle.h"
+#include "irqs.h"
#include "sram.h"
#define DA8XX_TPCC_BASE 0x01c00000
@@ -64,7 +62,7 @@
static struct plat_serial8250_port da8xx_serial0_pdata[] = {
{
.mapbase = DA8XX_UART0_BASE,
- .irq = IRQ_DA8XX_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_UARTINT0),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -77,7 +75,7 @@
static struct plat_serial8250_port da8xx_serial1_pdata[] = {
{
.mapbase = DA8XX_UART1_BASE,
- .irq = IRQ_DA8XX_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_UARTINT1),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -90,7 +88,7 @@
static struct plat_serial8250_port da8xx_serial2_pdata[] = {
{
.mapbase = DA8XX_UART2_BASE,
- .irq = IRQ_DA8XX_UARTINT2,
+ .irq = DAVINCI_INTC_IRQ(IRQ_DA8XX_UARTINT2),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -171,12 +169,12 @@
},
{
.name = "edma3_ccint",
- .start = IRQ_DA8XX_CCINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_CCINT0),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_DA8XX_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_CCERRINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -196,12 +194,12 @@
},
{
.name = "edma3_ccint",
- .start = IRQ_DA850_CCINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_CCINT1),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_DA850_CCERRINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_CCERRINT1),
.flags = IORESOURCE_IRQ,
},
};
@@ -306,8 +304,8 @@
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_I2CINT0,
- .end = IRQ_DA8XX_I2CINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_I2CINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_I2CINT0),
.flags = IORESOURCE_IRQ,
},
};
@@ -326,8 +324,8 @@
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_I2CINT1,
- .end = IRQ_DA8XX_I2CINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_I2CINT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_I2CINT1),
.flags = IORESOURCE_IRQ,
},
};
@@ -382,23 +380,23 @@
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_C0_RX_THRESH_PULSE,
- .end = IRQ_DA8XX_C0_RX_THRESH_PULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_RX_THRESH_PULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_RX_THRESH_PULSE),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_C0_RX_PULSE,
- .end = IRQ_DA8XX_C0_RX_PULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_RX_PULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_RX_PULSE),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_C0_TX_PULSE,
- .end = IRQ_DA8XX_C0_TX_PULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_TX_PULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_TX_PULSE),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_C0_MISC_PULSE,
- .end = IRQ_DA8XX_C0_MISC_PULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_MISC_PULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_C0_MISC_PULSE),
.flags = IORESOURCE_IRQ,
},
};
@@ -470,7 +468,7 @@
},
{
.name = "common",
- .start = IRQ_DA8XX_MCASPINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_MCASPINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -505,7 +503,7 @@
},
{
.name = "common",
- .start = IRQ_DA8XX_MCASPINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_MCASPINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -540,7 +538,7 @@
},
{
.name = "common",
- .start = IRQ_DA8XX_MCASPINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_MCASPINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -588,43 +586,43 @@
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_EVTOUT0,
- .end = IRQ_DA8XX_EVTOUT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT1,
- .end = IRQ_DA8XX_EVTOUT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT1),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT2,
- .end = IRQ_DA8XX_EVTOUT2,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT2),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT2),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT3,
- .end = IRQ_DA8XX_EVTOUT3,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT3),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT3),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT4,
- .end = IRQ_DA8XX_EVTOUT4,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT4),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT4),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT5,
- .end = IRQ_DA8XX_EVTOUT5,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT5),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT5),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT6,
- .end = IRQ_DA8XX_EVTOUT6,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT6),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT6),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DA8XX_EVTOUT7,
- .end = IRQ_DA8XX_EVTOUT7,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT7),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_EVTOUT7),
.flags = IORESOURCE_IRQ,
},
};
@@ -674,8 +672,8 @@
.flags = IORESOURCE_MEM,
},
[1] = { /* interrupt */
- .start = IRQ_DA8XX_LCDINT,
- .end = IRQ_DA8XX_LCDINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_LCDINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_LCDINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -685,6 +683,9 @@
.id = 0,
.num_resources = ARRAY_SIZE(da8xx_lcdc_resources),
.resource = da8xx_lcdc_resources,
+ .dev = {
+ .coherent_dma_mask = DMA_BIT_MASK(32),
+ }
};
int __init da8xx_register_lcdc(struct da8xx_lcdc_platform_data *pdata)
@@ -700,8 +701,48 @@
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DA8XX_GPIO0,
- .end = IRQ_DA8XX_GPIO8,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO0),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO1),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO2),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO2),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO3),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO3),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO4),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO4),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO5),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO5),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO6),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO6),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO7),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO7),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO8),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_GPIO8),
.flags = IORESOURCE_IRQ,
},
};
@@ -726,8 +767,8 @@
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DA8XX_MMCSDINT0,
- .end = IRQ_DA8XX_MMCSDINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_MMCSDINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_MMCSDINT0),
.flags = IORESOURCE_IRQ,
},
};
@@ -753,8 +794,8 @@
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DA850_MMCSDINT0_1,
- .end = IRQ_DA850_MMCSDINT0_1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_MMCSDINT0_1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA850_MMCSDINT0_1),
.flags = IORESOURCE_IRQ,
},
};
@@ -805,8 +846,8 @@
.flags = IORESOURCE_MEM,
},
{ /* dsp irq */
- .start = IRQ_DA8XX_CHIPINT0,
- .end = IRQ_DA8XX_CHIPINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_CHIPINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_CHIPINT0),
.flags = IORESOURCE_IRQ,
},
};
@@ -896,13 +937,13 @@
.flags = IORESOURCE_MEM,
},
{ /* timer irq */
- .start = IRQ_DA8XX_RTC,
- .end = IRQ_DA8XX_RTC,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_RTC),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_RTC),
.flags = IORESOURCE_IRQ,
},
{ /* alarm irq */
- .start = IRQ_DA8XX_RTC,
- .end = IRQ_DA8XX_RTC,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_RTC),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_RTC),
.flags = IORESOURCE_IRQ,
},
};
@@ -969,8 +1010,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = IRQ_DA8XX_SPINT0,
- .end = IRQ_DA8XX_SPINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_SPINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_SPINT0),
.flags = IORESOURCE_IRQ,
},
};
@@ -982,8 +1023,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = IRQ_DA8XX_SPINT1,
- .end = IRQ_DA8XX_SPINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_SPINT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_SPINT1),
.flags = IORESOURCE_IRQ,
},
};
@@ -1063,7 +1104,7 @@
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA850_SATAINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA850_SATAINT),
.flags = IORESOURCE_IRQ,
},
};
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c
index e8dbbb7..3e447d4 100644
--- a/arch/arm/mach-davinci/devices.c
+++ b/arch/arm/mach-davinci/devices.c
@@ -1,31 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* mach-davinci/devices.c
*
* DaVinci platform device setup/initialization
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
*/
#include <linux/init.h>
#include <linux/platform_device.h>
+#include <linux/platform_data/i2c-davinci.h>
+#include <linux/platform_data/mmc-davinci.h>
+#include <linux/platform_data/edma.h>
#include <linux/dma-mapping.h>
#include <linux/io.h>
#include <linux/reboot.h>
#include <mach/hardware.h>
-#include <linux/platform_data/i2c-davinci.h>
-#include <mach/irqs.h>
#include <mach/cputype.h>
#include <mach/mux.h>
-#include <linux/platform_data/mmc-davinci.h>
#include <mach/time.h>
-#include <linux/platform_data/edma.h>
-
#include "davinci.h"
+#include "irqs.h"
#define DAVINCI_I2C_BASE 0x01C21000
#define DAVINCI_ATA_BASE 0x01C66000
@@ -56,7 +51,7 @@
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_I2C,
+ .start = DAVINCI_INTC_IRQ(IRQ_I2C),
.flags = IORESOURCE_IRQ,
},
};
@@ -84,8 +79,8 @@
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_IDE,
- .end = IRQ_IDE,
+ .start = DAVINCI_INTC_IRQ(IRQ_IDE),
+ .end = DAVINCI_INTC_IRQ(IRQ_IDE),
.flags = IORESOURCE_IRQ,
},
};
@@ -133,11 +128,11 @@
},
/* IRQs: MMC/SD, then SDIO */
{
- .start = IRQ_MMCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_MMCINT),
.flags = IORESOURCE_IRQ,
}, {
/* different on dm355 */
- .start = IRQ_SDIOINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_SDIOINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -163,10 +158,10 @@
},
/* IRQs: MMC/SD, then SDIO */
{
- .start = IRQ_DM355_MMCINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_MMCINT1),
.flags = IORESOURCE_IRQ,
}, {
- .start = IRQ_DM355_SDIOINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_SDIOINT1),
.flags = IORESOURCE_IRQ,
},
};
@@ -219,7 +214,8 @@
mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
SZ_4K - 1;
- mmcsd1_resources[2].start = IRQ_DM365_SDIOINT1;
+ mmcsd1_resources[2].start = DAVINCI_INTC_IRQ(
+ IRQ_DM365_SDIOINT1);
davinci_mmcsd1_device.name = "da830-mmc";
} else
break;
@@ -230,7 +226,8 @@
if (cpu_is_davinci_dm355()) {
mmcsd0_resources[0].start = DM355_MMCSD0_BASE;
mmcsd0_resources[0].end = DM355_MMCSD0_BASE + SZ_4K - 1;
- mmcsd0_resources[2].start = IRQ_DM355_SDIOINT0;
+ mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(
+ IRQ_DM355_SDIOINT0);
/* expose all 6 MMC0 signals: CLK, CMD, DATA[0..3] */
davinci_cfg_reg(DM355_MMCSD0);
@@ -241,7 +238,8 @@
mmcsd0_resources[0].start = DM365_MMCSD0_BASE;
mmcsd0_resources[0].end = DM365_MMCSD0_BASE +
SZ_4K - 1;
- mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
+ mmcsd0_resources[2].start = DAVINCI_INTC_IRQ(
+ IRQ_DM365_SDIOINT0);
davinci_mmcsd0_device.name = "da830-mmc";
} else if (cpu_is_davinci_dm644x()) {
/* REVISIT: should this be in board-init code? */
@@ -313,13 +311,13 @@
struct davinci_timer_instance davinci_timer_instance[2] = {
{
.base = DAVINCI_TIMER0_BASE,
- .bottom_irq = IRQ_TINT0_TINT12,
- .top_irq = IRQ_TINT0_TINT34,
+ .bottom_irq = DAVINCI_INTC_IRQ(IRQ_TINT0_TINT12),
+ .top_irq = DAVINCI_INTC_IRQ(IRQ_TINT0_TINT34),
},
{
.base = DAVINCI_TIMER1_BASE,
- .bottom_irq = IRQ_TINT1_TINT12,
- .top_irq = IRQ_TINT1_TINT34,
+ .bottom_irq = DAVINCI_INTC_IRQ(IRQ_TINT1_TINT12),
+ .top_irq = DAVINCI_INTC_IRQ(IRQ_TINT1_TINT34),
},
};
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 9f7d38d..5de72d2 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -15,6 +15,8 @@
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
#include <linux/platform_data/spi-davinci.h>
@@ -26,13 +28,14 @@
#include <mach/common.h>
#include <mach/cputype.h>
-#include <mach/irqs.h>
#include <mach/mux.h>
#include <mach/serial.h>
-#include <mach/time.h>
+
+#include <clocksource/timer-davinci.h>
#include "asp.h"
#include "davinci.h"
+#include "irqs.h"
#include "mux.h"
#define DM355_UART2_BASE (IO_PHYS + 0x206000)
@@ -53,7 +56,7 @@
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM355_SPINT0_0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_SPINT0_0),
.flags = IORESOURCE_IRQ,
},
};
@@ -273,12 +276,12 @@
},
{
.name = "edma3_ccint",
- .start = IRQ_CCINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCINT0),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCERRINT),
.flags = IORESOURCE_IRQ,
},
/* not using (or muxing) TC*_ERR */
@@ -358,13 +361,13 @@
static struct resource vpfe_resources[] = {
{
- .start = IRQ_VDINT0,
- .end = IRQ_VDINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_VDINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_VDINT0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_VDINT1,
- .end = IRQ_VDINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_VDINT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_VDINT1),
.flags = IORESOURCE_IRQ,
},
};
@@ -422,8 +425,8 @@
static struct resource dm355_venc_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_VENCINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_VENCINT),
.flags = IORESOURCE_IRQ,
},
/* venc registers io space */
@@ -442,8 +445,8 @@
static struct resource dm355_v4l2_disp_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_VENCINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_VENCINT),
.flags = IORESOURCE_IRQ,
},
/* venc registers io space */
@@ -547,13 +550,45 @@
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DM355_GPIOBNK0,
- .end = IRQ_DM355_GPIOBNK6,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK0),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK1),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK2),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK2),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK3),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK3),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK4),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK4),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK5),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK5),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK6),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM355_GPIOBNK6),
.flags = IORESOURCE_IRQ,
},
};
static struct davinci_gpio_platform_data dm355_gpio_platform_data = {
+ .no_auto_base = true,
+ .base = 0,
.ngpio = 104,
};
@@ -586,21 +621,21 @@
};
/*
- * T0_BOT: Timer 0, bottom: clockevent source for hrtimers
- * T0_TOP: Timer 0, top : clocksource for generic timekeeping
- * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code)
- * T1_TOP: Timer 1, top : <unused>
+ * Bottom half of timer0 is used for clockevent, top half is used for
+ * clocksource.
*/
-static struct davinci_timer_info dm355_timer_info = {
- .timers = davinci_timer_instance,
- .clockevent_id = T0_BOT,
- .clocksource_id = T0_TOP,
+static const struct davinci_timer_cfg dm355_timer_cfg = {
+ .reg = DEFINE_RES_IO(DAVINCI_TIMER0_BASE, SZ_4K),
+ .irq = {
+ DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_TINT0_TINT12)),
+ DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_TINT0_TINT34)),
+ },
};
static struct plat_serial8250_port dm355_serial0_platform_data[] = {
{
.mapbase = DAVINCI_UART0_BASE,
- .irq = IRQ_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT0),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -613,7 +648,7 @@
static struct plat_serial8250_port dm355_serial1_platform_data[] = {
{
.mapbase = DAVINCI_UART1_BASE,
- .irq = IRQ_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT1),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -626,7 +661,7 @@
static struct plat_serial8250_port dm355_serial2_platform_data[] = {
{
.mapbase = DM355_UART2_BASE,
- .irq = IRQ_DM355_UARTINT2,
+ .irq = DAVINCI_INTC_IRQ(IRQ_DM355_UARTINT2),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -672,11 +707,6 @@
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
.pinmux_pins = dm355_pins,
.pinmux_pins_num = ARRAY_SIZE(dm355_pins),
- .intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_AINTC,
- .intc_irq_prios = dm355_default_priorities,
- .intc_irq_num = DAVINCI_N_AINTC_IRQ,
- .timer_info = &dm355_timer_info,
.sram_dma = 0x00010000,
.sram_len = SZ_32K,
};
@@ -703,6 +733,7 @@
{
void __iomem *pll1, *psc;
struct clk *clk;
+ int rv;
clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM355_REF_FREQ);
@@ -713,8 +744,13 @@
dm355_psc_init(NULL, psc);
clk = clk_get(NULL, "timer0");
+ if (WARN_ON(IS_ERR(clk))) {
+ pr_err("Unable to get the timer clock\n");
+ return;
+ }
- davinci_timer_init(clk);
+ rv = davinci_timer_register(clk, &dm355_timer_cfg);
+ WARN(rv, "Unable to register the timer: %d\n", rv);
}
static struct resource dm355_pll2_resources[] = {
@@ -761,6 +797,21 @@
return 0;
}
+static const struct davinci_aintc_config dm355_aintc_config = {
+ .reg = {
+ .start = DAVINCI_ARM_INTC_BASE,
+ .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = 64,
+ .prios = dm355_default_priorities,
+};
+
+void __init dm355_init_irq(void)
+{
+ davinci_aintc_init(&dm355_aintc_config);
+}
+
static int __init dm355_init_devices(void)
{
struct platform_device *edma_pdev;
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index abcf2a5..9fc5c73 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -19,6 +19,8 @@
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
#include <linux/platform_data/keyscan-davinci.h>
@@ -31,13 +33,13 @@
#include <mach/common.h>
#include <mach/cputype.h>
-#include <mach/irqs.h>
#include <mach/mux.h>
#include <mach/serial.h>
#include <mach/time.h>
#include "asp.h"
#include "davinci.h"
+#include "irqs.h"
#include "mux.h"
#define DM365_REF_FREQ 24000000 /* 24 MHz on the DM365 EVM */
@@ -224,7 +226,7 @@
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM365_SPIINT0_0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_SPIINT0_0),
.flags = IORESOURCE_IRQ,
},
};
@@ -266,13 +268,50 @@
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DM365_GPIO0,
- .end = IRQ_DM365_GPIO7,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO0),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO1),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO2),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO2),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO3),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO3),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO4),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO4),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO5),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO5),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO6),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO6),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO7),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_GPIO7),
.flags = IORESOURCE_IRQ,
},
};
static struct davinci_gpio_platform_data dm365_gpio_platform_data = {
+ .no_auto_base = true,
+ .base = 0,
.ngpio = 104,
.gpio_unbanked = 8,
};
@@ -299,23 +338,23 @@
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM365_EMAC_RXTHRESH,
- .end = IRQ_DM365_EMAC_RXTHRESH,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_RXTHRESH),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_RXTHRESH),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_EMAC_RXPULSE,
- .end = IRQ_DM365_EMAC_RXPULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_RXPULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_RXPULSE),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_EMAC_TXPULSE,
- .end = IRQ_DM365_EMAC_TXPULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_TXPULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_TXPULSE),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM365_EMAC_MISCPULSE,
- .end = IRQ_DM365_EMAC_MISCPULSE,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_MISCPULSE),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_EMAC_MISCPULSE),
.flags = IORESOURCE_IRQ,
},
};
@@ -423,8 +462,8 @@
};
static const struct dma_slave_map dm365_edma_map[] = {
- { "davinci-mcbsp.0", "tx", EDMA_FILTER_PARAM(0, 2) },
- { "davinci-mcbsp.0", "rx", EDMA_FILTER_PARAM(0, 3) },
+ { "davinci-mcbsp", "tx", EDMA_FILTER_PARAM(0, 2) },
+ { "davinci-mcbsp", "rx", EDMA_FILTER_PARAM(0, 3) },
{ "davinci_voicecodec", "tx", EDMA_FILTER_PARAM(0, 2) },
{ "davinci_voicecodec", "rx", EDMA_FILTER_PARAM(0, 3) },
{ "spi_davinci.2", "tx", EDMA_FILTER_PARAM(0, 10) },
@@ -481,12 +520,12 @@
},
{
.name = "edma3_ccint",
- .start = IRQ_CCINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCINT0),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCERRINT),
.flags = IORESOURCE_IRQ,
},
/* not using TC*_ERR */
@@ -560,7 +599,7 @@
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM365_RTCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_RTCINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -590,8 +629,8 @@
},
{
/* interrupt */
- .start = IRQ_DM365_KEYINT,
- .end = IRQ_DM365_KEYINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM365_KEYINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM365_KEYINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -632,7 +671,7 @@
static struct plat_serial8250_port dm365_serial0_platform_data[] = {
{
.mapbase = DAVINCI_UART0_BASE,
- .irq = IRQ_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT0),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -645,7 +684,7 @@
static struct plat_serial8250_port dm365_serial1_platform_data[] = {
{
.mapbase = DM365_UART1_BASE,
- .irq = IRQ_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT1),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -684,10 +723,6 @@
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
.pinmux_pins = dm365_pins,
.pinmux_pins_num = ARRAY_SIZE(dm365_pins),
- .intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_AINTC,
- .intc_irq_prios = dm365_default_priorities,
- .intc_irq_num = DAVINCI_N_AINTC_IRQ,
.timer_info = &dm365_timer_info,
.emac_pdata = &dm365_emac_pdata,
.sram_dma = 0x00010000,
@@ -749,6 +784,10 @@
dm365_psc_init(NULL, psc);
clk = clk_get(NULL, "timer0");
+ if (WARN_ON(IS_ERR(clk))) {
+ pr_err("Unable to get the timer clock\n");
+ return;
+ }
davinci_timer_init(clk);
}
@@ -785,13 +824,13 @@
static struct resource vpfe_resources[] = {
{
- .start = IRQ_VDINT0,
- .end = IRQ_VDINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_VDINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_VDINT0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_VDINT1,
- .end = IRQ_VDINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_VDINT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_VDINT1),
.flags = IORESOURCE_IRQ,
},
};
@@ -872,8 +911,8 @@
static struct resource dm365_venc_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_VENCINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_VENCINT),
.flags = IORESOURCE_IRQ,
},
/* venc registers io space */
@@ -892,8 +931,8 @@
static struct resource dm365_v4l2_disp_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_VENCINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_VENCINT),
.flags = IORESOURCE_IRQ,
},
/* venc registers io space */
@@ -1015,6 +1054,21 @@
return 0;
}
+static const struct davinci_aintc_config dm365_aintc_config = {
+ .reg = {
+ .start = DAVINCI_ARM_INTC_BASE,
+ .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = 64,
+ .prios = dm365_default_priorities,
+};
+
+void __init dm365_init_irq(void)
+{
+ davinci_aintc_init(&dm365_aintc_config);
+}
+
static int __init dm365_init_devices(void)
{
struct platform_device *edma_pdev;
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 0720da7..2498893 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -14,6 +14,8 @@
#include <linux/clkdev.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
#include <linux/platform_device.h>
@@ -23,13 +25,14 @@
#include <mach/common.h>
#include <mach/cputype.h>
-#include <mach/irqs.h>
#include <mach/mux.h>
#include <mach/serial.h>
-#include <mach/time.h>
+
+#include <clocksource/timer-davinci.h>
#include "asp.h"
#include "davinci.h"
+#include "irqs.h"
#include "mux.h"
/*
@@ -59,8 +62,8 @@
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_EMACINT,
- .end = IRQ_EMACINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_EMACINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_EMACINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -260,12 +263,12 @@
},
{
.name = "edma3_ccint",
- .start = IRQ_CCINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCINT0),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCERRINT),
.flags = IORESOURCE_IRQ,
},
/* not using TC*_ERR */
@@ -330,13 +333,13 @@
static struct resource dm644x_vpfe_resources[] = {
{
- .start = IRQ_VDINT0,
- .end = IRQ_VDINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_VDINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_VDINT0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_VDINT1,
- .end = IRQ_VDINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_VDINT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_VDINT1),
.flags = IORESOURCE_IRQ,
},
};
@@ -442,8 +445,8 @@
static struct resource dm644x_v4l2_disp_resources[] = {
{
- .start = IRQ_VENCINT,
- .end = IRQ_VENCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_VENCINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_VENCINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -491,13 +494,35 @@
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_GPIOBNK0,
- .end = IRQ_GPIOBNK4,
+ .start = DAVINCI_INTC_IRQ(IRQ_GPIOBNK0),
+ .end = DAVINCI_INTC_IRQ(IRQ_GPIOBNK0),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_GPIOBNK1),
+ .end = DAVINCI_INTC_IRQ(IRQ_GPIOBNK1),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_GPIOBNK2),
+ .end = DAVINCI_INTC_IRQ(IRQ_GPIOBNK2),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_GPIOBNK3),
+ .end = DAVINCI_INTC_IRQ(IRQ_GPIOBNK3),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_GPIOBNK4),
+ .end = DAVINCI_INTC_IRQ(IRQ_GPIOBNK4),
.flags = IORESOURCE_IRQ,
},
};
static struct davinci_gpio_platform_data dm644_gpio_platform_data = {
+ .no_auto_base = true,
+ .base = 0,
.ngpio = 71,
};
@@ -537,21 +562,21 @@
};
/*
- * T0_BOT: Timer 0, bottom: clockevent source for hrtimers
- * T0_TOP: Timer 0, top : clocksource for generic timekeeping
- * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code)
- * T1_TOP: Timer 1, top : <unused>
+ * Bottom half of timer0 is used for clockevent, top half is used for
+ * clocksource.
*/
-static struct davinci_timer_info dm644x_timer_info = {
- .timers = davinci_timer_instance,
- .clockevent_id = T0_BOT,
- .clocksource_id = T0_TOP,
+static const struct davinci_timer_cfg dm644x_timer_cfg = {
+ .reg = DEFINE_RES_IO(DAVINCI_TIMER0_BASE, SZ_4K),
+ .irq = {
+ DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_TINT0_TINT12)),
+ DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_TINT0_TINT34)),
+ },
};
static struct plat_serial8250_port dm644x_serial0_platform_data[] = {
{
.mapbase = DAVINCI_UART0_BASE,
- .irq = IRQ_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT0),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -564,7 +589,7 @@
static struct plat_serial8250_port dm644x_serial1_platform_data[] = {
{
.mapbase = DAVINCI_UART1_BASE,
- .irq = IRQ_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT1),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -577,7 +602,7 @@
static struct plat_serial8250_port dm644x_serial2_platform_data[] = {
{
.mapbase = DAVINCI_UART2_BASE,
- .irq = IRQ_UARTINT2,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT2),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM,
@@ -623,11 +648,6 @@
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
.pinmux_pins = dm644x_pins,
.pinmux_pins_num = ARRAY_SIZE(dm644x_pins),
- .intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_AINTC,
- .intc_irq_prios = dm644x_default_priorities,
- .intc_irq_num = DAVINCI_N_AINTC_IRQ,
- .timer_info = &dm644x_timer_info,
.emac_pdata = &dm644x_emac_pdata,
.sram_dma = 0x00008000,
.sram_len = SZ_16K,
@@ -649,6 +669,7 @@
{
void __iomem *pll1, *psc;
struct clk *clk;
+ int rv;
clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, DM644X_REF_FREQ);
@@ -659,8 +680,13 @@
dm644x_psc_init(NULL, psc);
clk = clk_get(NULL, "timer0");
+ if (WARN_ON(IS_ERR(clk))) {
+ pr_err("Unable to get the timer clock\n");
+ return;
+ }
- davinci_timer_init(clk);
+ rv = davinci_timer_register(clk, &dm644x_timer_cfg);
+ WARN(rv, "Unable to register the timer: %d\n", rv);
}
static struct resource dm644x_pll2_resources[] = {
@@ -707,6 +733,21 @@
return 0;
}
+static const struct davinci_aintc_config dm644x_aintc_config = {
+ .reg = {
+ .start = DAVINCI_ARM_INTC_BASE,
+ .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = 64,
+ .prios = dm644x_default_priorities,
+};
+
+void __init dm644x_init_irq(void)
+{
+ davinci_aintc_init(&dm644x_aintc_config);
+}
+
void __init dm644x_init_devices(void)
{
struct platform_device *edma_pdev;
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 6bd2ed0..4ffd028 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -1,5 +1,5 @@
/*
- * TI DaVinci DM644x chip specific setup
+ * TI DaVinci DM646x chip specific setup
*
* Author: Kevin Hilman, Deep Root Systems, LLC
*
@@ -15,6 +15,8 @@
#include <linux/dma-mapping.h>
#include <linux/dmaengine.h>
#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/irqchip/irq-davinci-aintc.h>
#include <linux/platform_data/edma.h>
#include <linux/platform_data/gpio-davinci.h>
#include <linux/platform_device.h>
@@ -24,13 +26,14 @@
#include <mach/common.h>
#include <mach/cputype.h>
-#include <mach/irqs.h>
#include <mach/mux.h>
#include <mach/serial.h>
-#include <mach/time.h>
+
+#include <clocksource/timer-davinci.h>
#include "asp.h"
#include "davinci.h"
+#include "irqs.h"
#include "mux.h"
#define DAVINCI_VPIF_BASE (0x01C12000)
@@ -62,23 +65,23 @@
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DM646X_EMACRXTHINT,
- .end = IRQ_DM646X_EMACRXTHINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACRXTHINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACRXTHINT),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_EMACRXINT,
- .end = IRQ_DM646X_EMACRXINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACRXINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACRXINT),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_EMACTXINT,
- .end = IRQ_DM646X_EMACTXINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACTXINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACTXINT),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_EMACMISCINT,
- .end = IRQ_DM646X_EMACMISCINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACMISCINT),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_EMACMISCINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -273,12 +276,12 @@
},
{
.name = "edma3_ccint",
- .start = IRQ_CCINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCINT0),
.flags = IORESOURCE_IRQ,
},
{
.name = "edma3_ccerrint",
- .start = IRQ_CCERRINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_CCERRINT),
.flags = IORESOURCE_IRQ,
},
/* not using TC*_ERR */
@@ -315,12 +318,12 @@
},
{
.name = "tx",
- .start = IRQ_DM646X_MCASP0TXINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_MCASP0TXINT),
.flags = IORESOURCE_IRQ,
},
{
.name = "rx",
- .start = IRQ_DM646X_MCASP0RXINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_MCASP0RXINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -341,7 +344,7 @@
},
{
.name = "tx",
- .start = IRQ_DM646X_MCASP1TXINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_MCASP1TXINT),
.flags = IORESOURCE_IRQ,
},
};
@@ -388,13 +391,13 @@
static struct resource vpif_display_resource[] = {
{
- .start = IRQ_DM646X_VP_VERTINT2,
- .end = IRQ_DM646X_VP_VERTINT2,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT2),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT2),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_VP_VERTINT3,
- .end = IRQ_DM646X_VP_VERTINT3,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT3),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT3),
.flags = IORESOURCE_IRQ,
},
};
@@ -412,13 +415,13 @@
static struct resource vpif_capture_resource[] = {
{
- .start = IRQ_DM646X_VP_VERTINT0,
- .end = IRQ_DM646X_VP_VERTINT0,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT0),
.flags = IORESOURCE_IRQ,
},
{
- .start = IRQ_DM646X_VP_VERTINT1,
- .end = IRQ_DM646X_VP_VERTINT1,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_VP_VERTINT1),
.flags = IORESOURCE_IRQ,
},
};
@@ -441,13 +444,25 @@
.flags = IORESOURCE_MEM,
},
{ /* interrupt */
- .start = IRQ_DM646X_GPIOBNK0,
- .end = IRQ_DM646X_GPIOBNK2,
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_GPIOBNK0),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_GPIOBNK0),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_GPIOBNK1),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_GPIOBNK1),
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .start = DAVINCI_INTC_IRQ(IRQ_DM646X_GPIOBNK2),
+ .end = DAVINCI_INTC_IRQ(IRQ_DM646X_GPIOBNK2),
.flags = IORESOURCE_IRQ,
},
};
static struct davinci_gpio_platform_data dm646x_gpio_platform_data = {
+ .no_auto_base = true,
+ .base = 0,
.ngpio = 43,
};
@@ -487,21 +502,21 @@
};
/*
- * T0_BOT: Timer 0, bottom: clockevent source for hrtimers
- * T0_TOP: Timer 0, top : clocksource for generic timekeeping
- * T1_BOT: Timer 1, bottom: (used by DSP in TI DSPLink code)
- * T1_TOP: Timer 1, top : <unused>
+ * Bottom half of timer0 is used for clockevent, top half is used for
+ * clocksource.
*/
-static struct davinci_timer_info dm646x_timer_info = {
- .timers = davinci_timer_instance,
- .clockevent_id = T0_BOT,
- .clocksource_id = T0_TOP,
+static const struct davinci_timer_cfg dm646x_timer_cfg = {
+ .reg = DEFINE_RES_IO(DAVINCI_TIMER0_BASE, SZ_4K),
+ .irq = {
+ DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_TINT0_TINT12)),
+ DEFINE_RES_IRQ(DAVINCI_INTC_IRQ(IRQ_TINT0_TINT34)),
+ },
};
static struct plat_serial8250_port dm646x_serial0_platform_data[] = {
{
.mapbase = DAVINCI_UART0_BASE,
- .irq = IRQ_UARTINT0,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT0),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM32,
@@ -514,7 +529,7 @@
static struct plat_serial8250_port dm646x_serial1_platform_data[] = {
{
.mapbase = DAVINCI_UART1_BASE,
- .irq = IRQ_UARTINT1,
+ .irq = DAVINCI_INTC_IRQ(IRQ_UARTINT1),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM32,
@@ -527,7 +542,7 @@
static struct plat_serial8250_port dm646x_serial2_platform_data[] = {
{
.mapbase = DAVINCI_UART2_BASE,
- .irq = IRQ_DM646X_UARTINT2,
+ .irq = DAVINCI_INTC_IRQ(IRQ_DM646X_UARTINT2),
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |
UPF_IOREMAP,
.iotype = UPIO_MEM32,
@@ -573,11 +588,6 @@
.pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
.pinmux_pins = dm646x_pins,
.pinmux_pins_num = ARRAY_SIZE(dm646x_pins),
- .intc_base = DAVINCI_ARM_INTC_BASE,
- .intc_type = DAVINCI_INTC_TYPE_AINTC,
- .intc_irq_prios = dm646x_default_priorities,
- .intc_irq_num = DAVINCI_N_AINTC_IRQ,
- .timer_info = &dm646x_timer_info,
.emac_pdata = &dm646x_emac_pdata,
.sram_dma = 0x10010000,
.sram_len = SZ_32K,
@@ -642,6 +652,7 @@
{
void __iomem *pll1, *psc;
struct clk *clk;
+ int rv;
clk_register_fixed_rate(NULL, "ref_clk", NULL, 0, ref_clk_rate);
clk_register_fixed_rate(NULL, "aux_clkin", NULL, 0, aux_clkin_rate);
@@ -653,8 +664,13 @@
dm646x_psc_init(NULL, psc);
clk = clk_get(NULL, "timer0");
+ if (WARN_ON(IS_ERR(clk))) {
+ pr_err("Unable to get the timer clock\n");
+ return;
+ }
- davinci_timer_init(clk);
+ rv = davinci_timer_register(clk, &dm646x_timer_cfg);
+ WARN(rv, "Unable to register the timer: %d\n", rv);
}
static struct resource dm646x_pll2_resources[] = {
@@ -678,6 +694,21 @@
platform_device_register(&dm646x_pll2_device);
}
+static const struct davinci_aintc_config dm646x_aintc_config = {
+ .reg = {
+ .start = DAVINCI_ARM_INTC_BASE,
+ .end = DAVINCI_ARM_INTC_BASE + SZ_4K - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ .num_irqs = 64,
+ .prios = dm646x_default_priorities,
+};
+
+void __init dm646x_init_irq(void)
+{
+ davinci_aintc_init(&dm646x_aintc_config);
+}
+
static int __init dm646x_init_devices(void)
{
int ret = 0;
diff --git a/arch/arm/mach-davinci/include/mach/clock.h b/arch/arm/mach-davinci/include/mach/clock.h
deleted file mode 100644
index 42ed4f2..0000000
--- a/arch/arm/mach-davinci/include/mach/clock.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/*
- * arch/arm/mach-davinci/include/mach/clock.h
- *
- * Clock control driver for DaVinci - header file
- *
- * Authors: Vladimir Barinov <source@mvista.com>
- *
- * 2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#ifndef __ASM_ARCH_DAVINCI_CLOCK_H
-#define __ASM_ARCH_DAVINCI_CLOCK_H
-
-struct clk;
-
-int davinci_clk_reset_assert(struct clk *c);
-int davinci_clk_reset_deassert(struct clk *c);
-
-#endif
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index b577e13..9526e5d 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -17,11 +17,12 @@
#include <linux/types.h>
#include <linux/reboot.h>
-void davinci_timer_init(struct clk *clk);
+#include <asm/irq.h>
-extern void davinci_irq_init(void);
-extern void __iomem *davinci_intc_base;
-extern int davinci_intc_type;
+#define DAVINCI_INTC_START NR_IRQS
+#define DAVINCI_INTC_IRQ(_irqnum) (DAVINCI_INTC_START + (_irqnum))
+
+void davinci_timer_init(struct clk *clk);
struct davinci_timer_instance {
u32 base;
@@ -57,11 +58,6 @@
u32 pinmux_base;
const struct mux_config *pinmux_pins;
unsigned long pinmux_pins_num;
- u32 intc_base;
- int intc_type;
- u8 *intc_irq_prios;
- unsigned long intc_irq_num;
- u32 *intc_host_map;
struct davinci_timer_info *timer_info;
int gpio_type;
u32 gpio_base;
diff --git a/arch/arm/mach-davinci/include/mach/cpufreq.h b/arch/arm/mach-davinci/include/mach/cpufreq.h
deleted file mode 100644
index 3c089cf..0000000
--- a/arch/arm/mach-davinci/include/mach/cpufreq.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * TI DaVinci CPUFreq platform support.
- *
- * Copyright (C) 2009 Texas Instruments, Inc. http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-#ifndef _MACH_DAVINCI_CPUFREQ_H
-#define _MACH_DAVINCI_CPUFREQ_H
-
-#include <linux/cpufreq.h>
-
-struct davinci_cpufreq_config {
- struct cpufreq_frequency_table *freq_table;
- int (*set_voltage) (unsigned int index);
- int (*init) (void);
-};
-
-#endif
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h
index ab4a57f..1618b30 100644
--- a/arch/arm/mach-davinci/include/mach/da8xx.h
+++ b/arch/arm/mach-davinci/include/mach/da8xx.h
@@ -88,10 +88,12 @@
#define DA8XX_ARM_RAM_BASE 0xffff0000
void da830_init(void);
+void da830_init_irq(void);
void da830_init_time(void);
void da830_register_clocks(void);
void da850_init(void);
+void da850_init_irq(void);
void da850_init_time(void);
void da850_register_clocks(void);
diff --git a/arch/arm/mach-davinci/include/mach/entry-macro.S b/arch/arm/mach-davinci/include/mach/entry-macro.S
deleted file mode 100644
index cf5f573..0000000
--- a/arch/arm/mach-davinci/include/mach/entry-macro.S
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Low-level IRQ helper macros for TI DaVinci-based platforms
- *
- * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
- *
- * 2007 (c) MontaVista Software, Inc. This file is licensed under
- * the terms of the GNU General Public License version 2. This program
- * is licensed "as is" without any warranty of any kind, whether express
- * or implied.
- */
-#include <mach/irqs.h>
-
- .macro get_irqnr_preamble, base, tmp
- ldr \base, =davinci_intc_base
- ldr \base, [\base]
- .endm
-
- .macro get_irqnr_and_base, irqnr, irqstat, base, tmp
-#if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC)
- ldr \tmp, =davinci_intc_type
- ldr \tmp, [\tmp]
- cmp \tmp, #DAVINCI_INTC_TYPE_CP_INTC
- beq 1001f
-#endif
-#if defined(CONFIG_AINTC)
- ldr \tmp, [\base, #0x14]
- movs \tmp, \tmp, lsr #2
- sub \irqnr, \tmp, #1
- b 1002f
-#endif
-#if defined(CONFIG_CP_INTC)
-1001: ldr \irqnr, [\base, #0x80] /* get irq number */
- mov \tmp, \irqnr, lsr #31
- and \irqnr, \irqnr, #0xff /* irq is in bits 0-9 */
- and \tmp, \tmp, #0x1
- cmp \tmp, #0x1
-#endif
-1002:
- .endm
diff --git a/arch/arm/mach-davinci/include/mach/time.h b/arch/arm/mach-davinci/include/mach/time.h
index 1c971d8..ba91373 100644
--- a/arch/arm/mach-davinci/include/mach/time.h
+++ b/arch/arm/mach-davinci/include/mach/time.h
@@ -11,9 +11,7 @@
#ifndef __ARCH_ARM_MACH_DAVINCI_TIME_H
#define __ARCH_ARM_MACH_DAVINCI_TIME_H
-#define DAVINCI_TIMER0_BASE (IO_PHYS + 0x21400)
#define DAVINCI_TIMER1_BASE (IO_PHYS + 0x21800)
-#define DAVINCI_WDOG_BASE (IO_PHYS + 0x21C00)
enum {
T0_BOT,
diff --git a/arch/arm/mach-davinci/irq.c b/arch/arm/mach-davinci/irq.c
deleted file mode 100644
index 952dc12..0000000
--- a/arch/arm/mach-davinci/irq.c
+++ /dev/null
@@ -1,117 +0,0 @@
-/*
- * Interrupt handler for DaVinci boards.
- *
- * Copyright (C) 2006 Texas Instruments.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/interrupt.h>
-#include <linux/irq.h>
-#include <linux/io.h>
-
-#include <mach/hardware.h>
-#include <mach/cputype.h>
-#include <mach/common.h>
-#include <asm/mach/irq.h>
-
-#define FIQ_REG0_OFFSET 0x0000
-#define FIQ_REG1_OFFSET 0x0004
-#define IRQ_REG0_OFFSET 0x0008
-#define IRQ_REG1_OFFSET 0x000C
-#define IRQ_ENT_REG0_OFFSET 0x0018
-#define IRQ_ENT_REG1_OFFSET 0x001C
-#define IRQ_INCTL_REG_OFFSET 0x0020
-#define IRQ_EABASE_REG_OFFSET 0x0024
-#define IRQ_INTPRI0_REG_OFFSET 0x0030
-#define IRQ_INTPRI7_REG_OFFSET 0x004C
-
-static inline void davinci_irq_writel(unsigned long value, int offset)
-{
- __raw_writel(value, davinci_intc_base + offset);
-}
-
-static __init void
-davinci_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
-{
- struct irq_chip_generic *gc;
- struct irq_chip_type *ct;
-
- gc = irq_alloc_generic_chip("AINTC", 1, irq_start, base, handle_edge_irq);
- if (!gc) {
- pr_err("%s: irq_alloc_generic_chip for IRQ %u failed\n",
- __func__, irq_start);
- return;
- }
-
- ct = gc->chip_types;
- ct->chip.irq_ack = irq_gc_ack_set_bit;
- ct->chip.irq_mask = irq_gc_mask_clr_bit;
- ct->chip.irq_unmask = irq_gc_mask_set_bit;
-
- ct->regs.ack = IRQ_REG0_OFFSET;
- ct->regs.mask = IRQ_ENT_REG0_OFFSET;
- irq_setup_generic_chip(gc, IRQ_MSK(num), IRQ_GC_INIT_MASK_CACHE,
- IRQ_NOREQUEST | IRQ_NOPROBE, 0);
-}
-
-/* ARM Interrupt Controller Initialization */
-void __init davinci_irq_init(void)
-{
- unsigned i, j;
- const u8 *davinci_def_priorities = davinci_soc_info.intc_irq_prios;
-
- davinci_intc_type = DAVINCI_INTC_TYPE_AINTC;
- davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_4K);
- if (WARN_ON(!davinci_intc_base))
- return;
-
- /* Clear all interrupt requests */
- davinci_irq_writel(~0x0, FIQ_REG0_OFFSET);
- davinci_irq_writel(~0x0, FIQ_REG1_OFFSET);
- davinci_irq_writel(~0x0, IRQ_REG0_OFFSET);
- davinci_irq_writel(~0x0, IRQ_REG1_OFFSET);
-
- /* Disable all interrupts */
- davinci_irq_writel(0x0, IRQ_ENT_REG0_OFFSET);
- davinci_irq_writel(0x0, IRQ_ENT_REG1_OFFSET);
-
- /* Interrupts disabled immediately, IRQ entry reflects all */
- davinci_irq_writel(0x0, IRQ_INCTL_REG_OFFSET);
-
- /* we don't use the hardware vector table, just its entry addresses */
- davinci_irq_writel(0, IRQ_EABASE_REG_OFFSET);
-
- /* Clear all interrupt requests */
- davinci_irq_writel(~0x0, FIQ_REG0_OFFSET);
- davinci_irq_writel(~0x0, FIQ_REG1_OFFSET);
- davinci_irq_writel(~0x0, IRQ_REG0_OFFSET);
- davinci_irq_writel(~0x0, IRQ_REG1_OFFSET);
-
- for (i = IRQ_INTPRI0_REG_OFFSET; i <= IRQ_INTPRI7_REG_OFFSET; i += 4) {
- u32 pri;
-
- for (j = 0, pri = 0; j < 32; j += 4, davinci_def_priorities++)
- pri |= (*davinci_def_priorities & 0x07) << j;
- davinci_irq_writel(pri, i);
- }
-
- for (i = 0, j = 0; i < davinci_soc_info.intc_irq_num; i += 32, j += 0x04)
- davinci_alloc_gc(davinci_intc_base + j, i, 32);
-
- irq_set_handler(IRQ_TINT1_TINT34, handle_level_irq);
-}
diff --git a/arch/arm/mach-davinci/include/mach/irqs.h b/arch/arm/mach-davinci/irqs.h
similarity index 98%
rename from arch/arm/mach-davinci/include/mach/irqs.h
rename to arch/arm/mach-davinci/irqs.h
index edb2ca6..8f9fc7a 100644
--- a/arch/arm/mach-davinci/include/mach/irqs.h
+++ b/arch/arm/mach-davinci/irqs.h
@@ -30,9 +30,6 @@
/* Base address */
#define DAVINCI_ARM_INTC_BASE 0x01C48000
-#define DAVINCI_INTC_TYPE_AINTC 0
-#define DAVINCI_INTC_TYPE_CP_INTC 1
-
/* Interrupt lines */
#define IRQ_VDINT0 0
#define IRQ_VDINT1 1
@@ -404,6 +401,5 @@
/* da850 currently has the most gpio pins (144) */
#define DAVINCI_N_GPIO 144
/* da850 currently has the most irqs so use DA850_N_CP_INTC_IRQ */
-#define NR_IRQS (DA850_N_CP_INTC_IRQ + DAVINCI_N_GPIO)
#endif /* __ASM_ARCH_IRQS_H */
diff --git a/arch/arm/mach-davinci/pdata-quirks.c b/arch/arm/mach-davinci/pdata-quirks.c
index 4858b1c..67f1c85 100644
--- a/arch/arm/mach-davinci/pdata-quirks.c
+++ b/arch/arm/mach-davinci/pdata-quirks.c
@@ -1,11 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
* Legacy platform_data quirks
*
* Copyright (C) 2016 BayLibre, Inc
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/of_platform.h>
diff --git a/arch/arm/mach-davinci/pm.c b/arch/arm/mach-davinci/pm.c
index b5cc05d..e33c6bc 100644
--- a/arch/arm/mach-davinci/pm.c
+++ b/arch/arm/mach-davinci/pm.c
@@ -1,11 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-only
/*
* DaVinci Power Management Routines
*
* Copyright (C) 2009 Texas Instruments, Inc. http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#include <linux/pm.h>
diff --git a/arch/arm/mach-davinci/serial.c b/arch/arm/mach-davinci/serial.c
index 951b620..127b62c 100644
--- a/arch/arm/mach-davinci/serial.c
+++ b/arch/arm/mach-davinci/serial.c
@@ -1,22 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* TI DaVinci serial driver
*
* Copyright (C) 2006 Texas Instruments.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
- *
*/
#include <linux/kernel.h>
diff --git a/arch/arm/mach-davinci/sleep.S b/arch/arm/mach-davinci/sleep.S
index cd350de..71262dc 100644
--- a/arch/arm/mach-davinci/sleep.S
+++ b/arch/arm/mach-davinci/sleep.S
@@ -1,19 +1,6 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
/*
* (C) Copyright 2009, Texas Instruments, Inc. http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR /PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
*/
/* replicated define because linux/bitops.h cannot be included in assembly */
@@ -37,6 +24,7 @@
#define DEEPSLEEP_SLEEPENABLE_BIT BIT(31)
.text
+ .arch armv5te
/*
* Move DaVinci into deep sleep state
*
diff --git a/arch/arm/mach-davinci/sram.c b/arch/arm/mach-davinci/sram.c
index 668b6e7..bbae190 100644
--- a/arch/arm/mach-davinci/sram.c
+++ b/arch/arm/mach-davinci/sram.c
@@ -1,12 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
/*
* mach-davinci/sram.c - DaVinci simple SRAM allocator
*
* Copyright (C) 2009 David Brownell
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
*/
#include <linux/module.h>
#include <linux/init.h>
diff --git a/arch/arm/mach-davinci/sram.h b/arch/arm/mach-davinci/sram.h
index 4e5db56..7ef8d1d 100644
--- a/arch/arm/mach-davinci/sram.h
+++ b/arch/arm/mach-davinci/sram.h
@@ -1,11 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
/*
* mach/sram.h - DaVinci simple SRAM allocator
*
* Copyright (C) 2009 David Brownell
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef __MACH_SRAM_H
#define __MACH_SRAM_H
diff --git a/arch/arm/mach-davinci/time.c b/arch/arm/mach-davinci/time.c
index 5a6de53..740410a 100644
--- a/arch/arm/mach-davinci/time.c
+++ b/arch/arm/mach-davinci/time.c
@@ -398,17 +398,3 @@
for (i=0; i< ARRAY_SIZE(timers); i++)
timer32_config(&timers[i]);
}
-
-static int __init of_davinci_timer_init(struct device_node *np)
-{
- struct clk *clk;
-
- clk = of_clk_get(np, 0);
- if (IS_ERR(clk))
- return PTR_ERR(clk);
-
- davinci_timer_init(clk);
-
- return 0;
-}
-TIMER_OF_DECLARE(davinci_timer, "ti,da830-timer", of_davinci_timer_init);
diff --git a/arch/arm/mach-davinci/usb-da8xx.c b/arch/arm/mach-davinci/usb-da8xx.c
index c17ce66..25f21ee 100644
--- a/arch/arm/mach-davinci/usb-da8xx.c
+++ b/arch/arm/mach-davinci/usb-da8xx.c
@@ -18,7 +18,8 @@
#include <mach/common.h>
#include <mach/cputype.h>
#include <mach/da8xx.h>
-#include <mach/irqs.h>
+
+#include "irqs.h"
#define DA8XX_USB0_BASE 0x01e00000
#define DA8XX_USB1_BASE 0x01e25000
@@ -70,7 +71,7 @@
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_DA8XX_USB_INT,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_USB_INT),
.flags = IORESOURCE_IRQ,
.name = "mc",
},
@@ -105,8 +106,8 @@
.flags = IORESOURCE_MEM,
},
[1] = {
- .start = IRQ_DA8XX_IRQN,
- .end = IRQ_DA8XX_IRQN,
+ .start = DAVINCI_INTC_IRQ(IRQ_DA8XX_IRQN),
+ .end = DAVINCI_INTC_IRQ(IRQ_DA8XX_IRQN),
.flags = IORESOURCE_IRQ,
},
};
diff --git a/arch/arm/mach-davinci/usb.c b/arch/arm/mach-davinci/usb.c
index 31ed7aa..dd8db61 100644
--- a/arch/arm/mach-davinci/usb.c
+++ b/arch/arm/mach-davinci/usb.c
@@ -2,16 +2,16 @@
/*
* USB
*/
+#include <linux/dma-mapping.h>
#include <linux/init.h>
#include <linux/platform_device.h>
-#include <linux/dma-mapping.h>
-
+#include <linux/platform_data/usb-davinci.h>
#include <linux/usb/musb.h>
#include <mach/common.h>
-#include <mach/irqs.h>
#include <mach/cputype.h>
-#include <linux/platform_data/usb-davinci.h>
+
+#include "irqs.h"
#define DAVINCI_USB_OTG_BASE 0x01c64000
@@ -38,7 +38,7 @@
.flags = IORESOURCE_MEM,
},
{
- .start = IRQ_USBINT,
+ .start = DAVINCI_INTC_IRQ(IRQ_USBINT),
.flags = IORESOURCE_IRQ,
.name = "mc"
},
@@ -70,8 +70,9 @@
if (cpu_is_davinci_dm646x()) {
/* Override the defaults as DM6467 uses different IRQs. */
- usb_dev.resource[1].start = IRQ_DM646X_USBINT;
- usb_dev.resource[2].start = IRQ_DM646X_USBDMAINT;
+ usb_dev.resource[1].start = DAVINCI_INTC_IRQ(IRQ_DM646X_USBINT);
+ usb_dev.resource[2].start = DAVINCI_INTC_IRQ(
+ IRQ_DM646X_USBDMAINT);
} else /* other devices don't have dedicated CPPI IRQ */
usb_dev.num_resources = 2;