| commit | 0e64123141f3854e695eb4924d82b52856691466 | [log] [tgz] |
|---|---|---|
| author | Olivier Deprez <olivier.deprez@arm.com> | Thu Sep 23 10:07:05 2021 +0200 |
| committer | Olivier Deprez <olivier.deprez@arm.com> | Tue Oct 26 16:50:53 2021 +0100 |
| tree | 9f79e140db584f9b107f4e33373a0075983df1f4 | |
| parent | 98854e9675dc7d951fa9c4e10d9c9d230c54bde6 [diff] [blame] |
Update Linux to v5.4.148 Sourced from [1] [1] https://cdn.kernel.org/pub/linux/kernel/v5.x/linux-5.4.148.tar.gz Change-Id: Ib3d26c5ba9b022e2e03533005c4fed4d7c30b61b Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
diff --git a/drivers/pci/controller/pci-xgene-msi.c b/drivers/pci/controller/pci-xgene-msi.c index f4c02da..0bfa506 100644 --- a/drivers/pci/controller/pci-xgene-msi.c +++ b/drivers/pci/controller/pci-xgene-msi.c
@@ -384,13 +384,9 @@ if (!msi_group->gic_irq) continue; - irq_set_chained_handler(msi_group->gic_irq, - xgene_msi_isr); - err = irq_set_handler_data(msi_group->gic_irq, msi_group); - if (err) { - pr_err("failed to register GIC IRQ handler\n"); - return -EINVAL; - } + irq_set_chained_handler_and_data(msi_group->gic_irq, + xgene_msi_isr, msi_group); + /* * Statically allocate MSI GIC IRQs to each CPU core. * With 8-core X-Gene v1, 2 MSI GIC IRQs are allocated