Update prebuilt Clang to r416183b from Android.
https://android.googlesource.com/platform/prebuilts/clang/host/
linux-x86/+/06a71ddac05c22edb2d10b590e1769b3f8619bef
clang 12.0.5 (based on r416183b) from build 7284624.
Change-Id: I277a316abcf47307562d8b748b84870f31a72866
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
diff --git a/linux-x64/clang/include/llvm/CodeGen/MachineOperand.h b/linux-x64/clang/include/llvm/CodeGen/MachineOperand.h
index 2152c75..b7e89cf 100644
--- a/linux-x64/clang/include/llvm/CodeGen/MachineOperand.h
+++ b/linux-x64/clang/include/llvm/CodeGen/MachineOperand.h
@@ -23,6 +23,7 @@
namespace llvm {
class BlockAddress;
+class Constant;
class ConstantFP;
class ConstantInt;
class GlobalValue;
@@ -68,7 +69,8 @@
MO_CFIIndex, ///< MCCFIInstruction index.
MO_IntrinsicID, ///< Intrinsic ID for ISel
MO_Predicate, ///< Generic predicate for ISel
- MO_Last = MO_Predicate,
+ MO_ShuffleMask, ///< Other IR Constant for ISel (shuffle masks)
+ MO_Last = MO_ShuffleMask
};
private:
@@ -161,7 +163,8 @@
MachineInstr *ParentMI;
/// Contents union - This contains the payload for the various operand types.
- union {
+ union ContentsUnion {
+ ContentsUnion() {}
MachineBasicBlock *MBB; // For MO_MachineBasicBlock.
const ConstantFP *CFP; // For MO_FPImmediate.
const ConstantInt *CI; // For MO_CImmediate. Integers > 64bit.
@@ -172,6 +175,7 @@
unsigned CFIIndex; // For MO_CFI.
Intrinsic::ID IntrinsicID; // For MO_IntrinsicID.
unsigned Pred; // For MO_Predicate
+ ArrayRef<int> ShuffleMask; // For MO_ShuffleMask
struct { // For MO_Register.
// Register number is in SmallContents.RegNo.
@@ -275,6 +279,9 @@
/// More complex way of printing a MachineOperand.
/// \param TypeToPrint specifies the generic type to be printed on uses and
/// defs. It can be determined using MachineInstr::getTypeToPrint.
+ /// \param OpIdx - specifies the index of the operand in machine instruction.
+ /// This will be used by target dependent MIR formatter. Could be None if the
+ /// index is unknown, e.g. called by dump().
/// \param PrintDef - whether we want to print `def` on an operand which
/// isDef. Sometimes, if the operand is printed before '=', we don't print
/// `def`.
@@ -291,8 +298,9 @@
/// information from it's parent.
/// \param IntrinsicInfo - same as \p TRI.
void print(raw_ostream &os, ModuleSlotTracker &MST, LLT TypeToPrint,
- bool PrintDef, bool IsStandalone, bool ShouldPrintRegisterTies,
- unsigned TiedOperandIdx, const TargetRegisterInfo *TRI,
+ Optional<unsigned> OpIdx, bool PrintDef, bool IsStandalone,
+ bool ShouldPrintRegisterTies, unsigned TiedOperandIdx,
+ const TargetRegisterInfo *TRI,
const TargetIntrinsicInfo *IntrinsicInfo) const;
/// Same as print(os, TRI, IntrinsicInfo), but allows to specify the low-level
@@ -341,6 +349,7 @@
bool isCFIIndex() const { return OpKind == MO_CFIIndex; }
bool isIntrinsicID() const { return OpKind == MO_IntrinsicID; }
bool isPredicate() const { return OpKind == MO_Predicate; }
+ bool isShuffleMask() const { return OpKind == MO_ShuffleMask; }
//===--------------------------------------------------------------------===//
// Accessors for Register Operands
//===--------------------------------------------------------------------===//
@@ -455,7 +464,7 @@
/// Change the register this operand corresponds to.
///
- void setReg(unsigned Reg);
+ void setReg(Register Reg);
void setSubReg(unsigned subReg) {
assert(isReg() && "Wrong MachineOperand mutator");
@@ -468,13 +477,13 @@
/// using TargetRegisterInfo to compose the subreg indices if necessary.
/// Reg must be a virtual register, SubIdx can be 0.
///
- void substVirtReg(unsigned Reg, unsigned SubIdx, const TargetRegisterInfo&);
+ void substVirtReg(Register Reg, unsigned SubIdx, const TargetRegisterInfo&);
/// substPhysReg - Substitute the current register with the physical register
/// Reg, taking any existing SubReg into account. For instance,
/// substPhysReg(%eax) will change %reg1024:sub_8bit to %al.
///
- void substPhysReg(unsigned Reg, const TargetRegisterInfo&);
+ void substPhysReg(MCRegister Reg, const TargetRegisterInfo&);
void setIsUse(bool Val = true) { setIsDef(!Val); }
@@ -579,6 +588,11 @@
return Contents.Pred;
}
+ ArrayRef<int> getShuffleMask() const {
+ assert(isShuffleMask() && "Wrong MachineOperand accessor");
+ return Contents.ShuffleMask;
+ }
+
/// Return the offset from the symbol in this operand. This always returns 0
/// for ExternalSymbol operands.
int64_t getOffset() const {
@@ -598,14 +612,14 @@
/// It is sometimes necessary to detach the register mask pointer from its
/// machine operand. This static method can be used for such detached bit
/// mask pointers.
- static bool clobbersPhysReg(const uint32_t *RegMask, unsigned PhysReg) {
+ static bool clobbersPhysReg(const uint32_t *RegMask, MCRegister PhysReg) {
// See TargetRegisterInfo.h.
assert(PhysReg < (1u << 30) && "Not a physical register");
return !(RegMask[PhysReg / 32] & (1u << PhysReg % 32));
}
/// clobbersPhysReg - Returns true if this RegMask operand clobbers PhysReg.
- bool clobbersPhysReg(unsigned PhysReg) const {
+ bool clobbersPhysReg(MCRegister PhysReg) const {
return clobbersPhysReg(getRegMask(), PhysReg);
}
@@ -684,6 +698,11 @@
Contents.RegMask = RegMaskPtr;
}
+ void setIntrinsicID(Intrinsic::ID IID) {
+ assert(isIntrinsicID() && "Wrong MachineOperand mutator");
+ Contents.IntrinsicID = IID;
+ }
+
void setPredicate(unsigned Predicate) {
assert(isPredicate() && "Wrong MachineOperand mutator");
Contents.Pred = Predicate;
@@ -709,37 +728,42 @@
/// ChangeToImmediate - Replace this operand with a new immediate operand of
/// the specified value. If an operand is known to be an immediate already,
/// the setImm method should be used.
- void ChangeToImmediate(int64_t ImmVal);
+ void ChangeToImmediate(int64_t ImmVal, unsigned TargetFlags = 0);
/// ChangeToFPImmediate - Replace this operand with a new FP immediate operand
/// of the specified value. If an operand is known to be an FP immediate
/// already, the setFPImm method should be used.
- void ChangeToFPImmediate(const ConstantFP *FPImm);
+ void ChangeToFPImmediate(const ConstantFP *FPImm, unsigned TargetFlags = 0);
/// ChangeToES - Replace this operand with a new external symbol operand.
- void ChangeToES(const char *SymName, unsigned char TargetFlags = 0);
+ void ChangeToES(const char *SymName, unsigned TargetFlags = 0);
/// ChangeToGA - Replace this operand with a new global address operand.
void ChangeToGA(const GlobalValue *GV, int64_t Offset,
- unsigned char TargetFlags = 0);
+ unsigned TargetFlags = 0);
/// ChangeToMCSymbol - Replace this operand with a new MC symbol operand.
- void ChangeToMCSymbol(MCSymbol *Sym);
+ void ChangeToMCSymbol(MCSymbol *Sym, unsigned TargetFlags = 0);
/// Replace this operand with a frame index.
- void ChangeToFrameIndex(int Idx);
+ void ChangeToFrameIndex(int Idx, unsigned TargetFlags = 0);
/// Replace this operand with a target index.
void ChangeToTargetIndex(unsigned Idx, int64_t Offset,
- unsigned char TargetFlags = 0);
+ unsigned TargetFlags = 0);
/// ChangeToRegister - Replace this operand with a new register operand of
/// the specified value. If an operand is known to be an register already,
/// the setReg method should be used.
- void ChangeToRegister(unsigned Reg, bool isDef, bool isImp = false,
+ void ChangeToRegister(Register Reg, bool isDef, bool isImp = false,
bool isKill = false, bool isDead = false,
bool isUndef = false, bool isDebug = false);
+ /// getTargetIndexName - If this MachineOperand is a TargetIndex that has a
+ /// name, attempt to get the name. Returns nullptr if the TargetIndex does not
+ /// have a name. Asserts if MO is not a TargetIndex.
+ const char *getTargetIndexName() const;
+
//===--------------------------------------------------------------------===//
// Construction methods.
//===--------------------------------------------------------------------===//
@@ -762,7 +786,7 @@
return Op;
}
- static MachineOperand CreateReg(unsigned Reg, bool isDef, bool isImp = false,
+ static MachineOperand CreateReg(Register Reg, bool isDef, bool isImp = false,
bool isKill = false, bool isDead = false,
bool isUndef = false,
bool isEarlyClobber = false,
@@ -788,7 +812,7 @@
return Op;
}
static MachineOperand CreateMBB(MachineBasicBlock *MBB,
- unsigned char TargetFlags = 0) {
+ unsigned TargetFlags = 0) {
MachineOperand Op(MachineOperand::MO_MachineBasicBlock);
Op.setMBB(MBB);
Op.setTargetFlags(TargetFlags);
@@ -800,7 +824,7 @@
return Op;
}
static MachineOperand CreateCPI(unsigned Idx, int Offset,
- unsigned char TargetFlags = 0) {
+ unsigned TargetFlags = 0) {
MachineOperand Op(MachineOperand::MO_ConstantPoolIndex);
Op.setIndex(Idx);
Op.setOffset(Offset);
@@ -808,21 +832,21 @@
return Op;
}
static MachineOperand CreateTargetIndex(unsigned Idx, int64_t Offset,
- unsigned char TargetFlags = 0) {
+ unsigned TargetFlags = 0) {
MachineOperand Op(MachineOperand::MO_TargetIndex);
Op.setIndex(Idx);
Op.setOffset(Offset);
Op.setTargetFlags(TargetFlags);
return Op;
}
- static MachineOperand CreateJTI(unsigned Idx, unsigned char TargetFlags = 0) {
+ static MachineOperand CreateJTI(unsigned Idx, unsigned TargetFlags = 0) {
MachineOperand Op(MachineOperand::MO_JumpTableIndex);
Op.setIndex(Idx);
Op.setTargetFlags(TargetFlags);
return Op;
}
static MachineOperand CreateGA(const GlobalValue *GV, int64_t Offset,
- unsigned char TargetFlags = 0) {
+ unsigned TargetFlags = 0) {
MachineOperand Op(MachineOperand::MO_GlobalAddress);
Op.Contents.OffsetedInfo.Val.GV = GV;
Op.setOffset(Offset);
@@ -830,7 +854,7 @@
return Op;
}
static MachineOperand CreateES(const char *SymName,
- unsigned char TargetFlags = 0) {
+ unsigned TargetFlags = 0) {
MachineOperand Op(MachineOperand::MO_ExternalSymbol);
Op.Contents.OffsetedInfo.Val.SymbolName = SymName;
Op.setOffset(0); // Offset is always 0.
@@ -838,7 +862,7 @@
return Op;
}
static MachineOperand CreateBA(const BlockAddress *BA, int64_t Offset,
- unsigned char TargetFlags = 0) {
+ unsigned TargetFlags = 0) {
MachineOperand Op(MachineOperand::MO_BlockAddress);
Op.Contents.OffsetedInfo.Val.BA = BA;
Op.setOffset(Offset);
@@ -876,7 +900,7 @@
}
static MachineOperand CreateMCSymbol(MCSymbol *Sym,
- unsigned char TargetFlags = 0) {
+ unsigned TargetFlags = 0) {
MachineOperand Op(MachineOperand::MO_MCSymbol);
Op.Contents.Sym = Sym;
Op.setOffset(0);
@@ -902,6 +926,12 @@
return Op;
}
+ static MachineOperand CreateShuffleMask(ArrayRef<int> Mask) {
+ MachineOperand Op(MachineOperand::MO_ShuffleMask);
+ Op.Contents.ShuffleMask = Mask;
+ return Op;
+ }
+
friend class MachineInstr;
friend class MachineRegisterInfo;