Update prebuilt Clang to r416183b from Android.
https://android.googlesource.com/platform/prebuilts/clang/host/
linux-x86/+/06a71ddac05c22edb2d10b590e1769b3f8619bef
clang 12.0.5 (based on r416183b) from build 7284624.
Change-Id: I277a316abcf47307562d8b748b84870f31a72866
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>
diff --git a/linux-x64/clang/include/llvm/CodeGen/MachineMemOperand.h b/linux-x64/clang/include/llvm/CodeGen/MachineMemOperand.h
index 65f7063..1befe93 100644
--- a/linux-x64/clang/include/llvm/CodeGen/MachineMemOperand.h
+++ b/linux-x64/clang/include/llvm/CodeGen/MachineMemOperand.h
@@ -18,6 +18,7 @@
#include "llvm/ADT/BitmaskEnum.h"
#include "llvm/ADT/PointerUnion.h"
#include "llvm/CodeGen/PseudoSourceValue.h"
+#include "llvm/IR/DerivedTypes.h"
#include "llvm/IR/Value.h" // PointerLikeTypeTraits<Value*>
#include "llvm/Support/AtomicOrdering.h"
#include "llvm/Support/DataTypes.h"
@@ -58,8 +59,8 @@
AddrSpace = v ? v->getAddressSpace() : 0;
}
- explicit MachinePointerInfo(unsigned AddressSpace = 0)
- : V((const Value *)nullptr), Offset(0), StackID(0),
+ explicit MachinePointerInfo(unsigned AddressSpace = 0, int64_t offset = 0)
+ : V((const Value *)nullptr), Offset(offset), StackID(0),
AddrSpace(AddressSpace) {}
explicit MachinePointerInfo(
@@ -77,10 +78,10 @@
MachinePointerInfo getWithOffset(int64_t O) const {
if (V.isNull())
- return MachinePointerInfo(AddrSpace);
+ return MachinePointerInfo(AddrSpace, Offset + O);
if (V.is<const Value*>())
- return MachinePointerInfo(V.get<const Value*>(), Offset+O, StackID);
- return MachinePointerInfo(V.get<const PseudoSourceValue*>(), Offset+O,
+ return MachinePointerInfo(V.get<const Value*>(), Offset + O, StackID);
+ return MachinePointerInfo(V.get<const PseudoSourceValue*>(), Offset + O,
StackID);
}
@@ -169,7 +170,7 @@
MachinePointerInfo PtrInfo;
uint64_t Size;
Flags FlagVals;
- uint16_t BaseAlignLog2; // log_2(base_alignment) + 1
+ Align BaseAlign;
MachineAtomicInfo AtomicInfo;
AAMDNodes AAInfo;
const MDNode *Ranges;
@@ -181,8 +182,7 @@
/// atomic operations the atomic ordering requirements when store does not
/// occur must also be specified.
MachineMemOperand(MachinePointerInfo PtrInfo, Flags flags, uint64_t s,
- uint64_t a,
- const AAMDNodes &AAInfo = AAMDNodes(),
+ Align a, const AAMDNodes &AAInfo = AAMDNodes(),
const MDNode *Ranges = nullptr,
SyncScope::ID SSID = SyncScope::System,
AtomicOrdering Ordering = AtomicOrdering::NotAtomic,
@@ -223,13 +223,21 @@
/// Return the size in bits of the memory reference.
uint64_t getSizeInBits() const { return Size * 8; }
+ LLVM_ATTRIBUTE_DEPRECATED(uint64_t getAlignment() const,
+ "Use getAlign instead");
+
/// Return the minimum known alignment in bytes of the actual memory
/// reference.
- uint64_t getAlignment() const;
+ Align getAlign() const;
+
+ LLVM_ATTRIBUTE_DEPRECATED(uint64_t getBaseAlignment() const,
+ "Use getBaseAlign instead") {
+ return BaseAlign.value();
+ }
/// Return the minimum known alignment in bytes of the base address, without
/// the offset.
- uint64_t getBaseAlignment() const { return (1u << BaseAlignLog2) >> 1; }
+ Align getBaseAlign() const { return BaseAlign; }
/// Return the AA tags for the memory reference.
AAMDNodes getAAInfo() const { return AAInfo; }
@@ -293,8 +301,6 @@
/// Support for operator<<.
/// @{
- void print(raw_ostream &OS) const;
- void print(raw_ostream &OS, ModuleSlotTracker &MST) const;
void print(raw_ostream &OS, ModuleSlotTracker &MST,
SmallVectorImpl<StringRef> &SSNs, const LLVMContext &Context,
const MachineFrameInfo *MFI, const TargetInstrInfo *TII) const;
@@ -309,7 +315,7 @@
LHS.getFlags() == RHS.getFlags() &&
LHS.getAAInfo() == RHS.getAAInfo() &&
LHS.getRanges() == RHS.getRanges() &&
- LHS.getAlignment() == RHS.getAlignment() &&
+ LHS.getAlign() == RHS.getAlign() &&
LHS.getAddrSpace() == RHS.getAddrSpace();
}
@@ -319,11 +325,6 @@
}
};
-inline raw_ostream &operator<<(raw_ostream &OS, const MachineMemOperand &MRO) {
- MRO.print(OS);
- return OS;
-}
-
} // End llvm namespace
#endif