commit f4ef2d0d9dbf6f696386b786eb60884a933685b0
author Olivier Deprez <olivier.deprez@arm.com> Tue Apr 20 13:36:24 2021 +0200
committer Daniel Boulby <daniel.boulby@arm.com> Tue Oct 12 13:31:56 2021 +0100
tree e9081b61fa2bfde16861ab58927c14bb2f1bf505
parent 07c3246c6f9cf9e7faf344ed396d9c90fc2ca32e

Update prebuilt Clang to r416183b from Android.

https://android.googlesource.com/platform/prebuilts/clang/host/
linux-x86/+/06a71ddac05c22edb2d10b590e1769b3f8619bef

clang 12.0.5 (based on r416183b) from build 7284624.

Change-Id: I277a316abcf47307562d8b748b84870f31a72866
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>

linux-x64/clang/include/llvm/CodeGen/MIRParser/MIParser.h

diff --git a/linux-x64/clang/include/llvm/CodeGen/MIRParser/MIParser.h b/linux-x64/clang/include/llvm/CodeGen/MIRParser/MIParser.h
index 4e32a04..590b3dc 100644
--- a/linux-x64/clang/include/llvm/CodeGen/MIRParser/MIParser.h
+++ b/linux-x64/clang/include/llvm/CodeGen/MIRParser/MIParser.h
@@ -16,6 +16,7 @@
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/ADT/StringMap.h"
 #include "llvm/CodeGen/MachineMemOperand.h"
+#include "llvm/CodeGen/Register.h"
 #include "llvm/Support/Allocator.h"
 
 namespace llvm {
@@ -40,8 +41,8 @@
     const TargetRegisterClass *RC;
     const RegisterBank *RegBank;
   } D;
-  unsigned VReg;
-  unsigned PreferredReg = 0;
+  Register VReg;
+  Register PreferredReg;
 };
 
 using Name2RegClassMap = StringMap<const TargetRegisterClass *>;
@@ -55,7 +56,7 @@
   StringMap<unsigned> Names2InstrOpCodes;
 
   /// Maps from register names to registers.
-  StringMap<unsigned> Names2Regs;
+  StringMap<Register> Names2Regs;
 
   /// Maps from register mask names to register masks.
   StringMap<const uint32_t *> Names2RegMasks;
@@ -100,7 +101,7 @@
 
   /// Try to convert a register name to a register number. Return true if the
   /// register name is invalid.
-  bool getRegisterByName(StringRef RegName, unsigned &Reg);
+  bool getRegisterByName(StringRef RegName, Register &Reg);
 
   /// Check if the given identifier is a name of a register mask.
   ///
@@ -164,19 +165,23 @@
   PerTargetMIParsingState &Target;
 
   DenseMap<unsigned, MachineBasicBlock *> MBBSlots;
-  DenseMap<unsigned, VRegInfo *> VRegInfos;
+  DenseMap<Register, VRegInfo *> VRegInfos;
   StringMap<VRegInfo *> VRegInfosNamed;
   DenseMap<unsigned, int> FixedStackObjectSlots;
   DenseMap<unsigned, int> StackObjectSlots;
   DenseMap<unsigned, unsigned> ConstantPoolSlots;
   DenseMap<unsigned, unsigned> JumpTableSlots;
 
+  /// Maps from slot numbers to function's unnamed values.
+  DenseMap<unsigned, const Value *> Slots2Values;
+
   PerFunctionMIParsingState(MachineFunction &MF, SourceMgr &SM,
                             const SlotMapping &IRSlots,
                             PerTargetMIParsingState &Target);
 
-  VRegInfo &getVRegInfo(unsigned Num);
+  VRegInfo &getVRegInfo(Register Num);
   VRegInfo &getVRegInfoNamed(StringRef RegName);
+  const Value *getIRValue(unsigned Slot);
 };
 
 /// Parse the machine basic block definitions, and skip the machine
@@ -212,10 +217,10 @@
                        SMDiagnostic &Error);
 
 bool parseRegisterReference(PerFunctionMIParsingState &PFS,
-                            unsigned &Reg, StringRef Src,
+                            Register &Reg, StringRef Src,
                             SMDiagnostic &Error);
 
-bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, unsigned &Reg,
+bool parseNamedRegisterReference(PerFunctionMIParsingState &PFS, Register &Reg,
                                  StringRef Src, SMDiagnostic &Error);
 
 bool parseVirtualRegisterReference(PerFunctionMIParsingState &PFS,